DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DRAWINGS
The drawings are objected to under 37 CFR 1.83(a) because they fail to show complete circuit of power electronics 16 (plurality of inverters 38, see fig.2, spec., para. [0022]). How the control device 10 comprising a primary driver unit 18 and the secondary driver unit 20 controlling the plurality of inverters 38 not shown. Flow chart Methods steps of FIG.3 needs to be labelled as described in the specification.
Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Objection to Specification
The disclosure is objected to because of the following informalities: Applicant’s specification (see para’s [0026], [0027] & [0032]) states (SEE PARA. [0026]) The secondary driver unit 20 is provided at least in the fault operating state for actuating the power electronics system 16. The secondary driver unit 20, in the normal operating state (not clear), is in a purely passive mode of operation and/or a standby mode of operation and is provided solely in the fault operating state for actuating the power electronics 16. In the present case, the secondary driver unit 20 is provided in order to replace the primary driver unit 18 in the fault operating state and to actuate the power electronics 16 and consequently to take control of the operation of the electric motor 12.
Specification states (SEE PARA. [0027]) In the present case, the primary driver unit 18 and the secondary driver unit 20 are thus connected in parallel and provided in order to actuate the same power electronics 16, wherein the primary driver unit 18 is in the normal operating state and the secondary driver unit 20 is in the fault operating state.
Specification states (SEE PARA. [0032]) A method step 50 corresponds to the normal operating state. The primary driver unit 18 is provided for actuating the power electronics system 16 and is thus in the active state. The secondary driver unit 20, on the other hand, is in a high-impedance state and therefore in a passive and/or inactive state. In addition, by means of the computing unit 30, for example, the operation of the primary driver unit 18 in the normal operating state is monitored.
The above para’s teaches the primary driver unit 18 is in the normal operating state and the secondary driver unit 20 is in the fault operating state (high impedance state and therefore in a passive and/or inactive state).
However, claim 1 state the secondary driver unit 20 is in a high-impedance state in the normal operating state and claim 8 state the secondary driver unit is in the normal operating state in a high-impedance state creates unclarity and incompleteness. Appropriate clarifications and corrections required.
Claim Rejections – 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-9 are rejected due to unclear subject-matter.
As to claim 1, the phrase, “the second driver unit (20) is in a high-impedance state in the normal operating state” is unclear or incomplete.
As to claim 8, the phrase, “the secondary driver unit is in the normal operating state in a high-impedance state” is unclear or incomplete.
See objection to specification above. The specification (see para’s [0026], [0027] & [0032]) teaches the primary driver unit 18 is in the normal operating state and the secondary driver unit 20 is in the fault operating state (high impedance state and therefore in a passive and/or inactive state).
However, claim 1 state the secondary driver unit 20 is in a high-impedance state in the normal operating state and claim 8 state the secondary driver unit is in the normal operating state in a high-impedance state creates unclarity and incompleteness (is it in the normal operating state of the primary driver unit 18 (fig.2, switch 22 connected), where the secondary driver unit 20 in is in a high-impedance state (inactive state, switch 24 disconnected, see fig.2). Appropriate corrections required for claims 1 and 8.
Claim Rejections – 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-9 are rejected under 35 U.S.C. 102(a) (1) as being anticipated by Tomoharu Hayakawa (US Pub. No.: US 2019/0097565 A1).
As to claim 1, (Currently amended) A control device for operating an electric motor, comprising:
a power electronics system,
a primary driver unit configured to actuate the power electronics system in a normal operating state, and
a secondary driver unit which is (i) connected in parallel with the primary driver unit, and (ii) configured to actuate the power electronics system in at least one fault operating state in which a malfunction and/or failure of the primary driver unit occurs,
wherein the primary driver unit and the secondary driver unit each have an integrated tri-state functionality and the second driver unit is in a high-impedance state in the normal operating state.
(As to claim 1, Hayakawa teaches (figs.1-8, abstract, para’s [0038], [0049], [0052]) a control device [ECU 101] for operating an electric motor 80, comprising:
a power electronics system [first inverter 61/second inverter 62] (see figs.1, 3/6/8),
a primary driver unit [first microcomputer 21] configured to actuate the power electronics system [first inverter 61/second inverter 62] (see figs.1, 3/6/8) in a normal operating state (see para. [0043], [0044], [0055]-[0059], [0060]), and
a secondary driver unit [ second microcomputer 22] which is (i) connected in parallel with the primary driver unit [first microcomputer 21] (see fig.1/6/8), and (ii) configured to actuate the power electronics system [first inverter 61/second inverter 62] in at least one fault operating state (after time tx, see fig.5, para’s [0089] thru [0092]) in which a malfunction and/or failure of the primary driver unit [firs microcomputer 21] occurs (see para’s. [0092],[0095]/[0105]), figs.1, 5/6-7),
wherein the primary driver unit [first microcomputer 21] and the secondary driver unit [second microcomputer 22] each have an integrated tri-state functionality [High state [H], Low state [L] and High impedance state [Hi-Z] (see fig.5 (b), 5(d)/fig.7(b, 7d)) and the second driver unit [second microcomputer 22] is in a high-impedance state (due to abnormality of second microcomputer 22, see para’s [0063] thru [0065]/ malfunction of second microcomputer 22, see para.[0106]) in the normal operating state of other normal system not failed (see para.[0105]-[0106], [0017], [0044], [0095], and figs.6-7, fig. 7(f), para’s [0101] thru [0109]).
As to claim 2, (Currently amended) The control device according to claim 1, wherein the primary driver unit and the secondary driver unit are each configured as integrated electronic circuitry.
(As to claim 2, Hayakawa teaches (figs.1-8, abstract, para’s [0038], [0049], [0052]) a control device [ECU 101] (figs.1/6/8) wherein the primary driver unit [first microcomputer 21] and the secondary driver unit [second microcomputer 22] (fig.1/6/8) are each configured as integrated microcomputer circuitry via [ECU 101]).
As to claim 3, (Currently amended) The control device according to claim 1, wherein the primary driver unit comprises a control pin for controlling tri-state functionality of the primary driver unit.
(As to claim 3, Hayakawa teaches (figs.1-8, abstract, para’s [0038], [0049], [0052]) a control device [ECU 101] (figs.1/6/8) wherein the primary driver unit [first microcomputer 21] comprises a control pin such as a Sel1/Dr1 control output terminal (see figs.1, 4-5, para’s [0061], [0065], [0084],[0088], [0089]-[0090]) for controlling tri-state functionality such as [High state [H], Low state [L] and High impedance state [H1-Z] (see fig.5) of the primary driver unit [first microcomputer 21]).
As to claim 4, (Currently amended) The control device according to claim 3, wherein the secondary driver unit comprises a further control pin for controlling tri-state functionality of the secondary driver unit.
(As to claim 4, Hayakawa teaches (figs.1-8, abstract, para’s [0038], [0049], [0052]) a control device [ECU 101] (figs.1/6/8) wherein the secondary driver unit [second microcomputer 22] comprises a control pin such as a Sel2/Dr1 control output (see fig.1/6-7/8, par. [0061]) for controlling tri-state functionality such as [High state [H], Low state [L] and High impedance state [H1-Z] (para. [0065], see Sel/Dr1 signal, see fig.5/7) of the secondary driver unit [second microcomputer 22]).
As to claim 5, (Currently amended) The control device according to claim 1, further comprising a computing unit configured to monitor operation of the primary driver unit in the normal operating state and, upon determination of a malfunction and/or failure of the primary driver unit, deactivate the primary driver unit and activate the secondary driver unit.
(As to claim 5, Hayakawa teaches (figs.1-8, abstract, para’s [0038], [0049], [0052]) a control device [ECU 101] (figs.1/6/8) further comprising a computing unit [monitoring unit 31] configured to monitor operation of the primary driver unit [first microcomputer 21] in the normal operating state (see para’s [0063], [0087]) and, upon determination of a abnormality of the primary driver unit [first microcomputer 21], deactivate the primary driver unit [first microcomputer 21] (stop control, see para’s [0064]-[0065], [0089]) and activate the secondary driver unit [second microcomputer 22] is activated to provide the other drive signal [Dr2] (see after time tx, see figs1, 5/6-7, para’s [0089] thru [0092]).
As to claim 6, (Currently amended) An actuator assembly, comprising: an electric motor, and a control device according to claim 1.
(As to claim 6, Hayakawa teaches (fig.2, para’s [0035] thru [0039]) an actuator assembly 90 (includes steering shaft 92, gear system 94), comprising an electric motor 80 and a control device [ECU 101], see figs.1-2).
As to claim 7, (Currently amended) A steering system having at least one actuator assembly according to claim 6.
(As to claim 6, Hayakawa teaches (fig.2, para’s [0035] thru [0039]) a steering system 100 having at least one actuator assembly 90 (includes steering shaft 92, gear system 94).
As to claim 8, (Currently amended) A method for operating an electric motor, by way of a control device according to claim 1, in which a power electronics system is actuated in a normal operating state by way of a primary driver unit and in a fault operating state, in which a malfunction and/or a failure of the primary driver unit occurs, by way of a secondary driver unit connected in parallel with the primary driver unit, wherein the primary driver unit and the secondary driver unit each have integrated tri-state functionality and the secondary driver unit is in the normal operating state in a high-impedance state.
(As to claim 8, Hayakawa teaches (figs.1-8, abstract, para’s [0038], [0049], [0052], [0063]) a method for operating an electric motor 80, by way of a control device [ECU 101] (figs.1-5/6-7/8) according to claim 1, in which a power electronics system [first inverter 61/second inverter 62] is actuated (via corresponding switching circuit 41-51/42-52) in a normal operating state by way of a primary driver unit [first microcomputer 21] and in a fault operating state (after time tx, see fig.5/7, para’s [0089] thru [0092]), in which a malfunction and/or a failure of the primary driver unit [first microcomputer 21] occurs (see para’s. [0092],[0095]/[0105]), figs.1, 5/6-7), by way of a secondary driver unit [second microcomputer 22] connected in parallel with the primary driver unit [first microcomputer 21] (figs.1/6/8), wherein the primary driver unit [first microcomputer 21] and the secondary driver unit [second microcomputer 22] each have an integrated tri-state functionality [High state [H], Low state [L] and High impedance state [Hi-Z] (see fig.5 (b), 5(d)/fig.7(b, 7d)) and the secondary driver unit [second microcomputer 22] is in the normal operating state (see para. [0090] thru 0095]) in a high-impedance state [H1-Z] (after time tx, see fig.5/7, due to abnormality/malfunction of first microcomputer 21).
9. (New) The control device according to claim 1, wherein the electric motor is an electric motor of a steering system.
(As to claim 6, Hayakawa teaches (figs.1-2, para’s [0035] thru [0039]) a control device [Ecu 101], wherein the electric motor 80 of a steering system 100, see fig.2).
Response to Arguments
In response to arguments, see remarks dated 04/04/2024, examiner acknowledges the abstract. However, drawings figs. 2-3 are objected and specification is objected due to unclear subject-matter of claims 1 and 8, see specification objection and 112 rejections as noted above and appropriate corrections and clarifications are required in response to this office action.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTONY M PAUL whose telephone number is (571)270-1608. The examiner can normally be reached M-F 8 am to 4 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mr. Eduardo Colon Santana can be reached at 571-272-2060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ANTONY M PAUL/
Primary Examiner of Art Unit 2846