Prosecution Insights
Last updated: October 02, 2026
Application No. 18/699,555

Accelerating Quantum-Resistant, Cryptographic Hash-Based Signature Computations

Final Rejection §103§112
Filed
Apr 08, 2024
Priority
Oct 11, 2021 — nonprovisional of PCTUS2021054431
Examiner
AYALA, KEVIN ALEXIS
Art Unit
2496
Tech Center
2400 — Computer Networks
Assignee
Google LLC
OA Round
2 (Final)
63%
Grant Probability
Moderate
3-4
OA Rounds
12m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 63% of resolved cases
63%
Career Allowance Rate
115 granted / 182 resolved
+5.2% vs TC avg
Strong +28% interview lift
Without
With
+28.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
21 currently pending
Career history
211
Total Applications
across all art units

Statute-Specific Performance

§101
10.5%
-29.5% vs TC avg
§103
56.2%
+16.2% vs TC avg
§102
6.5%
-33.5% vs TC avg
§112
23.9%
-16.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 182 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments In response to specification, filed 06/09/2026, the objection to the abstract has been with withdrawn in light of amending the abstract. In response to the claim interpretation, filed 06/09/2026, the claim does not invoke 112f. In response to 35 USC 112(b), filed 06/09/2026, the 35 USC 112(b) is still maintained. Applicant did not address the issue with configurable position in the input buffer. The claim language “configurable position” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. In response to 35 USC 102 and 103, filed 06/09/2026, applicant argues that Schultz fails to teach “repeating, by the hashing module, the hash computation for a predetermined number of iterations, each of the repeated hash computations resulting in at least a portion of a digest message of a previous iteration of the hash computation being loaded directly into said configurable position in the input buffer in which the at least a portion of the digest message is appended to the at least a portion of the first input message”. Schultz teaches “repeating, by the hashing module, the hash computation for a predetermined number of iterations”. Schultz discloses “the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included [0021][00027] Fig. 2”. Schultz shows repeating the hash for a predetermined number of iterations, the results stored in the buffer. However, Schultz does not explicitly teach “each of the repeated hash computations resulting in at least a portion of a digest message of a previous iteration of the hash computation being loaded directly into said configurable position in the input buffer in which the at least a portion of the digest message is appended to the at least a portion of the first input message”. Applicant’s argument have been considered but are moot, because the newly recited amendment does not rely on the newly recited reference being applied to the prior rejection of record or any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-11, 13 and 16-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Re. claims 1, 5, 8, 16, 18 and 21-22; The claim language “configurable position” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Unclear what position of the input buffet would be “configurable” to load a digest message. For the purpose of examination, the claim interpretation is being interpreted as loading the digest message in the input buffer. Claims 2-11, 13 and 17-23 fall together accordingly as they do not cure the deficiencies of the independent claims. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 10, 11, 13 and 23 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Re. claim 10, the claim recites “the first input message loaded into the input buffer comprises a byte configured as a 1-byte counter and the loading, during each iteration of hash computations, of the at least a portion of the digest message directly into the configurable position in the input buffer does not overwrite the 1-byte counter”. There is no support in the specification that the digest message directly into the configurable position in the input buffer does not overwrite the 1-byte counter. Nowhere in the specification mentions overwrite. Re. claim 23, the claim recites “wherein the loading, by the hashing module, of the at least a portion of the digest message directly into to the input buffer does not overwrite the multi-byte prefix or a 1-byte counter of the first input message”. There is no support in the specification that the digest message directly into to the input buffer does not overwrite the multi-byte prefix or a 1-byte counter of the first input message. Nowhere in the specification mentions overwrite. Claims 11 and 13 fall together accordingly as they do not cure the deficiencies of claim 10. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5, 8-9, 16, 18 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Schultz (US 20130166514) in view of Yap et al. (US 20090141887, hereinafter Yap). Re. claim 1, Schultz discloses a computer-implemented method comprising: loading, by a hashing module of an integrated circuit (IC), a first input message into an input buffer (Schultz discloses a hash value calculation module 136 included in a media player application (e.g., Flash.RTM. player application) 138 calculates an output hash value for the received player file using the input key value and the input hash value. As described below, the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included, for example, within the hash value calculation module 136 [0021][0027]. Digital electronic circuitry [0049]) Fig. 2, inputs are stored into the buffer); computing, by the hashing module and using the first input message as an input, a hash computation, the hash computation resulting in a digest message (Schultz discloses a hash value calculation module 136 included in a media player application (e.g., Flash.RTM. player application) 138 calculates an output hash value for the received player file using the input key value and the input hash value. As described below, the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included, for example, within the hash value calculation module 136 [0021][0022] Fig. 2, hash value calculation module as the hash engine hashing the input); loading at least a portion of the digest message directly to a configurable position in the input buffer with at least a portion of the first input message (Schultz discloses a hash value calculation module 136 included in a media player application (e.g., Flash.RTM. player application) 138 calculates an output hash value for the received player file using the input key value and the input hash value. As described below, the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included, for example, within the hash value calculation module 136 [0021][0027] Fig. 2, output hash value stored in the buffer); and repeating, by the hashing module, the hash computation for a predetermined number of iterations, each of the repeated hash computations resulting in at least a portion of a digest message loaded directly into said configurable position in the input buffer for use as input to be used by a later iteration of the repeated hash computation (Schultz discloses the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included [0021][00027] Fig. 2 repeating the hash for a predetermined number of iterations, the results stored in the buffer). Schultz discloses iteration of the repeated hash computation, Schultz does not explicitly teach but Yap teaches each of the repeated hash computations resulting in at least a portion of a digest message of a previous iteration of the hash computation being loaded directly into said configurable position in the input buffer in which the at least a portion of the digest message is appended to the at least a position of the first input message and used as an input by the hash module for a subsequent iteration of the repeated hash computation (Yap teaches As shown in FIG. 3 each iteration 302-1, 302-2, . . . 302-n includes two calls to the HMAC function. In an embodiment, the secret may be the key (K) and the seed may be the ipad data. The TLS MAC is defined as a standard HMAC using either SHA-1 or MD5 [0040]. The HMAC function 306-1 computes HMAC(secret, A(1)+seed) to provide P_hash out1 [0041-43][0049][053]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz to include each of the repeated hash computations resulting in at least a portion of a digest message of a previous iteration of the hash computation being loaded directly into said configurable position in the input buffer in which the at least a portion of the digest message is appended to the at least a position of the first input message and used as an input by the hash module for a subsequent iteration of the repeated hash computation as disclosed by Yap. One of ordinary skill in the art would have been motivated for the purpose of accelerate hashing algorithm (Yap [0021]). Re. claim 2, Schultz-Yap teach the method as recited in claim 1, wherein the hashing module of the IC comprises a cryptographic processor implementing a cryptographic hash function (Schultz [0021][0022]). Re. claim 3, Schultz-Yap teach the method as recited in claim 1, wherein the digest message resulting from the hash computation is 32 bytes in length (Schultz [0043]). Re. claim 5, Schultz-Yap teach the method as recited in claim 1, wherein loading at least a portion of the digest message directly into the configurable position in the input buffer comprises loading the at least a portion of the digest message from the hashing module directly into the configurable position of the input buffer without loading the digest message to memory external to the hash engine (Schultz [0021]). Re. claim 8, Schultz-Yap teach the method as recited in claim 1, Schultz does not explicitly teach but Yap teaches wherein the first input message comprises a secret seed loaded into said configurable position in the input buffer, and loading at least a portion of the digest message directly into the configurable position in the input buffer replaces the secret seed (Yap teaches the HMAC function 306-1 computes HMAC(secret, A(1)+seed) to provide P_hash out1 [0041][0049][053]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz to include wherein the first input message comprises a secret seed loaded into said configurable position in the input buffer, and loading at least a portion of the digest message directly into the configurable position in the input buffer replaces the secret seed as disclosed by Yap. One of ordinary skill in the art would have been motivated for the purpose of accelerate hashing algorithm (Yap [0021]). Re. claim 9, Schultz-Yap teach the method as recited in claim 1 wherein the predetermined number of iterations for which the hash computation repeats is up to 256 times (Schultz discloses the algorithm 200 can include a particular number of processing rounds 204 (e.g., two, three, five, ten, or any other number of processing rounds) [0032]). Re. claim 16, Schultz discloses an integrated circuit (Schultz discloses digital electronic circuitry [0049]) comprising: an input buffer with a configurable position input (Schultz discloses hash buffer [0021]; a hash module configured to compute hash values (Schultz discloses hash value calculation module [0021]); and a hash manager (Schultz discloses a processor [0053-0054]) configured to: load a first input message into the input buffer (Schultz discloses a hash value calculation module 136 included in a media player application (e.g., Flash.RTM. player application) 138 calculates an output hash value for the received player file using the input key value and the input hash value. As described below, the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included, for example, within the hash value calculation module 136 [0021][0027] Fig. 2, inputs are stored into the buffer); compute, with the hash module and using the first input message as an input, a hash computation, the hash computation resulting in a digest message (Schultz discloses a hash value calculation module 136 included in a media player application (e.g., Flash.RTM. player application) 138 calculates an output hash value for the received player file using the input key value and the input hash value. As described below, the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included, for example, within the hash value calculation module 136 [0021][0022] Fig. 2, hash value calculation module as the hash engine hashing the input); load at least a portion of the digest message directly to the configurable position in the input buffer with at least a portion of the first input message (Schultz discloses a hash value calculation module 136 included in a media player application (e.g., Flash.RTM. player application) 138 calculates an output hash value for the received player file using the input key value and the input hash value. As described below, the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included, for example, within the hash value calculation module 136 [0021][0027] Fig. 2, output hash value stored in the buffer); and repeat the hash computation for a predetermined number of iterations (Schultz discloses the output hash value can be generated through iterative modifications to the input hash value. Throughout these iterations, the input, intermediate, and output hash values can be stored in a hash buffer 137 included [0021][00027] Fig. 2 repeating the hash for a predetermined number of iterations, the results stored in the buffer). Schultz discloses iteration of the repeated hash computation, Schultz does not explicitly teach but Yap teaches each of the repeated hash computations resulting in at least a portion of a digest message of a previous iteration of the hash computation being loaded directly into said configurable position in the input buffer in which the at least a portion of the digest message is appended to the at least a position of the first input message and used as an input by the hash module for a subsequent iteration of the repeated hash computation (Yap teaches As shown in FIG. 3 each iteration 302-1, 302-2, . . . 302-n includes two calls to the HMAC function. In an embodiment, the secret may be the key (K) and the seed may be the ipad data. The TLS MAC is defined as a standard HMAC using either SHA-1 or MD5 [0040]. The HMAC function 306-1 computes HMAC(secret, A(1)+seed) to provide P_hash out1 [0041-43][0049][053]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz to include each of the repeated hash computations resulting in at least a portion of a digest message of a previous iteration of the hash computation being loaded directly into said configurable position in the input buffer in which the at least a portion of the digest message is appended to the at least a position of the first input message and used as an input by the hash module for a subsequent iteration of the repeated hash computation as disclosed by Yap. One of ordinary skill in the art would have been motivated for the purpose of accelerate hashing algorithm (Yap [0021]). Re. claim 18, rejection of claim 16 is included and claim 18 is rejected with the same rationale as applied in claim 5 above. Re. claim 21, rejection of claim 19 is included and claim 21 is rejected with the same rationale as applied in claim 8 above. Claims 4 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Schultz (US 20130166514) in view of Yap et al. (US 20090141887, hereinafter Yap) and in further view of Cao (CN 105335331). Re. claim 4, Schultz-Yap teach the method as recited in claim 1, Schultz discloses input buffer and hash engine, Schultz-Yap do not explicitly teach but Cao teaches wherein the input buffer is a register file of the hashing module of the IC (Cao teaches register file [0013][0014][0019][0020]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz-Yap to include register file as disclosed by Cao. One of ordinary skill in the art would have been motivated for the purpose of ensuring large-scale data exchange and parallel computation in 256Sha (Cao [0013][0029]). Re. claim 17, rejection of claim 16 is included and claim 17 is rejected with the same rationale as applied in claim 4 above. Claims 6, 19 and 22-23 are rejected under 35 U.S.C. 103 as being unpatentable over Schultz (US 20130166514) in view of Yap et al. (US 20090141887, hereinafter Yap) and in further view of Nelson (US 20220231839). Re. claim 6, Schultz-Yap teach the method as recited in claim 1, Schultz discloses first input message, Schultz-Yap do not explicitly teach but Nelson teaches wherein the first input message is an initial message of a first iteration of the hash computation comprising a bit-string that includes a prefix, a counter, and a secret seed (Nelson teaches a message that includes the unique identification (UID) 122, a counter value 225, and the cryptographic nonce 227. The counter value 225 is obtained from a counter 221 in the memory device 130 [0111]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz-Yap to include a messages containing a prefix, a counter, and a secret seed as disclosed by Nelson. One of ordinary skill in the art would have been motivated for the purpose of using these information for authentication (Nelson [0040]). Re. claim 19, rejection of claim 16 is included and claim 19 is rejected with the same rationale as applied in claim 6 and 22. Re. claim 22, Schultz-Yap teach the method as recited in claim 1, Yap further teaches wherein: the configurable position of the input buffer is configured for the hashing module to load the at least a portion of the digest message directly into byte positions in the input buffer previously occupied by the multi-byte secret seed of the first input message (Yap teaches as shown in FIG. 3 each iteration 302-1, 302-2, . . . 302-n includes two calls to the HMAC function. In an embodiment, the secret may be the key (K) and the seed may be the ipad data. The TLS MAC is defined as a standard HMAC using either SHA-1 or MD5 [0040]. The HMAC function 306-1 computes HMAC(secret, A(1)+seed) to provide P_hash out1 [0041-43][0049][053]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz to include the configurable position of the input buffer is configured for the hashing module to load the at least a portion of the digest message directly into byte positions in the input buffer previously occupied by the multi-byte secret seed of the first input message as disclosed by Yap. One of ordinary skill in the art would have been motivated for the purpose of accelerate hashing algorithm (Yap [0021]). Schultz-Yap do not explicitly teach but Nelson teaches the first input message comprises a bit-string that includes a multi-byte prefix, a 1-byte counter, and a multi-byte secret seed (Nelson teaches a message that includes the unique identification (UID) 122, a counter value 225, and the cryptographic nonce 227. The counter value 225 is obtained from a counter 221 in the memory device 130 [0111]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz-Yap to include a the first input message comprises a bit-string that includes a multi-byte prefix, a 1-byte counter, and a multi-byte secret seed as disclosed by Nelson. One of ordinary skill in the art would have been motivated for the purpose of using these information for authentication (Nelson [0040]). Re. claim 23, Schultz-Yap-Nelson teach the method as recited in claim 22, Yap further teaches wherein the loading, by the hashing module, of the at least a portion of the digest message directly into to the input buffer does not overwrite the multi-byte or a 1 byte counter of the first input message (Yap teaches As shown in FIG. 3 each iteration 302-1, 302-2, . . . 302-n includes two calls to the HMAC function. In an embodiment, the secret may be the key (K) and the seed may be the ipad data. The TLS MAC is defined as a standard HMAC using either SHA-1 or MD5 [0040]. The HMAC function 306-1 computes HMAC(secret, A(1)+seed) to provide P_hash out1 [0041-43][0049][053]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz to include wherein the loading, by the hashing module, of the at least a portion of the digest message directly into to the input buffer does not overwrite the multi-byte or a 1 byte counter of the first input message as disclosed by Yap. One of ordinary skill in the art would have been motivated for the purpose of accelerate hashing algorithm (Yap [0021]). Claims 7 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Schultz (US 20130166514) in view of Yap et al. (US 20090141887, hereinafter Yap) in view of Nelson (US 20220231839) and in further view of Ciet et al. (US 20160119133, hereinafter Ciet). Re. claim 7, Schultz-Yap-Nelson teach the method as recited in claim 6, Schultz-Nelson do not explicitly teach but Ciet teaches the initial message loaded into the input buffer is 56 bytes in length (Ciet [0048]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz-Yap-Nelson to include a messages with 56 byte in length as disclosed by Ciet. One of ordinary skill in the art would have been motivated for the purpose of ensured that input message has a length that is a multiple of a specified block size (Ciet [0048]). Re. claim 20, rejection of claim 19 is included and claim 20 is rejected with the same rationale as applied in claim 7 above. Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Schultz (US 20130166514) in view of Yap et al. (US 20090141887, hereinafter Yap) and in further view of Brickell (US 20050069135). Re. claim 10, Schultz-Yap teach the method as recited in claim 1, Schultz does not explicitly teach but Brickell teaches further comprising: the first input message loaded into the input buffer comprises a byte configured as a 1-byte counter and the loading, during each iteration of hash computations, of the at least a portion of the digest message directly into the configurable position in the input buffer does not overwrite the 1-byte counter (Brickell teaches After a counter (i) is set, for each iteration, a responder continuously maintains a running hash value based on one or more of the following hash values computed during the iteration: Hash(v), Hash(y), Hash(z_y), Hash(z_x), Hash(z), Hash(t) and Hash(r) (blocks 804, 806, 808, 810, 812) [0089]), the method further comprising: incrementing, in response to completing one of the iterations of the hash computation, the 1-byte counter in the input buffer; or decrementing, in response to completing one of the iterations of the hash computation, the 1-byte counter in the input buffer (Brickell teaches a count (i) of the number of rounds performed is set to an initial value (e.g., i=1) and is subsequently adjusted (i.e., incremented or decremented) to ensure that the desired number of rounds are performed [0075]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz to include the first input message loaded into the input buffer comprises a byte configured as a 1-byte counter and the loading, during each iteration of hash computations, of the at least a portion of the digest message directly into the configurable position in the input buffer does not overwrite the 1-byte counter, the method further comprising: incrementing, in response to completing one of the iterations of the hash computation, the 1-byte counter in the input buffer; or decrementing, in response to completing one of the iterations of the hash computation, the 1-byte counter in the input buffer as disclosed by Brickell. One of ordinary skill in the art would have been motivated for the purpose of ensuring that the desired number of rounds are performed (Brickell [0075]). Re. claim 11, Schultz-Yap-Brickell teach the method as recited in claim 10, Brickell further teaches wherein the 1-byte counter of the first input message is assigned a value in a range of 0 to 255 at initialization (Brickell teaches a count (i) of the number of rounds performed is set to an initial value (e.g., i=1) and is subsequently adjusted (i.e., incremented or decremented) to ensure that the desired number of rounds are performed [0075]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz to include wherein the 1-byte counter of the first input message is assigned a value in a range of 0 to 255 at initialization as disclosed by Brickell. One of ordinary skill in the art would have been motivated for the purpose of ensuring that the desired number of rounds are performed (Brickell [0075]). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Schultz (US 20130166514) in view of Yap et al. (US 20090141887, hereinafter Yap) in view of Brickell (US 20050069135) and in further view of Sarangdhar et al. (US 20130159727, hereinafter Sarangdhar). Re. claim 13, Schultz-Yap-Brickell teach the method as recited in claim 10, Schultz-Yap-Brickell do not explicitly teach but Sarangdhar teaches wherein the 1-byte counter starts at a value configured for hash-based signature verification (Sarangdhar teaches if the command is authenticated (e.g., if it includes the correct signature signed using the HMAC key), the counter value is returned to the platform interconnect, along with the aforementioned authentication credentials (e.g., a nonce, signature), 340. The platform interconnect may use the counter value in a secure ME firmware execution environment if the nonce and signature are verified to be correct, 350 again using the Operational HMAC Key [0046]). Therefore, it would have been obvious to one or ordinary skill in the art before the effective filing date of the claimed invention to modify the method and system disclosed by Schultz-Yap-Brickell to include wherein the 1-byte counter starts at a value configured for hash-based signature verification as disclosed by Sarangdhar. One of ordinary skill in the art would have been motivated for the purpose of protecting threats from accessing the counter (Sarangdhar [0053]). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Suresh (US 20190319799) discloses apply a hash-based signature scheme to the message using a private key to generate the signature comprising a public key, or a verification logic to verify a signature received in association with the message, the verification logic to apply the hash-based signature scheme to verify the signature using the public key, and an accelerator logic to apply a structured order to at least one set of inputs to the hash-based signature scheme. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN A AYALA whose telephone number is (571)270-3912. The examiner can normally be reached Monday-Thursday 8AM-5PM; Friday: Variable EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jorge Ortiz-Criado can be reached at 571-272-7624. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEVIN AYALA/Primary Examiner, Art Unit 2496
Read full office action

Prosecution Timeline

Apr 08, 2024
Application Filed
Mar 18, 2026
Non-Final Rejection mailed — §103, §112
Jun 02, 2026
Applicant Interview (Telephonic)
Jun 08, 2026
Examiner Interview Summary
Jun 09, 2026
Response Filed
Aug 17, 2026
Final Rejection mailed — §103, §112 (current)

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5y 7m to grant Granted Sep 15, 2026
Patent 12706757
USER DEVICE FOR ACQUIRING VERIFIABLE CLAIMS, SYSTEM INCLUDING SAID USER DEVICE, AND METHOD FOR ACQUIRING VERIFIABLE CLAIMS
2y 7m to grant Granted Aug 11, 2026
Patent 12683757
ADAPTIVE COUNTERMEASURE FOR BIT LEAKAGE IN LATTICE-BASED CRYPTOGRAPHY
3y 6m to grant Granted Jul 14, 2026
Patent 12659143
METHOD AND DEVICE FOR CORRECTING POLARIZATION DISTORTION OF FARADAY ROTATOR MIRROR FOR QUANTUM KEY DISTRIBUTION IN COMMUNICATION SYSTEM
3y 3m to grant Granted Jun 16, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
63%
Grant Probability
92%
With Interview (+28.4%)
3y 5m (~12m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 182 resolved cases by this examiner. Grant probability derived from career allowance rate.

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