DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Note by the Examiner
For clarity, references to specific claim numbers are presented in bold. Cited claim limitations are presented in bold the first time they are associated with a particular prior art disclosing the cited limitations, and subsequent reference to the already disclosed claim limitations are presented un-bolded. Certain elements from prior art which are not required by the claims are also presented bolded if they are particularly pertinent to understanding how the references are being combined. Item-to-item matching and examiner explanations for 102 &/or 103 rejections are provided in parenthesis.
Election/Restrictions
Applicant's election with traverse of Invention I, drawn to a display substrate, in the reply filed on 07/31/2026 is acknowledged. The traversal is on the ground(s) that Applicant does not agree that the combination of Song et al. and Jin et al. teach the common technical featur. This is not found persuasive because no specific reason was provided that supports the disagreement.
The requirement is still deemed proper and is therefore made FINAL.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: line A-A' in Fig. 13 (see [0032]); line B-B' in Fig. 4 (see [0033]); lines F-F', G-G', H-H', and I-I' in Fig. 13 (see . Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “40” in Fig. 14 has been used to designate both a fourth conductive layer and some source/drain electrode. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 6 is objected to because of the following informalities: in the fourth line of the claim it says "the first side surface and the second side surface is connected". For proper grammar, "is" should be "are". Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 recites the limitation "a second top surface" in the third line of the claim. However, there is no previous first top surface of the second conductive sub-portion claimed and so is indefinite. For examination purposes, “second top surface of the second conductive sub-portion” will be called “top surface of the second conductive sub-portion”. Due to their dependency, claims 2, 3, 5, 7, and 8 are also rejected.
Claim 5 recites the limitation "a third top surface" in the second line of the claim. However, there is no previous first or second top surface of the buffer layer claimed and so is indefinite. For examination purposes, “third top surface of the buffer layer” will be called “top surface of the buffer layer”. Due to their dependency, claims 7 and 8 are also rejected.
Claim 6 recites the limitation "the protruding portion" in the second line of the claim. There is insufficient antecedent basis for this limitation in the claim.
Claim 7 recites the limitation "a second bottom surface" in the third line of the claim. However, there is no previous first bottom surface of the second conductive sub-portion claimed and so is indefinite. For examination purposes, “second bottom surface of the second conductive sub-portion” will be called “bottom surface of the second conductive sub-portion”. Due to its dependency, claim 8 is also rejected.
Claim 8 recites the limitation "a third bottom surface" in the second line of the claim. However, there is no previous first or second bottom surface of the second conductive portion claimed and so is indefinite. For examination purposes, “third bottom surface of the second conductive portion” will be called “bottom surface of the second conductive portion”.
Claim 10 recites the limitation "the other end" in the thirteenth line of the claim. There is insufficient antecedent basis for this limitation in the claim. Due to their dependency, claims 11-18 are also rejected.
Claim 11 recites the limitation "the orthographic projection of the first conductive via hole on the base substrate at least partially overlaps with an orthographic projection of one of the first source region and the first drain region on the base substrate" in the ninth to eleventh lines of the claim. This is indefinite because, previously stated in claim 10, “an orthographic projection of a part of the first conductive via hole on the base substrate at least partially overlaps with an orthographic projection of a first conductive sub-portion of the first conductive connection portion on the base substrate” draws to the at least one conductive via hole VH in Fig. 14, which does not overlap one of the first source region and the first drain region. For examination purposes, “the first conductive via hole” will be called “a second conductive via hole”. Due to their dependency, claims 12-18 are also rejected.
Claim 13 recites the limitation "the other end" in the thirteenth line of the claim. There is insufficient antecedent basis for this limitation in the claim. Claim 13 also recites the limitation "the at least one conductive via hole comprises a second conductive via hole" in the . Because there is already a second conductive via hole claimed in claim 11, for examination purposes the second conductive via hole will be renamed third conductive via for sake of clarity. Claim 13 also recites the limitation "an orthographic projection of a part of the second conductive via hole on the base substrate at least partially overlaps with an orthographic projection of a first conductive sub-portion of the second conductive connection portion on the base substrate," in the ninth to eleventh lines of the claim. This is indefinite because, in order to be consistent with what is shown, the second conductive connection portion can’t be part of the first conductive portion and also fulfill this limitation. The second conductive connection portion can’t be part of the first conductive portion because the first conductive portion is only a portion of the first conductive layer and can’t be in two separate and unconnected places at once. Due to their dependency, claims 14-18 are also rejected.
Claim 14 recites the limitation "a third source region, a third drain region" in the fifth and sixth lines of the claim. However, there is no previous second source and drain regions claimed and so is indefinite. For examination purposes, “a third source region, a third drain region” will be called “a ”. Claim 14 also recites the limitation “the orthographic projection of the second conductive via hole on the base substrate at least partially overlaps with an orthographic projection of one of the third source region and the third drain region on the base substrate” in the ninth to eleventh lines of the . This is indefinite as it is not shown that the same via hole overlaps both a second source/drain region and a first conductive sub-portion of the second conductive connection portion on the base substrate. For examination purposes, this “the second conductive via hole” will be called “a fourth conductive via hole”. Due to their dependency, claims 15-18 are also rejected.
Claim 16 recites the limitation "the other end" in the fourteenth line of the claim. There is insufficient antecedent basis for this limitation in the claim. Because there is already a third conductive via hole claimed in claim 13 and a fourth conductive via hole claimed in claim 14, for examination purposes the third conductive via hole will be renamed fifth conductive via for sake of clarity. Claim 16 also recites the limitation “the orthographic projection of the third conductive via hole on the base substrate at least partially overlaps with an orthographic projection of one of the two first conductive sub-portions of the third conductive connection portion on the base substrate” in the ninth to . This is indefinite because, in order to be consistent with what is shown, the third conductive connection portion can’t be part of the first conductive portion and also fulfill this limitation. The third conductive connection portion can’t be part of the first conductive portion because the first conductive portion is only a portion of the first conductive layer and can’t be in two separate and unconnected places at once. Due to their dependency, claims 17-18 are also rejected.
Claim 17 recites the limitation “an orthographic projection of the fourth conductive transfer portion on the base substrate at least partially overlaps with the orthographic projection of the third conductive connection portion on the base substrate” in the . This is indefinite because, in order to be consistent with what is shown, the third conductive connection portion can’t be the same conductive connection portion and also fulfill the limitation. The third conductive connection portion is only one portion and can’t be in two separate and unconnected places at once.
Claim 18 recites the limitation "the other end" in the thirteenth line of the claim and the thirty-fourth line of the claim. There is insufficient antecedent basis for this limitation in the claim. Because there is already a fourth conductive via hole claimed in claim 14 and a fifth conductive via hole claimed in claim 16, for examination purposes the fourth conductive via hole will be renamed sixth conductive via and the fifth conductive via hole will be renamed seventh conductive via for sake of clarity. Claim 18 also recites the limitations “the first conductive portion comprises a fourth conductive connection portion in the first conductive layer” and “an orthographic projection of the fifth conductive transfer portion on the base substrate at least partially overlaps with an orthographic projection of the fourth conductive connection portion on the base substrate” in the . This is indefinite because in order to be consistent with what is shown, the fourth conductive connection portion can’t be part of the first conductive portion and also fulfill this limitation. The fourth conductive connection portion can’t be part of the first conductive portion because the first conductive portion is only a portion of the first conductive layer and can’t be in two separate and unconnected places at once.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-4, 6, 9-11, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Embodiment Fig. 4 of Song et al. (Pub. No.: CN 111508976 A), hereinafter as Embodiment 2 of Song, in view of Embodiment Fig. 6 of Song et al., hereinafter as Embodiment 3 of Song, further in view of Jin et al. (Pub. No.: US 2025/0107356 A1), hereinafter as Jin.
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Image A: close up of Song Fig. 2 showcasing pixel units and axis.
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Image B: close up of Song Fig. 6 showcasing various conductive portions.
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Image C: close up of Song Fig. 6 showcasing difference in conductive sub-portion thickness and axis.
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Image D: close up of Jin Fig. 2 showcasing shielding layer.
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Image E: close up of Song Fig. 6 showcasing various surfaces.
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Image F: closeup of Song Fig. 6 showcasing second via hole.
With regards to claim 1, Embodiment 2 of Song teaches a display substrate, comprising: a base substrate (see Song Fig. 4, third substrate 360; Song [0054]); a plurality of pixel units (see Image A, pixel units) provided on the base substrate (see Song [0054]: “As shown in FIG. 4, each sub-pixel P of the substrate 31 described above includes a plurality of light-emitting devices arranged in an array on the third substrate 360, and a driving circuit disposed on the third substrate 360.”), wherein the plurality of pixel units are arranged in an array in a first direction and a second direction (see Image A, x and y directions), and at least one of the plurality of pixel units comprises a plurality of sub-pixels (see Song Fig. 2, sub-pixels P; Song [0048]), at least one of the plurality of sub-pixels comprises a light-emitting element (see Song [0054]: “As shown in FIG. 4, each sub-pixel P of the substrate 31 described above includes a plurality of light-emitting devices arranged in an array on the third substrate 360… The light-emitting devices include an anode 361, a light-emitting functional layer 362, and a cathode 363.”) and a pixel driving circuit configured to drive the light-emitting element (see Song [0054]: “As shown in FIG. 4, each sub-pixel P of the substrate 31 described above includes a plurality of light-emitting devices arranged in an array on the third substrate 360, and a driving circuit disposed on the third substrate 360. The driving circuit includes a plurality of thin-film transistors 311.”; where one would have some of the thin-film transistors 311 to be the driving circuit and other thin-film transistors 311 to be driving transistors.), the first direction (see Image A, x-direction) intersecting with the second direction (see Image A, y-direction), wherein the pixel driving circuit comprises at least one transistor (see Song Fig. 4, thin-film transistors 311; Song [0054]).
Embodiment 2 of Song does not teach a first conductive layer provided on the base substrate; a buffer layer provided on a side of the first conductive layer away from the base substrate; a semiconductor layer provided on a side of the buffer layer away from the base substrate; a first insulation layer provided on a side of the semiconductor layer away from the base substrate; and a second conductive layer provided on a side of the first insulation layer away from the base substrate, wherein the pixel driving circuit comprises at least one transistor and a storage capacitor, the at least one transistor comprises a source and a drain, the storage capacitor comprises a first capacitor electrode and a second capacitor electrode opposite to each other, one of the first capacitor electrode and the second capacitor electrode is in the first conductive layer, and the source and the drain of the at least one transistor are in the second conductive layer; wherein the display substrate comprises a first conductive portion in the first conductive layer and a second conductive portion in the second conductive layer, and an orthographic projection of the first conductive portion on the base substrate at least partially overlaps with an orthographic projection of the second conductive portion on the base substrate; wherein the display substrate further comprises at least one conductive via hole and at least one conductive plug in the at least one conductive via hole, the at least one conductive via hole passing through at least the first insulation layer, and the second conductive portion is electrically connected to the first conductive portion through the at least one conductive plug; and wherein the first conductive portion comprises a first conductive sub-portion and a second conductive sub-portion, an orthographic projection of the first conductive sub-portion on the base substrate at least partially overlaps with an orthographic projection of the at least one conductive via hole on the base substrate, and a thickness of the first conductive sub-portion in a third direction is greater than a thickness of the second conductive sub-portion in the third direction, the third direction being perpendicular to a plane defined by the first direction and the second direction.
Embodiment 3 of Song teaches a base substrate (see Song Fig. 6, substrate 10; Song [0056]); a first conductive layer (see Song Fig. 6, first conductive layer 311 and conductive protrusion 312; Song [0056]) provided on the base substrate (see Song Fig. 6); a buffer layer (see Song Fig. 6, dielectric layer 313; Song [0056]) provided on a side of the first conductive layer away from the base substrate (see Song Fig. 6); a semiconductor layer (see Song Fig. 6, active layer 3151; Song [0064]) provided on a side of the buffer layer away from the base substrate (see Song Fig. 6); a first insulation layer (see Song Fig. 6, interlayer dielectric layer 3155; Song [0072]) provided on a side of the semiconductor layer away from the base substrate (see Song Fig. 6); and a second conductive layer (see Song Fig. 6, first electrode 3152 and second electrode 3153; Song [0067]&[0068]) provided on a side of the first insulation layer away from the base substrate (see Song Fig. 6); at least one transistor (see Song Fig. 6, thin film transistor 315; Song [0064]) and a storage capacitor (see Song Fig. 6, gate 3150 and electrode 3156; and see Song [0075]: “As shown in Figures 6 and 7, the thin-film transistor 315 also includes an electrode 3156 constituting a capacitor.”), the at least one transistor comprises a source (see Song Fig. 6, first electrode 3152) and a drain (see Song Fig. 6, second electrode 3153), the storage capacitor comprises a first capacitor electrode (see Song Fig. 6, gate 3150; Song [0070]) and a second capacitor electrode (see Song Fig. 6, electrode 3156; Song [0075]) opposite to each other (see Song Fig. 6), and the source and the drain of the at least one transistor are in the second conductive layer (see Song Fig. 6); wherein the display substrate comprises a first conductive portion in the first conductive layer (see Image B, first conductive portion) and a second conductive portion in the second conductive layer (see Image B, second conductive portion), and an orthographic projection of the first conductive portion on the base substrate at least partially overlaps with an orthographic projection of the second conductive portion on the base substrate (see Image B); wherein the display substrate further comprises at least one conductive via hole (see Song Fig. 6, first via 3130; Song [0076]) and at least one conductive plug in the at least one conductive via hole (see Song Fig. 6, second conductive layer 314; Song [0074]), the at least one conductive via hole passing through at least the first insulation layer (see Song Fig. 6), and the second conductive portion is electrically connected to the first conductive portion through the at least one conductive plug (see Song Fig. 6); and wherein the first conductive portion comprises a first conductive sub-portion (see Image B, first conductive sub-portion) and a second conductive sub-portion (see Image B, second conductive sub-portion), an orthographic projection of the first conductive sub-portion on the base substrate at least partially overlaps with an orthographic projection of the at least one conductive via hole on the base substrate (see Image B), and a thickness of the first conductive sub-portion in a third direction (see Image C, z-direction) is greater than a thickness of the second conductive sub-portion in the third direction (see Image C), the third direction being perpendicular to a plane defined by the first direction and the second direction (see Image C).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to substitute the layers below anode 361 of Embodiment 2 of Song with the display substrate taught by Embodiment 3 of Song in order to include a shielding layer (first conductive layer) to control electric fields and improve connection between the shielding layer and the transistor.
Embodiment 2 of Song and Embodiment 3 of Song do not teach that one of the first capacitor electrode and the second capacitor electrode is in the first conductive layer.
Jin teaches a storage capacitor (see Jin [0055]: “The groove extending portion 123, the capacitor electrode layer 23 and the source electrode 24 at least partially overlap to form a storage capacitor.”) comprising a first capacitor electrode (see Jin Fig. 2, groove extending portion 123; Jin [0054]) and a second capacitor electrode (see Jin Fig. 2, capacitor electrode layer 23; Jin [0055]) opposite to each other (see Jin Fig. 2), one of the first capacitor electrode and the second capacitor electrode is in a first conductive layer (see Image D, shielding layer; and see Jin [0054]: “and the shielding layer may further include a groove extension 123,”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the storage capacitor of Embodiments 2 and 3 of Song with the storage capacitor taught by Jin in order to increase capacitance and simplify the manufacturing process (see Jin [0055]: "The three-layer structure of the shielding layer, the capacitor electrode layer and the source electrode forms the stacked capacitor layer 23, which not only reduces the mask manufacturing process and improves the production efficiency, but also can use a smaller area to form a larger capacity capacitor thus increasing the capacitance, while increasing the aperture ratio of the product, which is more conducive to achieving higher resolution.")
Together, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach a storage capacitor comprising a first capacitor electrode (see Jin Fig. 2, capacitor electrode layer 23) and a second capacitor electrode (see Image B, first conductive connection portion) opposite to each other (see Jin Fig. 2 and Image B), one of the first capacitor electrode and the second capacitor electrode is in the first conductive layer (see Song Fig. 6, first conductive layer 311 and conductive protrusion 312).
With regards to claim 2, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach the display substrate according to claim 1, wherein the first conductive sub-portion (see Image B) comprises a first top surface (see Image E) away from the base substrate (see Song Fig. 6, substrate 10), the second conductive sub-portion (see Image B) comprises a top surface (see Image E) away from the base substrate (see Image E and Song Fig. 6), and the first top surface is further away from the base substrate than the top surface in the third direction (see Image C, z-direction; and see Image E).
With regards to claim 3, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach the display substrate according to claim 2, wherein the first conductive sub-portion (see Image B) comprises a protruding portion (see Song Fig. 6, conductive bump 312; Song [0074]), the protruding portion protrudes towards the at least one conductive via hole (see Song Fig. 6, first via 3130) relative to the top surface (see Image E) of the second conductive sub-portion (see Image B), and the at least one conductive plug (see Song Fig. 6, second conductive layer 314) is in contact with at least a part of the first top surface (see Image E) of the first conductive sub-portion (see Image E and Song Fig. 6).
With regards to claim 4, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach the display substrate according to claim 1, wherein: the buffer layer (see Song Fig. 6, dielectric layer 313) exposes at least a part of the first conductive sub-portion (see Song Fig. 6 and Image B); and/or the buffer layer covers the second conductive sub-portion (see Song Fig. 6 and Image B).
With regards to claim 6, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach the display substrate according to claim 4, wherein: a protruding portion (see Song Fig. 6, conductive bump 312; Song [0074]) comprises a first side surface (see Image E) and a second side surface (see Image E), the first side surface and the second side surface are on opposite sides of the first top surface (see Image E), and the first side surface and the second side surface is connected through the first top surface (see Image E); and the buffer layer (see Song Fig. 6, dielectric layer 313) is in contact with a top surface (see Image E) of the second conductive sub-portion (see Image B), the first side surface and the second side surface (see Image E), and the buffer layer covers the top surface of the second conductive sub-portion, the first side surface and the second side surface (see Image E).
With regards to claim 9, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach the display substrate according to claim 1, wherein: the first conductive portion (see Image B) comprises a first conductive connection portion (see Image B) in the first conductive layer (see Song Fig. 6, first conductive layer 311 and conductive protrusion 312), and at least a part of the first conductive connection portion serves as the second capacitor electrode (see Jin Fig. 2 and Image B, where the first electrode (Jin’s capacitor electrode layer 23) would overlap Song’s first conductive connection portion thus making at least part of it the second capacitor electrode.); the second conductive portion (see Image B) comprises a first conductive transfer portion (see Image B) in the second conductive layer (see Song Fig. 6, first electrode 3152 and second electrode 3153); and an orthographic projection of the first conductive transfer portion on the base substrate falls within an orthographic projection of the first conductive connection portion on the base substrate (see Image B).
With regards to claim 10, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach the display substrate according to claim 9, wherein the at least one conductive via hole (see Song Fig. 6, first via 3130) comprises a first conductive via hole (see Song Fig. 6, first via 3130), and the at least one conductive plug (see Song Fig. 6, second conductive layer 314) comprises a first conductive plug (see Song Fig. 6, second conductive layer 314) in the first conductive via hole (see Song Fig. 6); the orthographic projection of the first conductive transfer portion on the base substrate at least partially overlaps with an orthographic projection of the first conductive via hole on the base substrate (see Song Fig. 6); and an orthographic projection of a part of the first conductive via hole on the base substrate at least partially overlaps with an orthographic projection of a first conductive sub-portion (see Image E) of the first conductive connection portion on the base substrate (see Image B), one end of the first conductive plug is electrically connected to the first conductive sub-portion of the first conductive connection portion (see Image B), and another end of the first conductive plug is electrically connected to the first conductive transfer portion (see Image B).
With regards to claim 11, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach the display substrate according to claim 10, wherein the at least one transistor (see Song Fig. 6, thin film transistor 315) comprises a driving transistor (see Song [0054]: “As shown in FIG. 4, each sub-pixel P of the substrate 31 described above includes a plurality of light-emitting devices arranged in an array on the third substrate 360, and a driving circuit disposed on the third substrate 360. The driving circuit includes a plurality of thin-film transistors 311.” where thin film transistor 315 of Embodiment 3 of Song have replaced the thin-film transistors 311 of Embodiment 2 of Song. So, one would have some of the thin film transistors 315 to be the driving circuit and other thin film transistors 315 to be driving transistors.), and the driving transistor comprises a channel region (see Song Fig. 6, channel region 3151c; Song [0072]); the display substrate further comprises a first semiconductor portion (see Song Fig. 6, first conductor region 3151a, second conductor region 3151b, and channel region 3151c; Song [0072]) in the semiconductor layer (see Song Fig. 6, active layer 3151), the first semiconductor portion comprises a first source region (see Song Fig. 6, first conductor region 3151a), a first drain region (see Song Fig. 6, second conductor region 3151b) and the channel region of the driving transistor (see Song Fig. 6), and the first source region and the first drain region are on opposite sides of the channel region of the driving transistor, respectively (see Song Fig. 6); the orthographic projection of a second conductive via hole (see Image F) on the base substrate at least partially overlaps with an orthographic projection of one of the first source region and the first drain region on the base substrate (see Song Fig. 6); and the one of the first source region and the first drain region is electrically connected to the first conductive transfer portion through the second conductive via hole (see Image F).
With regards to claim 22, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach a display apparatus (see Song [0046]: “As shown in Figure 1, the main structure of the display device includes a frame 1, a cover plate 2, a display panel 3, and a circuit board 4, as well as other accessories.”), comprising the display substrate according to claim 1 (see Song Fig. 6 and Jin Fig. 2).
Claims 5, 7, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Embodiment 2 of Song, Embodiment 3 of Song, and Jin, in view of Yong (Patent No.: US 11107839 B2).
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Image G: close up of Yong Fig. 17 showcasing top surfaces.
With regards to claim 5, Embodiment 2 of Song, Embodiment 3 of Song, and Jin teach the display substrate according to claim 2, wherein the buffer layer (see Song Fig. 6, dielectric layer 313) comprises a top surface (see Image E) away from the base substrate (see Song Fig. 6, substrate 10).
Embodiment 2 of Song, Embodiment 3 of Song, and Jin do not teach that the first top surface of the first conductive sub-portion is substantially flush with a part of the top surface adjacent to the first conductive sub-portion.
Yong teaches a first conductive portion (see Yong Fig. 6, first connection portion 210 and via 141; Yong col. 4, ln. 46 and Yong col. 6, ln. 49) that comprises a first conductive sub-portion (see Yong Fig. 6, via 141; Yong col. 6, ln. 49) and that a first top surface (see Image G) of the first conductive sub-portion is substantially flush with a part of a top surface (see Image G) of a buffer layer (second insulating layer 140; Yong col. 6, ln. 12) adjacent to the first conductive sub-portion (see Yong Fig. 17 and Image G).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the thickness of the buffer layer of Embodiment 2 of Song, Embodiment 3 of Song, and Jin so that it is flush with the first conductive sub-portion as taught by Yong in order to simplify and improve processing the display substrate.
With regards to claim 7, Embodiment 2 of Song, Embodiment 3 of Song, Jin, and Yong teach the display substrate according to claim 5, wherein the first conductive sub-portion (see Image B) comprises a first bottom surface (see Image E) proximate to the base substrate (see Song Fig. 6, substrate 10), the second conductive sub-portion (see Image B) comprises a bottom surface (see Image E) proximate to the base substrate (see Image E and Song Fig. 6), and the first bottom surface is substantially flush with the bottom surface in the third direction (see Image C, z-direction; and see Image E).
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Image H: close up of Song Fig. 6 showcasing first distance and depth.
With regards to claim 8, Embodiment 2 of Song, Embodiment 3 of Song, Jin, and Yong teach the display substrate according to claim 7, wherein the second conductive portion (see Image B) comprises a bottom surface (see Image E) proximate to the base substrate (see Song Fig. 6, substrate 10); at a position adjacent to the at least one conductive via hole (see Song Fig. 6, first via 3130), the bottom surface of the second conductive portion is spaced apart from the top surface (see Image E) of the second conductive sub-portion (see Image B) by a first distance (see Image H) in the third direction (see Image C, z-direction), and a depth (see Image H) of the at least one conductive via hole in the third direction is less than the first distance (see Image H).
Allowable Subject Matter
Claims 12-18 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112, set forth in this Office action and if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner's statement of reasons for the indication of allowable subject matter: The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to disclose or suggest the claimed invention having: “The display substrate according to claim 11, wherein the first conductive portion comprises a second conductive connection portion in the first conductive layer, the display substrate further comprises a sensing signal line, and the second conductive connection portion is electrically connected to the sensing signal line; the second conductive portion comprises a second conductive transfer portion in the second conductive layer; and an orthographic projection of the second conductive transfer portion on the base substrate at least partially overlaps with an orthographic projection of the second conductive connection portion on the base substrate.” as recited in claim 12. Claims 13-18 depend on claim 12, and therefore also include said claimed limitation.
Conclusion
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/E.T.B./Examiner, Art Unit 2818
/CUONG B NGUYEN/Primary Examiner, Art Unit 2818
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