CTNF 18/701,955 CTNF 82640 DETAILED ACTION This office action is responsive to application 18/701,955 filed on April 17, 2024. Claims 1-19 are pending in the application and have been examined by the Examiner. Information Disclosure Statement The Information Disclosure Statement (IDS) filed on April 17, 2024 was received and has been considered by the Examiner. Priority 02-26 AIA Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claims 5, 6, 8, 9 and 13-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 8 recites “the pixel separation section”. However, no pixel separation section is previously recited in claim 8 or the parent claim 1. Therefore, it is unclear what this recitation is referring to. As such, claim 8 is deemed indefinite by the Examiner. Claim 9 is indefinite as depending from claim 8 and not remedying the deficiencies of claim 8. In claim 5, it is unclear what is meant by “(111)”, “<1-12>” and “<110>”. As such, this claim is deemed indefinite by the Examiner. Claim 6 is indefinite as depending from claim 5 and not remedying the deficiencies of claim 5. In claims 13-15, it is unclear what is meant by “(111)”, “<1-12>” and “<110>”. As such, these claims are deemed indefinite by the Examiner. Due to the indefinite nature of claims 13-15, the Examiner is unable to determine whether a prior art rejection of these claims is appropriate at this time. Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim s 1, 7-12 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Izukashi (WO 2020/054545) in view of Sambongi et al. (US 2022/0116532). US 2021/0327940 is assumed to be a valid English translation of WO 2020/054545, and citations herein refer thereto . Consider claim 1, Izukashi teaches: A solid-state image capturing apparatus (figure 3) comprising: a semiconductor substrate (first substrate, 30) in which multiple pixels are disposed in a matrix (“The first substrate 30 includes the two or more sensor pixels 11 on a semiconductor substrate 31. The two or more sensor pixels 11 are provided in a matrix at positions opposing a back surface (a light receiving surface 31A) of the semiconductor substrate 31.” paragraph 0047), wherein each of the multiple pixels (11, see figure 3) is provided with a photoelectric conversion unit (photodiode, PD) that generates charge according to photoelectric conversion based on light incident on a light-receiving surface of the semiconductor substrate (“The photodiode PD performs photoelectric conversion on light L having entered via the light receiving surface 31A.” paragraph 0053), a charge accumulating unit (charge holding section, MEM) that accumulates the charge generated by the photoelectric conversion unit (“The first transfer transistor TRX transfers the charge from the photodiode PD to the charge holding section MEM.” paragraph 0054), a transfer transistor (first transfer transistor, TRX) that transfers charge from the photoelectric conversion unit (PD) to the charge accumulating unit (“The first transfer transistor TRX transfers the charge from the photodiode PD to the charge holding section MEM.” paragraph 0054) and has a vertical gate electrode (vertical gate electrode, VG) that reaches the photoelectric conversion unit (PD, see figure 3, paragraph 0054), and a light-blocking section (light blocking section, 53) that is formed by a trench (trench, H3, cavity, 58, paragraph 0093) disposed within a layer between the light-receiving surface (31A) and the charge accumulating unit (MEM) and blocks light that is incident via the light-receiving surface (31A) from being incident on the charge accumulating unit (“The light-blocking section 53 blocks entry, into the charge holding section MEM, of the light L having entered via the light receiving surface 31A at a part other than the opening 53H.” see figure 3, paragraph 0080). Izukashi does not explicitly teach that an amount of cover by the light-blocking section with respect to the charge accumulating unit is corrected according to an image height of a position where the pixel is disposed. Sambongi et al. similarly teaches a solid-state image capturing apparatus (figure 3) having a plurality of pixels (AF pixels, 11, paragraph 0055), wherein each pixel (see figure 7) includes a light-blocking section (light-shielding portion, 43, paragraph 0055). However, Sambongi et al. further teaches, “If the position of the first AF pixel 11 differs, that is, the image height differs, the incident angle of the light incident to the first AF pixel 11 differs.” paragraph 0066. Because of this, Sambongi et al. teaches adjusting an amount of cover by the light-blocking section according to an image height of a position where the pixel is disposed (“The area of the light-shielding portion 43L differs depending on the image height in order to block the second light flux 62 of the light incident at the incident angle that differs depending on the image height.” paragraphs 0066, 0068, 0084, 0085 and figures 5-7.). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have amount of cover of the light-blocking section covering the charge accumulating unit taught by Izukashi be corrected according to an image height of a position where the pixel is disposed as taught by Sambongi for the benefit of enabling the blocking of light flux of incident light that differs depending on the image height (Sambongi, paragraphs 0066 and 0068). Consider claim 7, and as applied to claim 1 above, Izukashi further teaches that the light-blocking section (53) has an opening through which the vertical gate electrode (VG) penetrates (“The metal embedded section 53A has an opening 53H which the vertical gate electrode VG runs through.” paragraph 0083). Consider claim 8, and as applied to claim 1 above, Izukashi further teaches that the light-blocking section (53) has an opening through which the vertical gate electrode (VG) penetrates (“The metal embedded section 53A has an opening 53H which the vertical gate electrode VG runs through.” paragraph 0083), and of a pixel separation section (52A, 55A, figure 3). Sambongi teaches that the opening of the light-blocking section (43) is shifted according to image height (see figures 6 and 7, claim 1 rationale). As such, the combination of Izukashi and Sambongi teaches that the opening is shifted with respect to the pixel separation section. Consider claim 9, and as applied to claim 8 above, Izukashi does not explicitly teach that the opening of the light-blocking section is shifted. Sombongi teaches that the amount the opening of the light-blocking section is shifted increases as the opening in the light-blocking section is away from an image height center (see figures 6 and 7). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have amount of cover of the light-blocking section covering the charge accumulating unit taught by Izukashi be shifted according to an image height of a position where the pixel is disposed as taught by Sambongi for the benefit of enabling the blocking of light flux of incident light that differs depending on the image height (Sambongi, paragraphs 0066 and 0068). Consider claim 10, Izukashi teaches: A solid-state image capturing apparatus (figure 3) comprising: a semiconductor substrate (first substrate, 30) in which multiple pixels are disposed in a matrix (“The first substrate 30 includes the two or more sensor pixels 11 on a semiconductor substrate 31. The two or more sensor pixels 11 are provided in a matrix at positions opposing a back surface (a light receiving surface 31A) of the semiconductor substrate 31.” paragraph 0047), wherein each of the multiple pixels (11, see figure 3) is provided with a photoelectric conversion unit (photodiode, PD) that generates charge according to photoelectric conversion based on light incident on a light-receiving surface of the semiconductor substrate (“The photodiode PD performs photoelectric conversion on light L having entered via the light receiving surface 31A.” paragraph 0053), a charge accumulating unit (charge holding section, MEM) that accumulates the charge generated by the photoelectric conversion unit (“The first transfer transistor TRX transfers the charge from the photodiode PD to the charge holding section MEM.” paragraph 0054), a transfer transistor (first transfer transistor, TRX) that transfers charge from the photoelectric conversion unit (PD) to the charge accumulating unit (“The first transfer transistor TRX transfers the charge from the photodiode PD to the charge holding section MEM.” paragraph 0054) and has a vertical gate electrode (vertical gate electrode, VG) that reaches the photoelectric conversion unit (PD, see figure 3, paragraph 0054), a first light-blocking section (light blocking section, 53) that is formed by a trench (trench, H3, cavity, 58, paragraph 0093) disposed within a layer between the photoelectric conversion unit (PD) and the charge accumulating unit (MEM) and blocks light that is incident via the light-receiving surface (31A) from being incident on the charge accumulating unit (“The light-blocking section 53 blocks entry, into the charge holding section MEM, of the light L having entered via the light receiving surface 31A at a part other than the opening 53H.” see figure 3, paragraph 0080), and a second light-blocking section (light-blocking section, 56) that is formed by a trench (trench, H2, cavity, 57) disposed within a layer between the light-receiving surface (31A) and the first light-blocking section (53, see figure 3) and blocks light that is incident via the light-receiving surface (31A) from being incident on the charge accumulating unit (“The light-blocking section 56 blocks, together with the light-blocking section 53, the entry, into the charge holding section MEM, of the light L having entered via the light receiving surface 31A.” paragraph 0080). However, Izukashi does not explicitly teach that amounts of cover by the first and second light-blocking sections with respect to the charge accumulating unit are corrected according to an image height of a position where the pixel is disposed. Sambongi et al. similarly teaches a solid-state image capturing apparatus (figure 3) having a plurality of pixels (AF pixels, 11, paragraph 0055), wherein each pixel (see figure 7) includes a light-blocking section (light-shielding portion, 43, paragraph 0055). However, Sambongi et al. further teaches, “If the position of the first AF pixel 11 differs, that is, the image height differs, the incident angle of the light incident to the first AF pixel 11 differs.” paragraph 0066. Because of this, Sambongi et al. teaches adjusting an amount of cover by the light-blocking section according to an image height of a position where the pixel is disposed (“The area of the light-shielding portion 43L differs depending on the image height in order to block the second light flux 62 of the light incident at the incident angle that differs depending on the image height.” paragraphs 0066, 0068, 0084, 0085 and figures 5-7.). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have amounts of cover of the first and second light-blocking sections with respect to the charge accumulating unit taught by Izukashi be corrected according to an image height of a position where the pixel is disposed as taught by Sambongi for the benefit of enabling the blocking of light flux of incident light that differs depending on the image height (Sambongi, paragraphs 0066 and 0068). Consider claim 11, and as applied to claim 10 above, Izukashi further teaches a pixel separation section (device separators 51, 52, 54, and 55) that is connected to the first light-blocking section (53) and the second light-blocking section (56) and electrically and optically separates adjacent pixels (see figure 3, paragraph 0069). Consider claim 12, and as applied to claim 11 above, Izukashi further teaches that the first and second light-blocking sections (53, 56) are formed by trenches (57, 58) that extend in a direction orthogonal to the pixel separation section (51, 52, 54, 55, see figure 3). Consider claim 16, and as applied to claim 10 above, Izukashi further teaches that the first light-blocking section (53) has an opening through which the vertical gate electrode (VG) penetrates (“The metal embedded section 53A has an opening 53H which the vertical gate electrode VG runs through.” paragraph 0083) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 2-4 and 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims . 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: Consider claim 2, the prior art of record does not teach nor reasonably suggest that the photoelectric conversion unit is, according to the image height, shifted and disposed in a predetermined direction with respect to the charge accumulating unit, in combination with the other elements recited in parent claim 1. Claims 3 and 4 contain allowable subject matter as depending from claim 2. Consider claim 17, the prior art of record does not teach nor reasonably suggest that the second light-blocking section is shifted, according to the image height, with respect to the opening in the first light-blocking section, in combination with the other elements recited in parent claims 10 and 16. Claims 18 and 19 contain allowable subject matter as depending from claim 17 . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Miyanami et al. (US 2021/0249456) teaches an imaging device including two light shielding portions (see figure 9C). Kato et al. (US 2016/0126266) teaches changing a location of an opening in a light shielding portion of vertically aligned pixel (see figures 3-5). Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALBERT H CUTLER whose telephone number is (571)270-1460. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALBERT H CUTLER/Primary Examiner, Art Unit 2637 Application/Control Number: 18/701,955 Page 2 Art Unit: 2637 Application/Control Number: 18/701,955 Page 3 Art Unit: 2637 Application/Control Number: 18/701,955 Page 5 Art Unit: 2637 Application/Control Number: 18/701,955 Page 6 Art Unit: 2637 Application/Control Number: 18/701,955 Page 7 Art Unit: 2637 Application/Control Number: 18/701,955 Page 8 Art Unit: 2637 Application/Control Number: 18/701,955 Page 9 Art Unit: 2637 Application/Control Number: 18/701,955 Page 10 Art Unit: 2637 Application/Control Number: 18/701,955 Page 11 Art Unit: 2637 Application/Control Number: 18/701,955 Page 12 Art Unit: 2637 Application/Control Number: 18/701,955 Page 13 Art Unit: 2637
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