DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3-6, 11 and 14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gruening et al. (EP 1235334).
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With respect to claim 1, Gruening discloses a Gate unit (fig. 1) for controlling a gate commutated thyristor (21) (Fig. 1 element 8) ,comprising:- a voltage selector (26)(Fig. 1, elements 1, 2 3 and 4) for selectively applying a high supply potential (Vpos) (Fi.g 1, potential of 7) , a middle supply potential (Vmid) (fig. 13, potential output by 311) , and a low supply potential (Vneg) (fig.1, potential of 6) ; - a nonlinear inductor (27) (fig. 13, element 356) serially coupled between the output of the voltage selector (26) (fig. 13, at output of 311); - a gate control unit (23) (9) configured to control the voltage selector (26) (Fig. 1, elements 1, 2 3 and 4) to control switching of the gate commutated thyristor (21) (Fig. 1 element 8) in its turn-on state comprising a turn-on pulse generation, a positive-gate-voltage backporch operation, a negative-gate-voltage backporch operation and a retrigger pulse generation (see fig. 2); wherein the nonlinear inductor (27) (fig. 13, element 356) has a nonlinearity to have a high inductance during any of the backporch operations and to have a low inductance during the turn-on pulse generation and retrigger pulse generation (See [0075]-[00767]).
With respect to claim 3, the circuit above discloses the Gate unit (22) (fig. 1) according to claim 1, wherein the voltage selector (26) (Fig. 1, elements 1, 2 3 and 4) is configured as a transistor (fig. 13 of D1 is a transistor switched voltage selector) switched voltage selector such as a three level NPC circuit.
With respect to claim 4, the circuit above disclose the Gate unit (22) (fig. 1) according to claim 1, wherein the gate control unit (23)(9) is configured to control the voltage selector (26) (Fig. 1, elements 1, 2 3 and 4) for the positive-gate-voltage backporch operation by controlling an inductor current through the nonlinear inductor (27) (fig. 13, element 356) via pulses generated by applying two supply potentials in an alternating manner as long as a measured gate-to- cathode voltage of the gate commutated thyristor (21) (Fig. 1 element 8)is positive. (see fig 5, D1)
With respect to claim 5, the circuit above discloses the Gate unit (22) (fig. 1) according to claim 1, wherein the gate control unit (23) (9) is configured to control the voltage selector (26) )(Fig. 1, elements 1, 2 3 and 4) for the negative-gate-voltage backporch operation by controlling an inductor current through the nonlinear inductor (27) (fig. 13, element 356) via pulses generated by applying two supply potentials in an alternating manner as long as a measured gate-to- cathode voltage of the gate commutated thyristor (21) (Fig. 1 element 8) is negative.
With respect to claim 6, the circuit above discloses the Gate unit (22) (fig. 1) according to claim 1, wherein a turn-off stage (28) (see element 1 in fig 1 of D1) is provided configured to apply the negative supply potential (Vneg) (from 6) to selectively turn off the gate commutated thyristor (21) (Fig. 1 element 8).
With respect to claim 11, the circuit above disclose the Integrated gate commutated thyristor comprising a gate commutated thyristor (21) (Fig. 1 element 8) and the gate unit (22) (fig. 1) according to claim 1.
With respect to claim 14, the circuit above produces a method for operating a gate commutated thyristor (21) (Fig. 1 element 8) using a gate unit (22) () according to claim 1.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 2, 8-9 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gruening et al. (EP 1235334).
With respect to claim 2, Gruening discloses a Gate unit (22) (fig. 1) according to claim 1, wherein the gate control unit (23) (9) is configured to operate switching of the gate commutated thyristor (21) (Fig. 1 element 8) but fails to explicitly disclose the control unit is configured to operate the thyristor in soft-switching mode, particularly in a zero voltage switching mode or a zero current switching mode.
It would have been obvious at the time the invention was made to a person having ordinary skill in the art to do so as operating a gate commutated thyristor in a zero voltage mode or a zero current switching mode is generally known and is common practice applied by the skilled person in the art in order to minimize switching losses. (See Technical Background on page 2 paragraph 2 of the specification “Soft-switching implies additional measures and can be generally realized as zero-current switching (ZCS) or zero-voltage switching (AVS) … Since the switching loss of a device is roughly proportional to the product of the conducting current and blocking voltage both ZVS and ZCS enable very low switching losses for the device.”
With respect to claim 8, the circuit above discloses the Gate unit (22) (fig. 1) according to claim 1, but fail to disclose wherein nonlinearity of the nonlinear inductor (27) is selected so that the low inductance for the turn-on pulse generation has a value at least 50 % lower than the high inductance during the backporch operation.
"[W]hen, as by a recitation of ranges or otherwise, a claim covers several compositions, the claim is ‘anticipated’ if one of them is in the prior art." Titanium Metals Corp. v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985) (citing In re Petering, 301 F.2d 676, 682, 133 USPQ 275, 280 (CCPA 1962)) (emphasis in original) (Claims to titanium (Ti) alloy with 0.6-0.9% nickel (Ni) and 0.2-0.4% molybdenum (Mo) were held anticipated by a graph in a Russian article on Ti-Mo-Ni alloys because the graph contained an actual data point corresponding to a Ti alloy containing 0.25% Mo and 0.75% Ni and this composition was within the claimed range of compositions.). "If the prior art discloses a point within the claimed range, the prior art anticipates the claim." UCB, Inc. v. Actavis Labs. UT, Inc., 65 F.4th 679, 687, 2023 USPQ2d 448 (Fed. Cir. 2023).
With respect to claim 9, the circuit above discloses the Gate unit (22) (fig. 1) according to claim 1, but fails to explicitly disclose comprising a communication channel output to interlink with a control input of another gate unit (22) wherein the gate control unit (23) is configured to propagate a control signal received via the control input through the communication channel output, wherein the control signal includes switching commands for the gate commutated thyristors (21) . It is well known in the art to have communication channels between gate control units of series connected thyristors. It would have been obvious before the effective filing date of the claimed invention to do so for the purpose of duplicating redundancy and/or error correction of the signal.
With respect to claim 12 , the circuit above produces the Converter stage (2) for use in a converter system (1) (intended use) ,comprising an integrated gate commutated thyristors including a gate commutated thyristor (21) (Fig. 1 element 8)and the gate unit (22) according to claim 9, but fails to disclose having multiple integrated gate commutated thyristors wherein one of the gate units (22) (fig. 1) is coupled with a central controller (5)(9) to receive the control signal and at least a part of the other gate units (22)(fig 1) are respectively coupled via its communication channel output with the control input of a further one of the other gate units (22) (fig. 1), so that the control signal is available in all gate units (22(fig. 1)). It is well known in the art to have communication channels between gate control units of series connected thyristors. It is also deemed obvious to duplicate the structure of the gate units. It would have been obvious before the effective filing date of the claimed invention to do so for the purpose of duplicating redundancy and/or error correction of the signal.
Response to Arguments
Applicant's arguments filed 10/20/2025 have been fully considered but they are not persuasive.
With respect to applicant’s argument that Gruening does not anticipate claim 1 because it discloses separate, dedicated hardware stages rather than the integrated system required by claim 1., The Examiner disagrees.
No where in claim 1 or the subsequent claims does it require the gate control unit to be integrated in a single structure. No where in claim 1 is there a requirement of a single voltage selector controlled by a gate control unit as specified in the applicant’s arguments. The Examiner believes the mapping of Gruening reads on the claims as written. In addition, even if the gate control unit were to be required to be integrated in a single structure, it would have been obvious. The courts have held that In re Larson, 340 F.2d 965, 968, 144 USPQ 347, 349 (CCPA 1965) (A claim to a fluid transporting vehicle was rejected as obvious over a prior art reference which differed from the prior art in claiming a brake drum integral with a clamping means, whereas the brake disc and clamp of the prior art comprise several parts rigidly secured together as a single unit. The court affirmed the rejection holding, among other reasons, "that the use of a one piece construction instead of the structure disclosed in [the prior art] would be merely a matter of obvious engineering choice."); As such, the integration of several pieces into one piece as proposed by the applicant would be seen as obvious engineering choice if it was claimed in the claim language.
Allowable Subject Matter
Claims 7 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 7, the prior art of record fails to suggest or disclose keeping the negative supply potential (Vneg) applied by means of the turn off stage while applying the high supply potential (Vpos) or the middle supply potential (Vmid) to increase an inductor current of the nonlinear inductor, while after a given time delay, the turn off stage (28) is deactivated so that the inductor current is fully commutated as gate current ig into a gate terminal (G) of the gate commutated thyristor (21) wherein after an inductor current (ion) has been commutated into the gate terminal (G) ,the middle supply potential (Vmid) is applied.
Here, while it is well known in the art to charge and discharge an inductor in order to obtain a specific result, the specific particular operation of the inductor as such was not found in the prior art of record.
With respect to claim 10, the prior art of record fails to suggest or disclose comprising a communication channel output to interlink with a control input of another gate unit (22) wherein the gate control unit (23) is configured to propagate a control signal received via the control input through the communication channel output, wherein the control signal includes an error signal indicating the occurrence of an error in one of the gate units (22) wherein the gate control unit (23) is further configured to halt operation of the gate unit once an error signal has been received.
Here, although the structure of the interlink is present in many devices the operation of the error signal as particularly specified was not found in the prior art of record.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAREEM E ALMO whose telephone number is (571)272-5524. The examiner can normally be reached M-F (8:00am-4:00pm).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at M-F (8:00am-4:00pm). The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KHAREEM E ALMO/Examiner, Art Unit 2849
/Menatoallah Youssef/SPE, Art Unit 2849