Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 24, 27 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 24 recites “optionally, ... accommodation cavity” i.e. the last paragraph of the claim has “optionally” in front of it, thus it is assumed that the last paragraph is optional and is not a required claim limitation.
Allowable Subject Matter
Claim 6-15, 18, 21 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 27 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-5, 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20220077197 A1) hereafter referred to as Kim in view of Hong et al. (CN 108735094 A) hereafter referred to as Hong
In regard to claim 1 Kim teaches [see “Referring to FIG. 21, the display device 1_5 is different from the embodiment of FIG. 19 in that it further includes a sound generator SPK disposed under a display substrate 10_5” “FIG. 20 is a cross-sectional view of the display device 1_5 of FIG. 19”] a display panel, comprising:
a backplane [“first substrate SUB1”]; and
a plurality of light-emitting units [“light emitting elements ED” “FIG. 4 is a schematic plan view illustrating pixels and a first substrate of a display substrate according to an embodiment” “display area DA may include a plurality of pixels PX. The pixels PX may be arranged in a matrix”] arranged in an array on a side of the backplane, wherein the light-emitting unit comprises a driving portion [“The thin-film transistors of each pixel PX, the scan lines, the data lines, and the power lines of the thin-film transistor layer TFTL may be disposed in the display area DA. The scan control lines and link lines of the thin-film transistor layer TFTL may be disposed in the non-display area NDA”] and a plurality of light-emitting portions [“The light emitting element layer EML may be disposed on the thin-film transistor layer TFTL” “The light emitting element layer EML may include pixels PX (each including first electrodes, light emitting elements, and second electrodes) and a pixel defining layer defining the pixels PX. The light emitting elements may inorganic light emitting layers including an inorganic material”] that are fixed on the backplane;
wherein the backplane is integrated with a plurality of sets of first signal lines [“The thin-film transistor layer TFTL may include not only thin-film transistors of each pixel PX but also scan lines, data lines, power lines, scan control lines, and routing lines connecting pads and the data lines”] and a plurality of sets of second signal lines,
wherein a functional portion is provided [see Fig. 20 “The second holes HA2 may be not only heat dissipation passages through which heat H generated inside the display device 1_5 is released to the outside of the display device 1_5 but also sound transmitting holes through which the sound S generated from the sound generator SPK disposed under the display substrate 10_5 is output to the outside of the display device 1_5”], and the functional portion is a through hole penetrating through the backplane
but does not state :
wherein a set of the first signal lines is electrically connected to each of the light-emitting units arranged along a first direction, and a set of the second signal lines is electrically connected to each of the light-emitting units arranged along a second direction, the first direction being different from the second direction;
wherein the functional portion is provided in a region enclosed by at least part of adjacent first signal lines and at least at least part of adjacent second signal lines.
See Hong Figs. 1-4 see “Please refer to FIG. 1, which shows a schematic diagram of the design A existing with an opening 10 in the display area of the display panel 1. opening 10 is set on the display panel 1 the upper plate surface, namely, removing portion of the display unit corresponding to the position of front camera head in the upper plate surface” “Because the opening 10 is designed to remove part of the display unit, in order to guarantee can normally display the position of the opening 10 other than the need to frame 11 at the data line (data line), the grid line (gate line) and a touch signal line (TPsignal line) and routing to optimize the design” see Fig. 3 shows horizontal and vertical “data line D1-D4 and grid electrode line G1-G4” include “grid electrode line G1-G4 through the corresponding arc line R around opening 20 and right connection, data line D1-D4 can pass through the corresponding routing arc R around the opening 20 at the lower connection”, see that the grid lines and data lines frame the opening.
Thus when the teaching of Hong is applied to Kim Fig. 20, it can be seen that the hole HA2 will be framed by the scan lines, data lines of Kim i.e. the HA2 will fall within a region enclosed by adjacent scan lines, data lines of Kim.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Kim to include wherein a set of the first signal lines is electrically connected to each of the light-emitting units arranged along a first direction, and a set of the second signal lines is electrically connected to each of the light-emitting units arranged along a second direction, the first direction being different from the second direction; wherein the functional portion is provided in a region enclosed by at least part of adjacent first signal lines and at least at least part of adjacent second signal lines.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that gate and data lines are needed to provide connectivity for the light emitting elements ED in the pixels and wherever necessary they have to divert around the openings of Kim.
In regard to claim 2 Kim and Hong as combined teaches [“The thin-film transistors of each pixel PX, the scan lines, the data lines, and the power lines of the thin-film transistor layer TFTL may be disposed in the display area DA”] wherein a set of the first signal lines comprises a plurality of first signal lines, and at least one first signal line of the set of the first signal lines comprises a plurality of first bending structures [see combination see when the teaching of Hong is applied to Kim Fig. 20, it can be seen that the hole HA2 will be framed by the scan lines, data lines of Kim i.e. the HA2 will fall within a region enclosed by adjacent scan lines, data lines of Kim, see Hong teaches arc to go around the holes, see Hong Fig. 3] and a plurality of second bending structures, wherein the plurality of first bending structures and the plurality of second bending structures are alternately arranged [see combination see Hong teaches arc to go around the holes, see Hong Fig. 3 and see that D2/D3 are opposite to each other at the hole, similarly G2/G3] one by one, and an opening of the first bending structure is oriented in an opposite direction to an opening of the second bending structure; wherein the opening of the first bending structure [i.e. see combination, the hole is in between the lines] faces the functional portion.
In regard to claim 3 Kim and Hong as combined teaches wherein at least one of the plurality of light-emitting portions of the light-emitting unit is electrically connected [“The thin-film transistor layer TFTL may include not only thin-film transistors of each pixel PX but also scan lines, data lines, power lines, scan control lines, and routing lines connecting pads and the data lines”] to the first signal line; the opening of the second bending structure faces the light-emitting unit.
In regard to claim 4 Kim and Hong as combined teaches wherein the plurality of light- emitting portions comprise a first [“light emitting elements ED”] light-emitting portion, and the backplane is further integrated with a first pad group [see the electrodes of the TFT in Kim Fig. 20 and “the second electrode CE may receive a common voltage supplied to all pixels PX” are connected to “The thin-film transistors of each pixel PX, the scan lines, the data lines, and the power lines of the thin-film transistor layer TFTL may be disposed in the display area DA”] electrically connected to the first light-emitting portion and a driving pad group [“light emitting elements ED may be disposed on the first insulating layer ILL. A first end of the light emitting elements ED may be connected to the first electrode AE, and a second end of the light emitting elements ED may be connected to the second electrode CE”] electrically connected to the driving portion; wherein the first pad group comprises a first electrode pad and a second electrode pad, [see a person of ordinary skill in the art knows that the scan line controls the gate and data line is the source for the driving TFT of each pixel] wherein the first electrode pad is electrically connected to the second bending structure; andthe driving pad group comprises a first signal output pad [see Kim Fig. 20 “first electrode AE may be electrically connected to the thin-film transistor layer TFTL of the display substrate”] corresponding to the first pad group, wherein the first signal output pad is electrically connected to the second electrode pad in the first pad group.
In regard to claim 5 Kim and Hong as combined teaches wherein the plurality of light- emitting portions further comprise a second [see that the pixels of Kim are an array, see Fig. 20 pixel, see three “light emitting elements ED”] light-emitting portion and a third light-emitting portion, and the backplane is further integrated with a second pad group [see the pad groups and the connections are the same for all the “light emitting elements ED”, see for second and third group limitations below, see the claim 4 first group] electrically connected to the second light-emitting portion and a third pad group electrically connected to the third light-emitting portion; wherein the second pad group comprises a third electrode pad and a fourth electrode pad, and the driving pad group further comprises a second signal output pad corresponding to the second pad group, wherein the second signal output pad is electrically connected to the fourth electrode pad in the second pad group; the third pad group comprises a fifth electrode pad and a sixth electrode pad, and the driving pad group further comprises a third signal output pad corresponding to the third pad group, wherein the third signal output pad is electrically connected to the sixth electrode pad in the third pad group.
In regard to claim 17 Kim and Hong as combined teaches [see Kim “To display full color, each pixel PX may include a plurality of subpixels emitting light of different colors. For example, each pixel PX may include a first subpixel emitting blue light, a second subpixel emitting green light, and a third subpixel emitting red light”] wherein the first light-emitting portion is a red light-emitting portion for emitting red light, the second light-emitting portion is one of a green light-emitting portion for emitting green light and a blue light-emitting portion for emitting blue light, and the third light-emitting portion is the other one of the green light-emitting portion and the blue light- emitting portion.
Claim(s) 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20220077197 A1) hereafter referred to as Kim in view of Hong et al. (CN 108735094 A) hereafter referred to as Hong and further in view of Park (US 20180198052 A1)
In regard to claim 24 Kim teaches a [see “Referring to FIG. 21, the display device 1_5 is different from the embodiment of FIG. 19 in that it further includes a sound generator SPK disposed under a display substrate 10_5” “FIG. 20 is a cross-sectional view of the display device 1_5 of FIG. 19”] display module, comprising:
a box [see housing “Although not illustrated in the drawing, the display device 1_5 may further include a housing, and the sound generator SPK may be disposed in the housing”], a display panel [“The light emitting element layer EML may be disposed on the thin-film transistor layer TFTL” “The light emitting element layer EML may include pixels PX (each including first electrodes, light emitting elements, and second electrodes) and a pixel defining layer defining the pixels PX. The light emitting elements may inorganic light emitting layers including an inorganic material”] disposed [see Fig. 21] on a side of the box, a sound generator [“sound generator SPK may include a speaker”] disposed between the box and the display panel, and
wherein a sound emitting surface of the sound generator faces [see this is true see the sound S in Fig. 21, “second holes HA2 may be not only heat dissipation passages through which heat H generated inside the display device 1_5 is released to the outside of the display device 1_5 but also sound transmitting holes through which the sound S generated from the sound generator SPK disposed under the display substrate 10_5 is output to the outside of the display device 1_5”] the display panel,
a driving control module [“The thin-film transistor layer TFTL may include not only thin-film transistors of each pixel PX but also scan lines, data lines, power lines, scan control lines, and routing lines connecting pads and the data lines” “The thin-film transistors of each pixel PX, the scan lines, the data lines, and the power lines of the thin-film transistor layer TFTL may be disposed in the display area DA. The scan control lines and link lines of the thin-film transistor layer TFTL may be disposed in the non-display area NDA”] in the display panel, and
wherein the display panel comprises:
a backplane [“first substrate SUB1”]; and
a plurality of light-emitting units [“light emitting elements ED” “FIG. 4 is a schematic plan view illustrating pixels and a first substrate of a display substrate according to an embodiment” “display area DA may include a plurality of pixels PX. The pixels PX may be arranged in a matrix”] arranged in an array on a side of the backplane, wherein the light-emitting unit comprises a driving portion [“The thin-film transistors of each pixel PX, the scan lines, the data lines, and the power lines of the thin-film transistor layer TFTL may be disposed in the display area DA. The scan control lines and link lines of the thin-film transistor layer TFTL may be disposed in the non-display area NDA”] and a plurality of light-emitting portions [“The light emitting element layer EML may be disposed on the thin-film transistor layer TFTL” “The light emitting element layer EML may include pixels PX (each including first electrodes, light emitting elements, and second electrodes) and a pixel defining layer defining the pixels PX. The light emitting elements may inorganic light emitting layers including an inorganic material”] that are fixed on the backplane;
wherein the backplane is integrated with a plurality of sets of first signal lines [“The thin-film transistor layer TFTL may include not only thin-film transistors of each pixel PX but also scan lines, data lines, power lines, scan control lines, and routing lines connecting pads and the data lines”] and a plurality of sets of second signal lines,
wherein a functional portion is provided [see Fig. 20 “The second holes HA2 may be not only heat dissipation passages through which heat H generated inside the display device 1_5 is released to the outside of the display device 1_5 but also sound transmitting holes through which the sound S generated from the sound generator SPK disposed under the display substrate 10_5 is output to the outside of the display device 1_5”], and the functional portion is a through hole penetrating through the backplane
[see 112 rejection, see the word “optionally” below means that the following claim limitations are not required limitations]
optionally, a plurality of display panels [see Fig. 20, see that display is a group of pixels each containg colors for the pixel “first through third light exiting areas TA1 through TA3 may be sequentially and repeatedly arranged along the first direction DR1 in the display area DA of the color conversion substrate 20” ] are provided, and the plurality of display panels are arranged in [“light emitting elements ED” “FIG. 4 is a schematic plan view illustrating pixels and a first substrate of a display substrate according to an embodiment” “display area DA may include a plurality of pixels PX. The pixels PX may be arranged in a matrix”] an array;
the box has an accommodation cavity [see housing “Although not illustrated in the drawing, the display device 1_5 may further include a housing, and the sound generator SPK may be disposed in the housing”],
[see 112 rejection, see the word “optionally”, since they are optional, the following limitations are not required] at least one signal access circuit board is provided, and the at least one signal access circuit board and the sound generator are disposed in the accommodation cavity; wherein in a direction parallel to the sound emitting surface of the sound generator, the signal access circuit board is disposed on at least one side of the sound generator in the accommodation cavity
but does not state :
wherein a set of the first signal lines is electrically connected to each of the light-emitting units arranged along a first direction, and a set of the second signal lines is electrically connected to each of the light-emitting units arranged along a second direction, the first direction being different from the second direction; wherein the functional portion is provided in a region enclosed by at least part of adjacent first signal lines and at least at least part of adjacent second signal lines ; and
that the sound generator SPK is stereo, and a signal access circuit board disposed between the box and the display panel, the signal access circuit board is configured to be electrically connected to the driving control module, a surface where the signal access circuit board is disposed intersects with a surface where the display panel is disposed;
See Hong Figs. 1-4 see “Please refer to FIG. 1, which shows a schematic diagram of the design A existing with an opening 10 in the display area of the display panel 1. opening 10 is set on the display panel 1 the upper plate surface, namely, removing portion of the display unit corresponding to the position of front camera head in the upper plate surface” “Because the opening 10 is designed to remove part of the display unit, in order to guarantee can normally display the position of the opening 10 other than the need to frame 11 at the data line (data line), the grid line (gate line) and a touch signal line (TPsignal line) and routing to optimize the design” see Fig. 3 shows horizontal and vertical “data line D1-D4 and grid electrode line G1-G4” include “grid electrode line G1-G4 through the corresponding arc line R around opening 20 and right connection, data line D1-D4 can pass through the corresponding routing arc R around the opening 20 at the lower connection”, see that the grid lines and data lines frame the opening.
Thus when the teaching of Hong is applied to Kim Fig. 20, it can be seen that the hole HA2 will be framed by the scan lines, data lines of Kim i.e. the HA2 will fall within a region enclosed by adjacent scan lines, data lines of Kim.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Kim to include wherein a set of the first signal lines is electrically connected to each of the light-emitting units arranged along a first direction, and a set of the second signal lines is electrically connected to each of the light-emitting units arranged along a second direction, the first direction being different from the second direction; wherein the functional portion is provided in a region enclosed by at least part of adjacent first signal lines and at least at least part of adjacent second signal lines.
Thus it would be obvious to combine the references to arrive at the claimed limitations.
The motivation is that gate and data lines are needed to provide connectivity for the light emitting elements ED in the pixels and wherever necessary they have to divert around the openings of Kim.
Kim and Hong as combined does not state :
that the sound generator SPK is stereo, and a signal access circuit board disposed between the box and the display panel, the signal access circuit board is configured to be electrically connected to the driving control module, a surface where the signal access circuit board is disposed intersects with a surface where the display panel is disposed;
However this is common in the art, see Park Fig. 6, see “OLED display panel 100” “source PCB 272 may be electrically connected to the display panel 100 by a source COF (Chip on Flexible Printed Circuit) (not shown). The source COF, which is connected with a portion of the source PCB 272, may be connected to a lower end of the display panel 100. The source COF may be electrically connected to the source PCB 272 and the TFT of the display panel 100. A data integrated circuit may be mounted as the source COF” see there is a surface where the COF printed circuit contacts the display “source PCB 272 may apply the voltage to the display panel 100 in response to the signals transferred from the interface PCB 274. The source PCB 272 may apply the drive waveform to the display panel 100 in response to the image signals” “The at least one source PCB 272 may include a plurality of source PCBs 272. The plurality of source PCBs 272 may be spaced apart from each other” “cover 300 according to this embodiment supports a marginal portion of the display panel 100 and covers the rear surface of the display panel 100” “The cover 300 supports the marginal portion of the display panel 100. The cover 300 forms an internal space therein, and a sub-speaker 40 for outputting a sound is disposed in the internal space” “The at least one sub-speaker 40 may include two sub-speakers 40, which are spaced apart from each other in the lateral direction in order to output stereo sound”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Kim to include that the sound generator SPK is stereo, and a signal access circuit board disposed between the box and the display panel, the signal access circuit board is configured to be electrically connected to the driving control module, a surface where the signal access circuit board is disposed intersects with a surface where the display panel is disposed; and also (though it is optional) at least one signal access circuit board is provided, and the at least one signal access circuit board and the sound generator are disposed in the accommodation cavity; wherein in a direction parallel to the sound emitting surface of the sound generator, the signal access circuit board is disposed on at least one side of the sound generator in the accommodation cavity.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is stereo sounds better than mono and that a circuit board is useful to apply image signals to the display to utilize the display and that a plurality of source PCB allows more signals to be applied at different places of the display to obtain better display and that the enclosure of the display can also be used to hold the source PCB and the speakers for convenient form/packaging of the display.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM.
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/SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893