Prosecution Insights
Last updated: October 26, 2026
Application No. 18/703,667

SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

Final Rejection §102§103
Filed
Apr 22, 2024
Priority
Nov 01, 2021 — JP 2021-178710 +1 more
Examiner
AHMED, SHAHED
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sony Group Corporation
OA Round
2 (Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
918 granted / 1010 resolved
+22.9% vs TC avg
Minimal -0% lift
Without
With
+-0.1%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
38 currently pending
Career history
1051
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
53.5%
+13.5% vs TC avg
§102
22.2%
-17.8% vs TC avg
§112
17.8%
-22.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1010 resolved cases

Office Action

§102 §103
CTNF 18/703,667 CTNF 89997 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. DETAILED ACTION This action is responsive to application No. 18703667 filed on 4/22/2024. Information Disclosure Statement Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered. Priority 02-26 AIA Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1-17, 19, 24-25 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Yosuke et al. (WO 2021049302 A1) . Regarding independent claim 1 , Yosuke et al. teach a semiconductor device, comprising: a first semiconductor element (Fig. 14, specification discloses image element 220); and a plurality of second semiconductor elements (Fig. 14, specification discloses logic circuit 221 and memory circuit 222) with a circuit configured to process a signal from the first semiconductor element, the first semiconductor element and each of the plurality of second semiconductor elements being stacked and arranged (Fig. 14); and a first film (Fig. 14, specification discloses protective film 241 and/or wiring 242) formed on at least one of the plurality of second semiconductor elements being different in configuration from a second film (Fig. 14, specification discloses oxide element 233) formed on another of the second semiconductor elements. Regarding claim 2 , Yosuke et al. teach wherein the first film is different in type from the second film (element 242 is wiring and element 233 is oxide). Regarding claim 3 , Yosuke et al. teach wherein the first film is different in thickness from the second film (Fig. 14). Regarding claim 4 , Yosuke et al. teach wherein the first film is different in number from the second film (Fig. 14). Regarding claim 5 , Yosuke et al. teach wherein the first film has a stress-regulating function (specification discloses element 241 comprising of silicon nitride or silico oxide). Regarding claim 6 , Yosuke et al. teach wherein the first film has a compressive stress-regulating function and contains at least one selected from the group consisting of SiN, SiO2, TiN, TaN, and SiGe epitaxial layers (specification discloses element 241 comprising of silicon nitride or silico oxide). Regarding claim 7 , Yosuke et al. teach wherein the first film has a tensile stress-regulating function and contains at least one selected from the group consisting of SiN and AlO (specification discloses element 241 comprising of silicon nitride or silico oxide). Regarding claim 8 , Yosuke et al. teach wherein the first film contains a high melting point metal material (specification discloses metal such as copper (Cu), tungsten (W), or aluminum (Al)). Regarding claim 9 , Yosuke et al. teach wherein the first film contains at least one selected from the group consisting of SiON, AIN, Si, Ge, Mo, W, Ti, Ta, MoSi, WSi, and TiSi (specification discloses metal such as copper (Cu), tungsten (W), or aluminum (Al)). Regarding claim 10 , Yosuke et al. teach wherein the first film has an oxygen-regulating function (specification discloses wiring can be formed of polysilicon). Regarding claim 11 , Yosuke et al. teach wherein the first film has an oxygen-absorbing function and contains at least one selected from the group consisting of polysilicon, amorphous silicon, and SiGe (specification discloses wiring can be formed of polysilicon). Regarding claim 12 , Yosuke et al. teach wherein the first film has an oxygen supply function and contains at least one selected from the group consisting of aluminum, silicon, and hafnium and also contains at least one selected from the group consisting of an oxide film, a nitride film, and an oxynitride film (the specification discloses elements 241/242 comprising aluminum and nitride). Regarding claim 13 , Yosuke et al. teach wherein the first film has an oxygen diffusion prevention function and contains at least one selected from the group consisting of boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, bismuth, niobium, tungsten, titanium, molybdenum, copper, ruthenium, nickel, or tantalum and also contain at least one selected from the group consisting of an oxide film, a nitride film, an oxynitride film, a metal, and an alloy (specification discloses metal such as copper (Cu), tungsten (W), or aluminum (Al)). Regarding claim 14 , Yosuke et al. teach wherein the first film has a hydrogen-regulating function (specification discloses metal such as copper (Cu), tungsten (W), or aluminum (Al)). Regarding claim 15 , Yosuke et al. teach wherein the first film has a hydrogen-absorbing function and contains at least one selected from the group consisting of Ti, Zr, Pd, V, Ta, Fe, Co, Ni, Cr, Pt, Cu, Ag, La, Th, Y, Nb, Hf, Sc, Lu, Ru, Rh, Ir, Os, and Mg (specification discloses metal such as copper (Cu), tungsten (W), or aluminum (Al)). Regarding claim 16 , Yosuke et al. teach wherein the first film has a hydrogen supply function and contains at least one selected from the group consisting of silicon nitride, silicon oxide, oxidized silicon carbide, HSQ, an organic film, TEOS, BPSG, BSG, PSG, FSG, carbon-containing silicon nitride, and amorphous silicon (specification discloses element 241 comprising of silicon nitride or silico oxide). Regarding claim 17 , Yosuke et al. teach wherein the first film has a hydrogen diffusion prevention function and contains at least one selected from the group consisting of silicon nitride, silicon oxynitride, low dielectric constant carbon-containing silicon oxide, silicon carbide, aluminum oxide, aluminum, tungsten, erbium oxide, a TiAl alloy, a nitride of a TiAl alloy, amorphous silicon, and SiC (the specification discloses elements 241/242 comprising aluminum and nitride). Regarding claim 19 , Yosuke et al. teach wherein the first semiconductor element, each of the plurality of second semiconductor elements, and the first semiconductor element are stacked and arranged in this order (Fig. 14). Regarding claim 24 , Yosuke et al. teach an electronic device (Fig. 14, specification discloses image pick element 211) comprising the semiconductor device. Regarding claim 25 , Yosuke et al. teach a method for manufacturing a semiconductor device, comprising: joining a first semiconductor element (Fig. 14, specification discloses image element 220) and each of a plurality of second semiconductor elements (Fig. 14, specification discloses logic circuit 221 and memory circuit 222) with a circuit configured to process a signal from the first semiconductor element; forming first films (Fig. 14, specification discloses protective film 241 and/or wiring 242) on each of the plurality of second semiconductor elements; and patterning (Fig. 16 discloses the patterning step) the first films so that the first films should remain on at least one of the plurality of second semiconductor elements . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 18, 20-22 are rejected under 35 U.S.C. 103 as being unpatentable over Yosuke et al. (WO 2021049302 A1) . Regarding claim 18 , Yosuke et al. teach wherein a plurality of the first semiconductor elements are stacked and arranged (The number of first semiconductor elements is an obvious design choice that a person skilled in the art could set as appropriate taking into consideration the functionality, dimensions etc. of the device. See In re Japikse , 181 F.2d 1019, 86 USPQ 70 (CCPA 1950)). Regarding claim 20 , Yosuke et al. teach a plurality of third semiconductor elements with a circuit configured to process a signal from the first semiconductor element, wherein each of the plurality of second semiconductor elements, the first semiconductor element, and each of the plurality of third semiconductor elements are stacked and arranged in this order (Fig. 14 discloses the stacked structure. Adding third semiconductor elements in a stacked configuration is an obvious design choice that a person skilled in the art could set as appropriate taking into consideration the functionality, dimensions etc. of the device. See In re Japikse , 181 F.2d 1019, 86 USPQ 70 (CCPA 1950)). Regarding claim 21 , Yosuke et al. teach wherein the first semiconductor element, each of the plurality of second semiconductor elements, and each of the third semiconductor elements are stacked and arranged in this order (Fig. 14 discloses the stacked structure. Adding third semiconductor elements in a stacked configuration is an obvious design choice that a person skilled in the art could set as appropriate taking into consideration the functionality, dimensions etc. of the device. See In re Japikse , 181 F.2d 1019, 86 USPQ 70 (CCPA 1950)). Regarding claim 22 , Yosuke et al. teach wherein each of the plurality of second semiconductor elements is different in orientation in plan view from each of the plurality of third semiconductor elements (the orientation of the third semiconductor elements in a stacked configuration is an obvious design choice that a person skilled in the art could set as appropriate taking into consideration the functionality, dimensions etc. of the device. See In re Japikse , 181 F.2d 1019, 86 USPQ 70 (CCPA 1950)) . 07-21-aia AIA Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Yosuke et al. (WO 2021049302 A1) in view of Haba (US 12,322,718) Regarding claim 23 , Yosuke et al. teach all of the limitations as discussed above. Yosuke et al. do not explicitly disclose further comprising a support substrate. Haba teaches a semiconductor device comprising electronic component that is mounted to a carrier or a substrate (Col. 1, lines 21-22). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Yosuke et al. according to the teachings of Haba with the motivation to “provide further mechanical support and/or protection for the bonded structure” (Col. 1, lines 22-26). Cited Prior Art The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAHED AHMED/ Primary Examiner, Art Unit 2813 Application/Control Number: 18/703,667 Page 2 Art Unit: 2813 Application/Control Number: 18/703,667 Page 3 Art Unit: 2813 Application/Control Number: 18/703,667 Page 4 Art Unit: 2813 Application/Control Number: 18/703,667 Page 5 Art Unit: 2813 Application/Control Number: 18/703,667 Page 6 Art Unit: 2813 Application/Control Number: 18/703,667 Page 7 Art Unit: 2813 Application/Control Number: 18/703,667 Page 8 Art Unit: 2813 Application/Control Number: 18/703,667 Page 9 Art Unit: 2813 Application/Control Number: 18/703,667 Page 10 Art Unit: 2813
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Prosecution Timeline

Apr 22, 2024
Application Filed
May 18, 2026
Non-Final Rejection mailed — §102, §103
Aug 11, 2026
Response Filed
Aug 19, 2026
Interview Requested
Aug 26, 2026
Examiner Interview Summary
Aug 26, 2026
Applicant Interview (Telephonic)
Oct 19, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
91%
With Interview (-0.1%)
1y 11m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1010 resolved cases by this examiner. Grant probability derived from career allowance rate.

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