Detailed Action
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The Office Action is in response to claims filed on 6/12/2024 where claims 1-9 and 11-21 are pending and ready for examination.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The information disclosure statement (IDS) submitted on 10/30-/2024 is in compliance with the provisions of 37 CFR 1.97. The information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 and 9, 11-14, and 19-21 are rejected under 35 USC 103 as being unpatentable over Basso (2015/0341265) in view of Herrera (US 11,831,743)
Regarding claim 9. Basso discloses an apparatus for a staged parsing of a message, wherein a message to be parsed comprises a header, and the apparatus comprises:
a memory for storing a computer program (Basso; see e.g. [0049] – [0055]); and
a processor; wherein the processor is configured to execute the computer program stored in the memory to (Basso; see e.g. [0049] – [0055]):
perform, based on parsing configuration information: header information, a header type of a next layer to be parsed in the message and an offset address for a next stage of parsing, (Basso; Basso within the context of parsing teaches a next header field;
see e.g. [0029] “ ... parses ...”
see e.g. [0028] – [0030]
see e.g. [0033] A next header field provides information about a header immediately following a current header. The information may include a header code, that is, a decimal value (or hex value) corresponding to an extension header 410. For example, a header code of 0 indicates that the following header is a hop-by-hop extension header. As another example, a header code of 43 indicates that the following header is a routing extension header. Such information allows the frame 400 to form a chain of extension headers 410 (as illustrated by the arrows connecting next headers 407, 412, and 417
see e.g. [0038 At step 625, if the next header is an extension header, the controller 305 determines whether the extension header is in the skip list 320. If so, then the method returns to step 615, the controller 305 obtains the next header from the next header field of the extension header. The controller 305 also obtains the header length of the current extension header. Once obtained, the controller 305 iterates to the header identified in the next header field..
Basso describes an IPv6 packet including a fixed header contained source and destination address fields and a next header field that identifies the header immediately following the current header in the packet (see e.g. [0032] – [0033]). Because the next header field identifies the location of the subsequent header within the packet header chain, the parser advances to that packet location to continue parsing, Accordingly, the location of the subsequent header in the packet header chain realizes an offset address for a next stage of processing.);
skip parsing of the header and proceed to parsing (Basso; Basso withing the context of parsing messages teaches skipping;
see e.g. [0014]
see e.g. [0037] –[0039]);
perform parsing of the header based on the offset address when the header type of the next layer is the header type to be parsed (Basso;
see e.g. [0033], [0038]); and
stop parsing of the header (Basso; Basso teaches header in the skip list are skipped until a header to be processed is reached and parsing continues through headers until no additional extension headers remain
see e.g. [0040] “... each subsequent header in the frame until the frame type (e.g., whether the frame is TCP or UDP) is identified);
see e.g. [0014])
Basso does not expressly disclose:
n-th stage and N being a maximum number of parsing stages of the header
However in analogous art Herrera discloses:
n-th stage and N being a maximum number of parsing stages of the header (Herrera within the context of parsing teaches parsing with respect to several stages (n-th stage) and where N is a maximum number of stages;
see e.g. Abstract “... the number of stages ...”
see e.g. Column 7, Lines 5 – 24 “The EFPC 350 includes, in the depicted example, Stages 1-n arranged in a pipeline to extract selected field values from header fields, which may be predetermined in accordance with the specification derived from high-level language (HLL) (e.g., P4) commands defined by the user. Respectively, each of the n stage ...
the stage HSID circuits 350a-350n each select a correct one or more of the speculatively extracted fields, which may be received from the SFEC 345, to determine length, offset, and transition information that define the size, location and sequences of headers in the packet and fields of interest in the headers. After any stage HSID circuit has resolved the length, offset, and transition information for that stage, it passes that information to the next stage HSID circuit in the pipeline so that that next stage can determine its header length, offset, and transition information.”
see e.g. Fig. 3 illustrating a maximum number of N stages comprising n-th stages.
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Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Herrera’s parsing pipeline comprising stages with a maximum number of N stages. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of parsing algorithms.
Basso in view of Herrera discloses:
perform, based on parsing configuration information, an n-th stage of parsing of the header to obtain a parsing result in the n-th stage, wherein when n is less than N, the parsing result in the n-th stage comprises: header information parsed in the n-th stage, a header type of a next layer to be parsed in the message and an offset address for a next stage of parsing, N being a maximum number of parsing stages of the header (The combined solution provides for parsing with respect to Herrera’s n-th stage where n maybe less than N and where N is maximum number of parsing stages as detailed above;
see e.g. Herrera, Column 7, Lines 5 – 24)
skip an (n+1)-th stage of parsing of the header and proceed to an (n+2)-th stage of parsing when the header type of the next layer is not a header type to be parsed in the (n+1)-th stage (The combined solution as Herrera discloses a staged header parsing architecture including sequential parsing stages up to an N-th stage, while Basso discloses determining a header type of the next layer during parsing and, based on that determination, skipping parsing of a header when the header type is designated to be skipped . Accordingly, , when the parsing performed in the stage preceding the final stage identifies a header that is not to be parsed , the system determines that the subsequent stage corresponding to the header is skipped, thereby satisfying the condition that protocol parsing in the (n-1)th layer determines that the end stage of parsing is to be skipped).
perform the (n+1)-th stage of parsing of the header based on the offset address when the header type of the next layer is the header type to be parsed in the (n+1)-th stage (The combined solution provides for once the header type of the next layer identified by Basso is a header to be parsed, the parser proceeds to parse that header at the offset location identified during the prior parsing step (Basso, [0033], [0038]) within the staged parsing architecture of Herrera); and
stop a staged parsing of the header when an N-th stage of parsing is completed or when a protocol parsing in an (N-1)-th layer determines that the N-th stage of parsing is to be skipped (Herrera discloses a finite parsing pipeline (Stage 1 ... Stage N). When the last stage completes parsing ends. That directly corresponds to stopping parsing when the end stage of parsing is completed see e.g. Herrera, Fig.3;
Accordingly, when the header type identified during parsing indicates a header that should be skipped , the parser bypasses parsing of that header, as disclosed by Basso’s skip list that specifies extension headers to skip during parsing (Basso, [0014], [0030]) within the staged parsing architecture of Herrera (see e.g. Fig. 3).
Regarding claim 11, claim 11 comprises the same and/or similar subject matter as claim 9 and is considered an obvious variation; therefore it is rejected under the same rationale.
.Regarding claim 12. Basso in view of Herrera disclose the apparatus of claim 9, wherein the parsing configuration information comprises field parsing information and stage transition information, and the processor is further configured to:
parse a header field in the header based on the field parsing information for the n-th stage and a header type to be parsed in the n-th stage, wherein the header field comprises: a frame type, a header length, a header number and/or a mask (The combined solution per Basso (see e.g. [0038] “... header length) ; and
query the stage transition information for the n-th stage based on the header field, to determine the header type of the next layer to be parsed and the offset address for the next stage of parsing (The combined solution as Basso ([0032] – [0033] discloses parsing packet headers including fields such as source and destination addresses and a next header filed that provides information about the header immediately following the current header in the packet header chain. The parser reads the header field to determine the header type of the next layer to be parsed and proceeds accordingly through the header chain. Herrera discloses taged staged packet parsing in which parsing operations occurs across multiple stages. Accordingly, in the combined solution, the parsed header field information that determines the next header in the packet operates as the impetus for transitioning from the current parsing stage to the next parsing which is equivalent to querying the stage transition information for the n-th stage to determine the header type of the next layer to be parsed.)
Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Herrera’s parsing pipeline comprising stages with a maximum number of N stages. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of parsing algorithms.
Regarding claim 13, Basso in view of Herrera disclose the apparatus of claim 12, wherein the processor is further configured to:
match the header field to be parsed in the header with a header field table for the (n+1)-th stage when perform the (n+1)-th stage of parsing (The combined solution as Basso discloses a skip list 320 that specifies which IPv6 extension headers should be skipped and that the controller identifies entries in the skip list based on the value of the extension header encountered during parsing (Basso [0030]). Thus, the header field obtained from the packet header is compared against entries contained in the skip list during parsing. Herrera discloses staged packet parsing, and therefore in the combined solution the comparison of the parsed header field against entries in the slip list functions as matching the header field with entries of a header field table for the subsequent parsing stage); and
parse a content of the header field to be parsed in the header when the header field to be parsed in the header is a valid field contained in the header field table for the (n+1)- th stage (The combined solution as Basso discloses parsing packet headers and using header field values such as the next header field identifying the following header in the packet header chain (Basso;[0032] – [0033]). While Herrera discloses staged parsing operations across multiple parsing stages. Accordingly, the combined solution, when the header field corresponds to a valid header entry used for staged parsing, the parser proceeds to parse the content of that header filed as part of the subsequent parsing stage)
Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Herrera’s parsing pipeline comprising stages with a maximum number of N stages. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of parsing algorithms.
Regarding claim 14, Basso in view of Herrera disclose the apparatus of claim 13, wherein the processor is further configured to: stop the (n+1)-th stage of parsing when the header field to be parsed in the header is an invalid field that is not contained in the header field table for the (n+1)-th stage (The combined solution per Herrera (Column 15, Lines 3- 48) as Herrera discloses that a decoder circuit generates a valid or invalid signal in response to stage transition information, which is used to enable or disable the output of header information for a parsing stage. Thus when the header information for a stage is determined to be invalid, the output corresponding to that header is disabled, thereby preventing further parsing at that stage in the combined solution with Basso’s staged header parsing, this valid/invalid determination provides the mechanism by which parsing of the subsequent sage may be stopped when the header filed is invalid, as indicated by the stage transition information).
Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Herrera’s parsing pipeline comprising stages with a maximum number of N stages. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of parsing algorithms.
Regarding claim 19, claim 19 comprises the same and/or similar subject matter as claim 12 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 20, claim 20 comprises the same and/or similar subject matter as claim 13 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 21, claim 21 comprises the same and/or similar subject matter as claim 14 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 1, claim1 comprises the same and/or similar subject matter as claim 9 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 2, claim 2 comprises the same and/or similar subject matter as claim 12 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 3, claim 3 comprises the same and/or similar subject matter as claim 13 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 4, claim 4 comprises the same and/or similar subject matter as claim 14 and is considered an obvious variation; therefore it is rejected under the same rationale.
Claims 5-8 and 15-18 are rejected under 35 USC 103 as being unpatentable over Basso in view of Herrera and in further view of Beshai (20040213291)
Regarding claim 15, Basso in view of Herrera disclose the apparatus of claim 9, Basso does not expressly disclose, wherein the processor is further configured to:
segment a received data packet into a plurality of data segments based on a preset length when the received data packet is larger than a message length that can be processed by the staged parsing;
start the staged parsing of the header from a first data segment in the plurality of data segments; and concatenate parsing results of the staged parsing of the plurality of data segments to obtain a parsing result of the header.
However in analogous art Beshai disclose:
segmentation and concatenation (Beshai;
see e.g. [0092] FIG. 10 shows the main steps followed upon receiving a data segment belonging to stream k (destination k, for example). When a packet is received and segmented into plain segments in a conventional manner by circuit 530 (FIG. 5 and FIG. 6), the plain segments are processed individually. The stream identifier k and the payload length, L, of the plain segment (which excludes the null padding) are determined. The four fields C(0, k), C(1, k), C(2, k) and C(3, k) corresponding to entries 911, 912, 914, and 916 in structure 910 of FIG. 9 are read simultaneously from memory "C". A value C(2, k) of 0 indicates that there is no fractional segment belonging to stream k. Thus, in step 1010, if C(2, k) is determined to be zero, control is transferred to step 1020, otherwise, control is transferred to step 1030. In step 1020, if the length L is determined to equal a predefined segment length (256 octets in this example), the segment is stored directly in memory "B" (array 930) which is organized as interleaved link lists (step 1024). (Interleaved linked lists are well known in the art and are not described here. Basically, they allow dynamic sharing of a memory by X>1 data streams using X insertion pointers and X removal pointers.) Otherwise, if in step 1020 the value of L is determined to be less than a full-segment length, the fractional segment is placed in position k in array 920 of memory "A" (step 1022). Note that, at this point, the position k in array 920 is vacant since C(2, k) has been determined to be zero. The fractional segment will remain in memory "A" until it is either concatenated with a forthcoming segment of the same stream k, or is prompted a specified number of times, Q=C(0, k), by the rate controller, whichever takes place first. When a fractional segment is prompted Q times, it is qualified for transfer regardless of its content. If, on the other hand, the entry C(2, k) is found in step 1010 to be greater than zero, the enqueueing controller 830 (FIG. 8) concludes that there is a waiting fractional segment belonging to stream k. The arriving segment, whether complete or fractional, is then concatenated with the existing fractional segment (step 1030). In step 1032, if the result equals or exceeds a full segment, a full segment is appended directly to a corresponding queue in memory "B" (array 930) which can hold several interleaved queues, each belonging to a sink node. If the remainder of concatenation is greater than zero, the remainder is placed back in position k in array 920 of memory "A" (step 1035). If the remainder is zero, corresponding entries C(1, k) and C(2, k) in array 910 are set equal to zero (step 1033) to indicate to a future arriving segment that there is no waiting fractional segment belonging to stream k. (The interleaved linked lists are addressed independently but they share the same memory device”)
Therefore it would have been prima facie obvious before the effective filing date of the claimed invention to incorporate Beshia’s segmentation and concatenation scheme. The motivation being the combined solution provides for implanting a known technique resulting in increased efficiencies in parsing algorithms.
Basso in view of Herrera and in further view of Beshai disclose:
segment a received data packet into a plurality of data segments based on a preset length when the received data packet is larger than a message length that can be processed by the staged parsing (The combined solution per Beshai as Beshai ([0092) discloses that when a packet is received it is segmented into segments of a predetermined length and that segments are processed individually. Thus, the packet is divided into multiple segments based on length when the packet exceeds the predefined segment size) ;
start the staged parsing of the header from a first data segment in the plurality of data segments (Bass and Herrera disclose staged parsing of packet headers, and in the combined solution the header contained in the first segment of the segmented packet is parsed as the initial input to the staged parsing architecture); and
concatenate parsing results of the staged parsing of the plurality of data segments to obtain a parsing result of the header (The combined solution provides for concatenating parsing results of the staged parsing of the plurality of data segments. Beshai discloses that fractional segments are concatenated with subsequent segments when additional segments of the same stream arrive ([0092]). Thus the results associated with multiple segments are combined through concatenation, which corresponds to concatenating the results obtained from the staged parsing of the plurality of segments).
Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Herrera’s parsing pipeline comprising stages with a maximum number of N stages. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of parsing algorithms.
Regarding claim 16, Basso in view of Herrera and in further view of Beshai disclose The apparatus of claim 15, wherein the processor is further configured to: when performing the (n+1)-th stage of parsing on a current data segment, in response to determining that a field to be parsed is partially located in a next data segment based on the offset address for the next stage of parsing, a header length corresponding to the header type of the next layer and a parsing length indicated by the field parsing information for the (n+1)-th stage, perform the (n+1)-th stage of parsing based on the current data segment in combination with the next data segment(Basso and Herrera disclose staged parsing based on header information and offset addressing for the next parsing stage, while Beshai discloses segmentation of packets into multiple segments and concatenation of segments when data spans segment boundaries ([0092])Thus when a field extends across segment boundaries, the staged parsing operation may proceed using both the current segment and the next segment)
Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Herrera’s parsing pipeline comprising stages with a maximum number of N stages. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of parsing algorithms.
Regarding claim 17, Basso in view of Herrera and in further view of Beshai disclose the apparatus of claim 16, wherein the processor is further configured to:
perform the (n+1)-th stage of parsing on the current data segment based on the offset address to obtain a first field part indicating a parsing result in the (n+1)-th stage, and determining that the (n+1)-th stage of parsing has not been completed (The combined solution provides for performing the (n+1) -th stage of parsing on the current data segment based on the offset address to obtain a first field part indicating a parsing result in the (n+1)-th stage and determining that the (n+1+=th stage and determining that the (n+1+-stage of parsing has not been completed. Basso inv view of Herrera discloses staged parsing of header fields using offset addressing to determine the location of fields using offset addressing to determine the location of the fields to be parsed in subsequent stages. When segmentation occurs as disclosed by Beshai ([0092]), the staged parser may obtain a portion of the filed from the current data segment, thereby producing a first field part while recognizing that the filed extends beyond the current segment and that parsing of the stage has not yet been completed);
continue the (n+1)-th stage of parsing on the next data segment based on a length of the first field part and the header length corresponding to the header type of the next layer after the parsing of the next data segment proceeds to the (n+1)-th stage in which the parsing has not been completed, to obtain a second field part indicating the parsing result in the (n+1)-th stage (The combined solution provides continuing the (n-1)-th stage of parsing on the next data segment based on the length of the first field part and the header length corresponding to the header type of the next layer after the parsing of the next data segment proceeds to the (n+1_-th stage in which the parsing has not been completed, to obtain a second field part indicating the parsing result in the (n+1)-th stage, Basso and Herrera disclose staged parsing based on header information and header length values used to determine subsequent parsing operations, while Beshai ([0092]) discloses segmented packet processing when additional segments of the same stream are processed after the first segment. Thus the stage parser continues parsing on the next data segment to obtain the remaining portion of the field); and
concatenate the second field part behind the first field part to obtain the parsing result in the (n+1)-th stage(The combined solution per Beshai ([0092]) discloses concatentating fractional segments when subsequent segments arrive. Accordingly, portions of the parsed field obtained from different segments may be combined to form the complete parsing result).
Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Herrera’s parsing pipeline comprising stages with a maximum number of N stages. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of parsing algorithms.
Regarding claim 18. Basso in view of Herrera and in further view of Beshai disclose the apparatus of claim 15, wherein the processor is further configured to: when performing the (n+1)-th stage of parsing on a current data segment, in response to determining that a field to be parsed is entirely located in the current data segment based on the offset address for the next stage of parsing, a header length corresponding to the header type of the next layer and a parsing length indicated by the field parsing information for the (n+1)-th stage, perform the (n+1)-th stage of parsing on the current data segment to obtain a parsing result in the (n+1)-th stage (The combined solution provides for performing the (n+1_-th stage of parsing on a current data segment when the filed to be parsed is fully located within that segment. Basso and Herrera disclose staged parsing of header fields using offset addressing to determine the next parsing operation, and thus when the filed s using offset addressing to determine the next parsing operation is entirely contained within the current segment, the staged parsing may be completed using that segment alone)
Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Herrera’s parsing pipeline comprising stages with a maximum number of N stages. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of parsing algorithms.
Regarding claim 5, claim 5 comprises the same and/or similar subject matter as claim 15 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 6, claim 6 comprises the same and/or similar subject matter as claim 16 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 7, claim 7comprises the same and/or similar subject matter as claim 17 and is considered an obvious variation; therefore it is rejected under the same rationale.
Regarding claim 8, claim 8 comprises the same and/or similar subject matter as claim 18 and is considered an obvious variation; therefore it is rejected under the same rationale.
Any inquiry concerning this communication or earlier communications from the Examiner should be directed to TODD L. BARKER whose telephone number is (571) 270 0257. The Examiner can normally be reached on Monday through Friday, 7:30am to 5:00pm.
If attempts to reach the Examiner by telephone are unsuccessful, the Examiner's supervisor Vivek Srivastava can be reached on (571) 272 7304.
/TODD L BARKER/Primary Examiner, Art Unit 2449