DETAILED ACTION
1. This action is in response to the election filed on 4/15/26.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
3. Applicant’s election without traverse of Group I and Species I (figures 1-5, claims 1-6 and 23) in the reply filed on 4/15/26 is acknowledged.
Claim Rejections - 35 USC § 102
4. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
5. Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Fan (US 20160072384).
Regarding claim 1: Fan discloses a boost converter circuit (i.e. figure 1) comprising:
an input (i.e. 10) arranged to receive an input voltage (i.e. Vin);
an output (i.e. 19) arranged to generate a higher, output voltage (i.e. Vout) for powering a further circuit portion (i.e. load connect to 19);
a switching arrangement (i.e. SW) arranged to control generation of the output voltage (i.e. Vout); and
a control circuit portion (i.e. control circuit of figure 1) arranged to monitor (i.e. by 11) the input voltage (i.e. Vin) and control the switching arrangement (i.e. SW) in response to the input voltage (i.e. Vin) (i.e. ¶ 16-18).
Regarding claim 2: (i.e. figure 1) wherein the control circuit portion (i.e. control circuit of figure 1) is arranged to control the switching arrangement (i.e. SW) to limit an output current (i.e. current to load, by controlling the switch SW) of the boost converter circuit in response to the input voltage (i.e. Vin) (i.e. ¶ 16-18).
Regarding claim 3: (i.e. figure 1) wherein the control circuit portion (i.e. control circuit of figure 1) comprises a comparator (i.e. 11) arranged to compare the input voltage (i.e. Vin) with a reference input voltage (i.e. Vsw) and to control the switching arrangement (i.e. SW) to limit the output current (i.e. current to load) of the boost converter circuit in response to an output (i.e. from 11) of said comparator (i.e. 11) (i.e. ¶ 16-18).
Claim Rejections - 35 USC § 103
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
7. Claims 4-6 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Fan (US 20160072384) in view of Locascio (US 20110241625).
Regarding claim 4: Fan discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the reference.
Locascio disclose a power supply (i.e. figures 2-3) comprising the reference input voltage (i.e. from 170 is .3V) is between 25% and 75% of an unloaded power supply voltage (i.e. from 120 is .5V) (i.e. ¶ 29-31).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Fan’s invention with the power supply as disclose by Locascio to enable efficient pulses of energy to be delivered from the storage capacitor to the storage element when the boost converter circuit is turned on.
In addition, it would have been obvious to one having ordinary skill in the art at the time the invention was made to Fan’s invention to have input voltage is between 25% and 75% of an unloaded power supply voltage in order to increase the efficiency of the power supply. Since, it has been held that where the general conditions of a claim are discloses in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 5: Fan discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the reference input voltage is a predetermined reference input voltage.
Locascio disclose a power supply (i.e. figures 2-3) comprising the reference input voltage is a predetermined reference input voltage (i.e. 170) (i.e. ¶ 29-31).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Fan’s invention with the power supply as disclose by Locascio to enable efficient pulses of energy to be delivered from the storage capacitor to the storage element when the boost converter circuit is turned on.
Regarding claim 6: Fan discloses the limitation of the claim(s) as discussed above, but does not specifically disclose the predetermined reference input voltage is between 0.1 V and 2 V.
Locascio disclose a power supply (i.e. figures 2-3) comprising the predetermined reference input voltage (i.e. 170) is between 0.1 V and 2 V (i.e. ¶ 29-31).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Fan’s invention with the power supply as disclose by Locascio to enable efficient pulses of energy to be delivered from the storage capacitor to the storage element when the boost converter circuit is turned on.
Regarding claim 23: Fan discloses (i.e. figure 1) control circuit portion (i.e. control circuit of figure 1) is arranged to control the switching arrangement to limit the output current (i.e. current to load, by controlling the switch SW) of the boost converter circuit based on a comparison (i.e. by 11) between the input voltage (i.e. Vin) and a reference input voltage (i.e. VSW), but does not specifically the input voltage and a reference input voltage derived from an unloaded power supply voltage.
Locascio disclose a power supply (i.e. figures 2-3) comprising the input voltage and a reference input voltage (i.e. voltage from 170) derived from an unloaded power supply voltage (i.e. ¶ 29-31).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Fan’s invention with the power supply as disclose by Locascio to enable efficient pulses of energy to be delivered from the storage capacitor to the storage element when the boost converter circuit is turned on.
Conclusion
8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7.
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/Nguyen Tran/Primary Examiner, Art Unit 2838
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