DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04/25/2024 was filed after the mailing date of the application on 04/25/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Priority
Acknowledgment is made of applicant's claim for priority under 35 U.S.C. 119(a)-(d) or (f), 365(a) or (b), or 386(a) based upon an application filed in Japan on 11/05/2021. The claim for priority cannot be based on said application because the subsequent nonprovisional or international application designating the United States was filed more than twelve months thereafter and no petition under 37 CFR 1.55 or request under PCT Rule 26bis.3 to restore the right of priority has been granted.
Applicant may wish to file a petition under 37 CFR 1.55(c) to restore the right of priority if the subsequent application was filed within two months from the expiration of the twelve-month period and the delay was unintentional. A petition to restore the right of priority must include: (1) the priority claim under 35 U.S.C. 119(a)-(d) or (f), 365(a) or (b), or 386(a) in an application data sheet, identifying the foreign application to which priority is claimed, by specifying the application number, country (or intellectual property authority), day, month, and year of its filing (unless previously submitted); (2) the petition fee set forth in 37 CFR 1.17(m)(3); and (3) a statement that the delay in filing the subsequent application within the twelve-month period was unintentional. The petition to restore the right of priority must be filed in the subsequent application, or in the earliest nonprovisional application claiming benefit under 35 U.S.C. 120, 121, 365(c), or 386(c) to the subsequent application, if such subsequent application is not a nonprovisional application. The Director may require additional information where there is a question whether the delay was unintentional. The petition should be addressed to: Mail Stop Petition, Commissioner for Patents, P.O. Box 1450, Alexandria, Virginia 22313-1450.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1-15, the claimed limitations use the term “AD” and “DA”, without clarifying what these abbreviations mean. The Examiner understands in view of the specification that AD and DA stand for analog to digital and digital to analog, but limitations from the specification are not read onto the claims. Appropriate correction is required.
Regarding claim 5, the Examiner cannot determine what is being claimed in this limitation “wherein the controller controls the switch such that the switch enters the connected state in a period different from a period in which the digital signal value is obtained”, specifically, how the controller can switch into a connected state during a period of time that is different from the digital signal value being obtained. In other words, if the controller is turned off, how is the digital signal value being obtained? How could a signal value be obtained through a circuit that is turned off or otherwise unable to receive signals? The Examiner was unable to find an explanation in the specification that provides for how this is accomplished.
Regarding claim 6, claim 6 inherits the indefiniteness from claim 5. Appropriate correction is required.
Regarding claim 7, the Examiner is unable to determine what a "certain cycle" is, let alone what constitutes a certain cycle (or invalidates a "certain cycle") for AD conversion. As a result of this, the Examiner cannot search for the claimed limitation and examine the claim, and appropriate correction is required.
Regarding claim 8, claim 8 inherits the indefiniteness from claim 7. Appropriate correction is required.
Regarding claim 9, claim 9 inherits the indefiniteness from claim 8. Appropriate correction is required.
Regarding claim 11, the Examiner cannot determine what is being claimed in this limitation “wherein the controller controls the switch such that the switch enters the connected state in a period different from a period in which the digital signal value is obtained”, specifically, how the controller can switch into a connected state during a period of time that is different from the digital signal value being obtained. In other words, if the controller is turned off, how is the digital signal value being obtained? How could a signal value be obtained through a circuit that is turned off or otherwise unable to receive signals? The Examiner was unable to find an explanation in the specification that provides for how this is accomplished.
Regarding claims 12-13, claims 12-13 inherits the indefiniteness from claim 11. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 4, and 14-15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Masaki (JP H0556942A).
Regarding claims 1 and 14-15, Masaki teaches “an amplifier that amplifies a potential that is a difference between a reference potential (pre-stage differential amplifier 1, inputs electrocardiogram signals, p.[0005-0009]) and a potential measured by an electrode attached to a measurement target position of a biopotential (second stage main amplifier 2, multiplexer 3 that selects an output from main amplifier 2)”, “an AD converter (AD converter 4, "AD conversion unit") that converts an analog signal according to the potential amplified by the amplifier into a digital signal;”, “a calculation unit that sets a setting value of an offset potential to be applied to an input of the amplifier on a basis of a signal level of the digital signal after the AD conversion (data processing unit 7)”, “a DA converter that converts a digital signal indicating the setting value into an analog signal and that generates an analog potential (DA converter 6, ouputs correction data to data processing unit 7);”, “a potential holder that holds the analog potential generated by the DA converter and that applies the held analog potential to the input of the amplifier (sample-and-hold circuit 5 applies output to inverting input of main amplifier 2, where data processed by data processing unit 7 is applied to the main amplifier 2 through one channel of sample and hold circuit 5 and DA converted 6 as a correction value e4, where the sample and hold circuit 5 is formed from an 8-channel hold capacity Cd, the potential holder)”, “a switch provided between the DA converter and the potential holder (SW1-SW8)”, and “a controller that switches a connected state and a separated state of the switch (decoder)”.
Regarding claims 14-15, the limitations described in claims 14-15 are taught by claim 1. Therefore, the rejection of claims 14-15 are taught by the rejection of claim 1 as taught above.
Regarding claim 4, the limitations of claim 1 are taught as described above. Masaki teaches “a reception signal obtainer that obtains a digital signal value on a basis of the digital signal after the AD conversion (p.[0005], "the calculating a multiplexer for sending to the a / D converter selects the output of the main amplifier, an a / D converter for converting the output of said multiplexer into digital data, the digitized data by the a / D converter configured to include a data processing unit, and a sample hold circuit for applying a D / a converter for outputting the corrected data processed by the processing unit to the inverting input of each 8CH of the correction main amplifier the output of")”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Masaki (JP H0556942A).
Regarding claim 10, the limitations of claim 1 are taught as described above. Masaki does not teach “wherein the measurement target position includes a plurality of measurement target positions, and a plurality of the amplifier, a plurality of the potential holder, and a plurality of the switch are provided in correspondence with to signals of results of measurement of the biological potentials”. However, it would have been obvious to one of ordinary skill in the art at the time the invention was made to include a plurality of positions, amplifiers, potential holders, and switches since it has been held that mere duplication of essential working parts of a device involves only routine skill in the art. See St. Regis Paper Co. v. Bemis Co., 193 USPQ 8.
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Masaki (JP H0556942A) in view of Yoshihiro (JP S63224522A).
Regarding claims 2-3, the limitations of claim 1 are taught as described above. Masaki does not teach these limitations, however Yoshihiro does in particular, page 3, upper right column, line 12 to lower left column, line 6, and fig.1-2) describes determining whether an output voltage VAzı converted by and output from an A/D converter 12 exceeds an allowable error voltage range ±Vemax, calculating, when the allowable error voltage range ±Vemax is exceeded, correction data for generating a correction voltage Vp sufficient for a measurement value VAzı to fall within the allowable error voltage range ±Vemax on the basis of design data that is stored in advance, and outputting the correction data to a second D/A converter 16.
The invention disclosed in Masaki and the invention disclosed in Yoshihiro belong to the same technical field in terms of determining a correction value on the basis of data output from an amplifier, and being a circuit that applies the correction value to the inverting input of the amplifier. Therefore, a person skilled in the art could easily conceive of applying the feature disclosed in Yoshihiro to the invention disclosed in Masaki.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Abigail M Bock whose telephone number is (571)272-8856. The examiner can normally be reached M-F 7:30am - 5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Linda Dvorak can be reached at 5712724764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ABIGAIL BOCK/Examiner, Art Unit 3794
/LINDA C DVORAK/Primary Examiner, Art Unit 3794