DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is sent in response to Applicant’s Communication received 4/29/2024 for application number 18/705,934. The Office hereby acknowledges receipt of the following and placed of record in file: Specification, Drawings, Abstract, Oath/Declaration, claims, and certified copy of foreign priority application.
Claims 1 – 20 are presented for examination.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Title
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The examiner believes that the title of the invention is imprecise. A descriptive title indicative of the invention will help in proper indexing, classifying, searching, etc. See MPEP 606.01. However, the title of the invention should be limited to 500 characters.
Drawings
Examiner contends that the drawings filed 4/29/2024 are acceptable for examination proceedings.
Claim Rejections - 35 USC § 112
Claims 4-6, 9-11, and 15 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4-6 and 9-11 recites the limitation “the average voltage value” but does not previously mention an average voltage value. There is insufficient antecedent basis for this limitation in the claim. The term “an average voltage value” is introduced in claim 2, and thus it appears that these claims should depend on claim 2 rather than on claim 1.
Claim 15 is dependent on claim 4 and is rejected based on dependency to claim 4.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 5-6, 9-11, 13-14, 16, and 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Percer et al. (hereinafter as Percer) PGPUB 2004/0267486, and further in view of Kahn USPAT 8,405,369.
As per claim 1, Percer teaches a correction method, wherein the correction method is applied to a processor [FIG. 10 hardware monitor 20 and 0064: (hardware monitor may be programmed and is thus a processor)], a correction device comprises an electronic load [FIG. 10 marginable component] and a digital multimeter [0039 and FIG. 10 sensors 32] both connected to an output terminal of a VR inverter in a server [FIG. 10: (sensors and marginable component connected to output of voltage regulator (VR inverter)], and a digital potentiometer provided between the output terminal and a feedback terminal of the VR inverter [FIG. 10, 0010, 0092, and 0100: (a digital voltage adjuster 110 (potentiometer) is provided in a feedback loop that goes from output of voltage regulator to the top of digital voltage adjuster 110)], a control terminal of the digital potentiometer is connected to a BMC in the server [0093: (digital potentiometer/voltage adjuster can adjust the resistance in response to commands receive from the BMC and thus vary the regulator’s output voltage) and 0030: server], a first data exchange terminal of the processor is connected to a data exchange terminal of the BMC [FIG. 10: (hardware monitor 20 is connected to BMC)], a second data exchange terminal of the processor is connected to a control terminal of the electronic load and an output terminal of the digital multimeter [FIG. 10: (hardware monitor is connected to output terminal of sensors 32 and to a terminal of the marginable component through the sensors 32)], and the method comprises:
load-pulling the electronic load at a predetermined frequency, a predetermined step [0030, 0039, 0052, 0091, and 0096: (certain parameters such as frequency are stepped to monitor voltage outputted from voltage regulator 112)];
determining whether an average voltage value of output voltage of the VR inverter collected by the digital multimeter after each load-pulling of the electronic load is within the predetermined voltage range at the end of load-pulling [0095 and 0100: (checks that the margin voltage will not exceed a threshold that would damage the system components)]; and
adjusting an impedance of the digital potentiometer by the BMC until the average voltage value is within the predetermined voltage range when the average voltage value of output voltage of the VR inverter collected by the digital multimeter is not within the predetermined voltage range [0091, 0100: (BMC can instruct digital voltage adjuster 110/potentiometer to adjust the resistance to cause variation of regulator output voltage if the voltage regulator output voltage deviates by more than a threshold (not within the predetermined voltage range))].
Percer does not teach a predetermined maximum load-pull current to load-pull a current of the VR inverter until a load-pull current of the VR inverter is the predetermined maximum load-pull current. Percer does not describe controlling the VR such that it outputs a maximum current.
Kahn teaches controlling a voltage regulator to provide power to a load. Kahn is thus similar to Percer because they both teach making adjustments to a voltage regulator to get a desired power output. Kahn further teaches a predetermined maximum load-pull current to load-pull a current of the VR inverter until a load-pull current of the VR inverter is the predetermined maximum load-pull current [claim 10: (cause the circuit of a voltage regulator to enter the first state until a current pulse is the maximum current limit)]. Kahn teaches controlling the output of a voltage regulator such that it reaches a maximum output current.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use Kahn’s teachings of controlling a VR to output current until it reaches a maximum current in Percer. One of ordinary skill in the art would have been motivated to cause a voltage regulator to output current until it reaches a maximum current in Percer because controlling the voltage regulator in such a manner allows for improved efficiency [Kahn col. 7 lines 19-33].
As per claim 2, Percer and Kahn teach the method according to claim 1, wherein the adjusting the impedance of the digital potentiometer by the BMC until the average voltage value is within the predetermined voltage range comprises: S21: adjusting the impedance of the digital potentiometer by the BMC [Percer 0091, 0100: (BMC can instruct digital voltage adjuster 110/potentiometer to adjust the resistance]; S22: load-pulling the electronic load at the predetermined frequency, the predetermined step and the predetermined maximum load-pull current to load-pull the current of the VR inverter [Percer 0030, 0039, 0052, 0091, and 0096: (certain parameters such as frequency are stepped to monitor voltage outputted from voltage regulator 112); and Kahn claim 10: (current may be controlled to output a maximum current)]; S23: determining the output voltage of the VR inverter collected by the digital multimeter after each load-pulling of the electronic load [0100 and claim 7: (periodically obtains measured voltage)]; S24: calculating an average voltage value of the output voltage of the VR inverter during the load-pulling of the current of the electronic load after the load-pull current of the VR inverter is the predetermined maximum load-pull current [Kahn col. 3 lines 52-59, and col. 4 lines 63 – col. 5 line 6: (average value of current is determined; it is known that current is related to voltage by Ohm’s law and thus it is obvious to one of ordinary skill in the art to calculate an average voltage from the average current value; one of ordinary skill in the art would have been motivated to calculate the average voltage value to determine power characteristics of the voltage regulator and to better manage it)]; S25: determining whether the average voltage value is within the predetermined voltage range [0100: (determines if regulator’s output deviates from desired value by a threshold)], and proceeding to step S26 when the average voltage value is within the predetermined voltage range, and returning to step S21 when the average voltage value is not within the predetermined voltage range [Percer FIG. 1B and 0096: (may be iterated several times until a sufficient accurate voltage is reached)]; and S26: generating information that the VR inverter is ready for operation [this limitation is a contingent limitation in a method claim, and as such, the broadest reasonable interpretation of the claim only requires one of the contingent limitations to be taught; Percer teaches step S25 of return to step S21 when voltage is not within the predetermined voltage range)].
As per claim 3, Percer and Kahn teach the method according to claim 2, wherein the determining the output voltage of the VR inverter collected by the digital multimeter after each load-pulling of the electronic load comprises: determining the output voltage of the VR inverter collected by the digital multimeter after a predetermined interval after each load-pulling of the electronic load [0100 and claim 7: (periodically obtains voltage)].
As per claim 5, Percer and Kahn teach the method according to claim 1, wherein the adjusting the impedance of the digital potentiometer by the BMC until the average voltage value is within the predetermined voltage range comprises: adjusting the impedance of the digital potentiometer to decrease the impedance of the digital potentiometer when the average voltage value is greater than a maximum value of the predetermined voltage range, so that the average voltage value is within the predetermined voltage range [Percer claim 5 and 0100: (potentiometer resistance is adjusted to be within a voltage range; it is known that decreasing potentiometer resistance decreases voltage)].
As per claim 6, Percer and Kahn teach the method according to claim 1, wherein the adjusting the impedance of the digital potentiometer by the BMC until the average voltage value is within the predetermined voltage range comprises: adjusting the impedance of the digital potentiometer to increase the impedance of the digital potentiometer when the average voltage value is less than a maximum value of the predetermined voltage range, so that the average voltage value is within the predetermined voltage range [Percer claim 5 and 0100: (potentiometer resistance is adjusted to be within a voltage range; it is known that increasing potentiometer resistance increases voltage)].
As per claim 9, Percer and Kahn teach the method according to claim 1, wherein the method further comprises: load-pulling the electronic load at the predetermined frequency, the predetermined step and the predetermined maximum load-pull current to load-pull the current of the VR inverter until the load-pull current of the VR inverter is a predetermined minimum load-pull current [Kahn col. 6 line 65 – col. 7 line 7 and claim 1]; determining whether the average voltage value of output voltage of the VR inverter collected by the digital multimeter after each load-pulling of the electronic load is within the predetermined voltage range at the end of load-pulling [Percer 0100]; and adjusting the impedance of the digital potentiometer by the BMC until the average voltage value is within the predetermined voltage range when the average voltage value of output voltage of the VR inverter collected by the digital multimeter is not within the predetermined voltage range [Percer 0100].
As per claim 10, Percer and Kahn teach the method according to claim 1, wherein after the load-pulling the electronic load at the predetermined frequency, the predetermined step and the predetermined maximum load-pull current to load-pull the current of the VR inverter until the load-pull current of the VR inverter is the predetermined maximum load-pull current, the method further comprises: detecting the output voltage of said VR inverter by the digital multimeter for the current number of times after each load-pulling of the electronic load [0084, 0086, and 0096: iterated several times].
As per claim 11, Percer and Kahn teach the method according to claim 1, wherein the adjusting the impedance of the digital potentiometer by the BMC until the average voltage value is within the predetermined voltage range comprises: increasing or decreasing the impedance of the digital potentiometer by the BMC until the average voltage value is within the predetermined voltage range [Percer claim 5 and 0100: (potentiometer resistance is adjusted to be within a voltage range].
As per claim 13, Percer and Kahn teach the method according to claim 1, wherein the method further comprises: interacting, by the processor, with the BMC for data exchange via a serial bus [0069 and 0096: (hardware monitor (processor) communicates with BMC over I2C bus)].
As per claim 14, Percer and Kahn teach the method according to claim 1, wherein the method further comprises: transmitting, by the BMC, control signals via an I2C bus during controlling the digital potentiometer [0096 and FIG. 10: (bus 58 is I2C)].
As per claim 16, Percer and Kahn teach the method according to claim 1, wherein the method further comprises: detecting, by the BMC, the output voltage of the VR inverter via an ADC voltage monitoring trace [Percer 0107].
Claim 18 is similar in scope to claim 1 as addressed above and is thus rejected under the same rationale. Percer further teaches a load-pull unit [Percer FIG. 10 marginable component 114]; a determination unit [Percer FIG. 10 BMC 56]; and an adjustment unit [Percer FIG. 10 digital voltage adjuster 110].
As per claim 19, Percer and Kahn teach a correction device, comprising: a memory for storing a computer program; a processor for executing the computer program to implement steps of the correction method according to claim 1 [Percer 0037, 0069, and 0104: memory].
As per claim 20, Percer and Kahn teach A computer non-transitory readable storage medium, wherein the computer non-transitory readable storage medium stores a computer program, and the computer program is executed by the processor to implement steps of the correction method according to claim 1 [Percer 0037, 0069, and 0104: memory or Kahn col . 8 lines 42-43].
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Percer et al. (hereinafter as Percer) PGPUB 2004/0267486 in view of Kahn USPAT 8,405,369, and further in view of a machine translation of CN112129994 (hereinafter as CN112129994) that is included in the Office Action.
As per claim 7, Percer and Kahn teach the method according to claim 1, wherein a voltage collection terminal of the BMC is connected to the output terminal of the VR inverter [Percer FIG. 10: (BMC is connected to output of voltage regulator through sensors 32].
Percer and Kahn do not teach after the load-pulling the electronic load at the predetermined frequency, the predetermined step and the predetermined maximum load-pull current to load-pull the current of the VR inverter until the load-pull current of the VR inverter is the predetermined maximum load-pull current, the method further comprises: determining a voltage correction coefficient of the BMC based on output voltage of the VR inverter collected by the BMC and the output voltage of the VR inverter collected by the digital multimeter after each load-pulling of the electronic load at the end of load-pulling; and correcting a voltage monitoring value of the BMC based on the voltage correction coefficient. Percer and Kahn do not appear to teach coefficients.
CN112129994 teaches power monitoring and correction in a server. CN112129994 is thus similar to Percer and Kahn. CN112129994 further teaches after the load-pulling the electronic load at the predetermined frequency, the predetermined step and the predetermined maximum load-pull current to load-pull the current of the VR inverter until the load-pull current of the VR inverter is the predetermined maximum load-pull current, the method further comprises: determining a voltage correction coefficient of the BMC based on output voltage of the VR inverter collected by the BMC and the output voltage of the VR inverter collected by the digital multimeter after each load-pulling of the electronic load at the end of load-pulling [page 2 5th paragraph from the bottom]; and correcting a voltage monitoring value of the BMC based on the voltage correction coefficient [page 2 4th paragraph from the bottom]. CN112129994 teaches using coefficients to correct voltage and current measurements.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use CN112129994’s teachings of determining coefficients and using them to correct voltage and current measurements in Percer and Kahn. One of ordinary skill in the art would have been motivated to use coefficients in Percer and Kahn because using them may give more accurate readings of voltage and current and prolong life of the circuits [CN112129994 Background 3rd paragraph].
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Percer et al. (hereinafter as Percer) PGPUB 2004/0267486 in view of Kahn USPAT 8,405,369, and further in view of Ooi et al. (hereinafter as Ooi) PGPUB 2021/0081342.
As per claim 12, Percer and Kahn teach the method according to claim 1.
Percer and Kahn do not explicitly teach wherein the method further comprises: obtaining, by the processor, the output voltage collected by the digital multimeter or controlling the electronic load via a GPIB bus. Percer and Kahn teaches an I2C bus instead of a GPIB bus.
Ooi teaches a test system for devices. Ooi is thus similar to Percer and Kahn because they direct to controlling voltage for test systems. Ooi further teach a GPIB bus [0003].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use Ooi’s teachings of using a GPIB bus for communication in Percer and Kahn. One of ordinary skill in the art would have been motivated to use a GPIB bus because it is a common communication interface for devices under test, and using it in Percer and Kahn would improve convenience.
Allowable Subject Matter
Claims 4, 8, 15, and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicant is reminded that in amending in response to a rejection of claims, the patentable novelty must be clearly shown in view of the state of the art disclosed by the references cited and the objections made. Applicant must also show how the amendments avoid such references and objections. See 37 CFR §1.111(c).
Hsieh et al. (PGPUB 2019/0065295) teaches a BMC connected to a digital potentiometer [claim 2 and FIG. 2].
Chen et al. (PGPUB 2011/0279145) teaches BMC connected to rheostat [FIG. 2].
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANNY CHAN whose telephone number is (571)270-5134. The examiner can normally be reached Monday - Friday 10-7 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kim Huynh can be reached at 5712724147. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DANNY CHAN/Primary Examiner, Art Unit 2175