DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by DuPre et al. (US 6,243,253 B1).
PNG
media_image1.png
348
418
media_image1.png
Greyscale
PNG
media_image2.png
328
446
media_image2.png
Greyscale
Regarding claim 1, DuPre et al. disclose in Fig. 8, 9A-9B, a multilayer ceramic capacitor (72, abstract), comprising:
a body including first internal electrodes (90 – see also Fig. 5) and second internal electrodes (98 – see also Fig. 5) alternately stacked in a first direction (top-bottom – Fig. 8 – see also Fig. 5) with dielectric layers (86, 94), each of the dielectric layers (86, 94) being between one of the first internal electrodes (90) and the second internal electrodes (98), the body including a first surface (front – Fig. 8, back – Fig. 9A, 9B) and a second surface (bottom – Fig. 8, right – Fig. 9A, 9B) facing each other, a first side surface (top – Fig. 8) and a second side surface (bottom – Fig. 8) facing each other in the first direction (top-bottom), and a first end face (left – Fig. 8, top – Fig. 9A, 9B) and a second end face (right – Fig. 8, bottom – Fig. 9A, 9B) facing each other;
a first external electrode (76) and a second external electrode (78) located on the first surface;
a third external electrode (76) and a fourth external electrode (78) located on the second surface; and
a first inspection electrode (80 – C: 6, L: 40-45) located on the first end face and a second inspection electrode (82) located on the second end face,
wherein the first internal electrodes (90) includes a first portion including a first extension (92), a second extension (92), and a first inspection extension (102 – C: 6, L: 40-45),
the second internal electrodes (98) includes a second portion including a third extension (100), a fourth extension (100), and a second inspection extension (104 – C: 6, L: 40-45),
the first extension (92) extends to the first surface and is connected to the first external electrode (76), and the second extension (92) extends to the second surface and is connected to the third external electrode (76),
the third extension (100) extends to the first surface and is connected to the second external electrode (78), and the fourth extension (100) extends to the second surface and is connected to the fourth external electrode (78), and
the first inspection extension (102) extends to the first end face and is connected to the first inspection electrode (80), and the second inspection extension (104) extends to the second end face and is connected to the second inspection electrode (82).
Claim(s) 1, and 6-7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kuroda et al. (US 6,191,932).
PNG
media_image3.png
370
460
media_image3.png
Greyscale
PNG
media_image4.png
354
536
media_image4.png
Greyscale
Regarding claim 1, Kuroda et al. disclose in fig. 1, 2A-2B, , a multilayer ceramic capacitor (1), comprising:
a body including first internal electrodes (10) and second internal electrodes (11) alternately stacked in a first direction (top-bottom – Fig. 1– see also Fig. 5) with dielectric layers (9), each of the dielectric layers (9) being between one of the first internal electrodes (10) and the second internal electrodes (11), the body including a first surface (front – Fig. 1, left – Fig. 2A-2B) and a second surface (back – Fig.1, right – Fig. 2A, 2B) facing each other, a first side surface (top – Fig. 1) and a second side surface (bottom – Fig. 1) facing each other in the first direction (top-bottom), and a first end face (right – Fig. 1,bottom – Fig. 2A, 2B) and a second end face (let – Fig. 1, top – Fig. 2A, 2B) facing each other;
a first external electrode (14) and a second external electrode (18) located on the first surface;
a third external electrode (14) and a fourth external electrode (18) located on the second surface; and
a first electrode (15) located on the first end face and a second electrode (19) located on the second end face,
wherein the first internal electrodes (10) includes a first portion including a first extension (12), a second extension (12), and a first end extension (13),
the second internal electrodes (11) includes a second portion including a third extension (16), a fourth extension (16), and a second end extension (17),
the first extension (12) extends to the first surface and is connected to the first external electrode (14), and the second extension (12) extends to the second surface and is connected to the third external electrode (14),
the third extension (16) extends to the first surface and is connected to the second external electrode (19), and the fourth extension (16) extends to the second surface and is connected to the fourth external electrode (19), and
the first end extension (13) extends to the first end face and is connected to the first electrode (15), and the second end extension (17) extends to the second end face and is connected to the second electrode (19).
With regard to the first and second end extensions and first and second electrodes being used for “inspecting” the ceramic capacitor, it has been held that a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations. Ex parte Masham, 2 USPQ2d 1647 (1987).
Regarding claim 6, Kuroda et al. disclose when viewed in a direction perpendicular to the first side surface, the first external electrode (14) and the third external electrode (14) overlap, and the second external electrode (18) and the fourth external electrode (18) overlap.
Regarding claim 7, Kuroda et al. disclose the first electrode (15) and the second end electrode (17) each have, in a direction perpendicular to the first surface, a dimension of 30 to 90% inclusive of a distance between the first surface and the second surface (see Fig. 2A-2B).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 2-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over in DuPre et al. (US 6,243,253) in view of Yoshida et al. (US 2010/0002356).
Regarding claim 2, DuPre et al. disclose the claimed invention except for the first internal electrodes further includes a first dummy portion electrically isolated from the first portion, the second internal electrodes further includes a second dummy portion electrically isolated from the second portion, the first dummy portion includes a first dummy extension extending to the first surface and a second dummy extension extending to the second surface, the second dummy portion further includes a third dummy extension extending to the first surface and a fourth dummy extension extending to the second surface, the first dummy extension is connected to the second external electrode, and the second dummy extension is connected to the fourth external electrode, and the third dummy extension is connected to the first external electrode, and the fourth dummy extension is connected to the third second-external electrode.
Yoshida et al. disclose a multilayer ceramic capacitor comprising a first internal electrode (55) that includes a first dummy portion (64) electrically isolated from a first portion,
a second internal electrode (56) includes a second dummy portion (63) electrically isolated from a second portion,
the first dummy portion (64) includes a first dummy extension (64) extending to the first surface (bottom – Fig. 12A, 12B) and a second dummy extension (64) extending to the second surface (top – Fig. 12A, 12B),
the second dummy portion further includes a third dummy extension (63) extending to the first surface (bottom) and a fourth dummy extension (63) extending to the second surface (top),
the first dummy extension (64) is connected to a second external electrode (70), and the second dummy extension (64) is connected to a fourth external electrode (70), and the third dummy extension (63) is connected to a first external electrode (69), and the fourth dummy extension (63) is connected to a third second-external electrode (69).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the device of DuPre et al. so that the first internal electrodes further includes a first dummy portion electrically isolated from the first portion, the second internal electrodes further includes a second dummy portion electrically isolated from the second portion, the first dummy portion includes a first dummy extension extending to the first surface and a second dummy extension extending to the second surface, the second dummy portion further includes a third dummy extension extending to the first surface and a fourth dummy extension extending to the second surface, the first dummy extension is connected to the second external electrode, and the second dummy extension is connected to the fourth external electrode, and the third dummy extension is connected to the first external electrode, and the fourth dummy extension is connected to the third second-external electrode, since such a modification would form a multilayer ceramic capacitor where the fixing strength of the external terminal electrodes are improved.
Regarding claim 3, Yoshida et al. disclose viewed in a direction perpendicular to the first side surface, the first extension (58) and the third dummy extension (63) overlap, and the second extension (58) and the fourth dummy extension overlap (63) See Fig. 12A, 12B).
Regarding claim 4, Yoshida et al. disclose when viewed in a direction perpendicular to the first side surface, the third extension (61) and the first dummy extension (64) overlap, and the fourth extension (61) and the second dummy extension (64) overlap.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over DuPre et al. (US 6,243,253) in view of Pyrmak (US 20050231890).
Regarding claim 5, DuPre et al. disclose the first external electrode (76) is located adjacent to the first end face (left), and the second external electrode (18) and is located adjacent to the second end face (right).
DuPre et al. disclose the claimed invention except for the third external electrode is located adjacent to the first end face and the fourth external electrode is located adjacent to the second face.
Pyrmak discloses a multilayer ceramic capacitor where a first external electrode (404 – dark) and a third external electrode (404 – dark) are located adjacent to the first end face (left), and a second external electrode (404 – light) and a fourth external electrode (404 – light) are located adjacent to the second end face (right).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the device of DuPre et al. so that the first external electrode and the third external electrode are located adjacent to the first end face, and the second external electrode and the fourth external electrode are located adjacent to the second end face, since such a modification would form a multilayer ceramic capacitor having desired ESL and improved heat dissipation.
Claim(s) 8-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over DuPre et al. (US 6,243,253 B1) in view of Li (US 2004/0124511).
Regarding claim 8, DuPre et al. disclose the claimed invention except for a multilayer ceramic capacitor mounting structure, comprising: the multilayer ceramic capacitor according to claim 1; and a substrate including a mounting surface, wherein the multilayer ceramic capacitor is mounted on the mounting surface with the first side surface perpendicular to the mounting surface.
Li discloses a multilayer ceramic capacitor mounting structure, comprising: a multilayer ceramic capacitor (62, 64) and a substrate (70) including a mounting surface (top), wherein the multilayer ceramic capacitor (62, 64) is mounted on the mounting surface with the first side surface (bottom) perpendicular to the mounting surface (top).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to form the multilayer ceramic capacitor according to claim 1 in a multilayer ceramic capacitor mounting structure, comprising: a substrate including a mounting surface, wherein the multilayer ceramic capacitor is mounted on the mounting surface with the first side surface perpendicular to the mounting surface, since such a modification would form a multilayer ceramic capacitor mounting structure with a low inductance multilayer ceramic capacitor having dedicated testing external electrodes.
Regarding claim 9, the modified DuPre et al. disclose the substrate includes a first substrate electrode (78 - Li) and a second substrate electrode (78 - Li) located on the mounting surface (34 - Li), and
the first external electrode (76) in the multilayer ceramic capacitor is bonded to the first substrate electrode (78 – Li) with a conductive bond, and the second external electrode (78) in the multilayer ceramic capacitor is bonded to the second substrate electrode (78 – Li) with a conductive bond.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 4,831,494 – multilayer ceramic capacitor having interdigitated tabs
US 6,038,121 – multilayer ceramic capacitor having multiple tabs
US 6,407,907 – multilayer ceramic capacitor having side / end external terminals
US 6,795,294 – multilayer ceramic capacitor having multiple side and end external terminals
US 2006/0209442 – multilayer ceramic capacitor wherein end external terminals have dimensions between about 30 to 90 % of a distance between the first and second surface
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC THOMAS whose telephone number is (571)272-1985. The examiner can normally be reached Monday-Friday, 6:00 AM-2:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571)272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ERIC W THOMAS/Primary Examiner, Art Unit 2847
ERIC THOMAS
Primary Examiner
Art Unit 2847
Prosecution Insights