Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This is the initial office action that has been issued in response to patent application, 18/708,922, filed on 07/20/2021. Claims 1-14are currently pending and have been considered below. Claim 1 is an independent claim.
Priority
The application claims foreign priority of Europe 21306569.1 filed on 11/09/2021 and foreign priority of France 2209624 filed on 09/22/2022.
Drawings
The drawings filed on 11/25/2024 (Figures 1-5, 13-15, 18, 20-22) are objected to as failing to comply with 37 CFR 1.84(p)(4) because there are no present descriptive legends for all the character numbers in the drawings of Figures 1-5, 13-15, 18, 20-22 as described in the specification. It becomes difficult for the Examiner to understand what the reference characters represent without having to view the specification.
Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Election/Restrictions
Applicant’s election with traverse of Group 1, Claims 1-14 has been acknowledged. Claims 15-29 are withdrawn from consideration as being directed to a non-elected invention. Applicant’s traversal of the restriction requirement has been considered but is not persuasive. The restriction requirement is therefore maintained.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 7-12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Modave(US Publication No. 20050289270 A1) in view of Kang (US Publication No. 20220269777 A1).
Regarding Claim 1:
Modave discloses:
A method for detecting attempted linear extraction of a program code recorded in a memory of an electronic circuit(Modave, [0002], the execution of programs (software codes) by an integrated microprocessor. The present invention more specifically relates to the control of the integrity of a program during its execution, [0004], attack may cause an unexpected jump in the program execution sequence, [0005], the program counter jump to cause an unexpected jump in the execution sequence by any means, even if the program has not stopped or is in a loop upon authentication. For example, for cryptography algorithms (DSA, RSA, DES, AES, etc.), [0006], the pirate attempts to modify the program sequencing on execution thereof.)
the code having program instructions that, in order to be read by a microprocessor core, are loaded sequentially(Modave, [0002], The present invention generally relates to the execution of programs (software codes) by an integrated microprocessor.), [0007], the program to be protected is contained in a ROM written into upon manufacturing and not modifiable or in a rewritable non-volatile memory, for example, a flash memory., [0045], of a microcontroller 1 of smart card type to which the present invention more specifically applies. Such a microcontroller 1 comprises a central processing unit 2 (CPU) communicating via a bus 3 with different memories, among which at least one memory 4 (for example, a ROM or a flash memory) ,
each instruction being loaded into the instruction register on an edge of the clock signal(Modave, [0013], the same operation performed by a microcontroller must or not be considered as a piracy attempt according to the place where it is located in the program execution. For example, the checking (request of entry by the card reader) of a secret code several times consecutively in a smart card, without for this checking to come along with an operation),
Modave does not disclose:
via an instruction bus into an instruction register for storing the instructions that is controlled at least by a clock signal and a reset signal
the code having discontinuity instructions and/or what are referred to as "security marker" instructions inserted among the program instructions so as to be read during the execution of the program
the method comprising the steps of triggering a predefined alert action in the event of lack of detection of a discontinuity instruction or of a security marker, in accordance with a predefined monitoring rule
Kang discloses:
via an instruction bus into an instruction register for storing the instructions that is controlled at least by a clock signal and a reset signal(Kang, [0014], the processor includes a set branch identifier (setBID) instruction configured to command an identifier of a branch target to be written to a branch identifier register at a predetermined sequence number, among multiple branch identifier registers, and a check branch identifier (chkBID) instruction configured to command a signal indicating detection of a control flow [0023], a processor for detecting violation of control flow integrity according to an embodiment;),
the code having discontinuity instructions and/or what are referred to as "security marker" instructions inserted among the program instructions so as to be read during the execution of the program(Kang, [0014], a processor for executing a program, wherein the processor includes a set branch identifier (setBID) instruction configured to command an identifier of a branch target to be written to a branch identifier register at a predetermined sequence number, among multiple branch identifier registers, and a check branch identifier (chkBID) instruction configured to command a signal indicating detection of a control flow hijacking attack to be issued based on whether a value written to the branch identifier register at the predetermined sequence number is identical to a value of an identifier),
the method comprising the steps of triggering a predefined alert action in the event of lack of detection of a discontinuity instruction or of a security marker, in accordance with a predefined monitoring rule(Kang, [0017], to the multiple branch identifier registers depending on sequence numbers in response to the set branch identifier (setBID) instruction, and detecting whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier written to a branch identifier register at a predetermined sequence number corresponding to the called branch target.).
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Modave's control of the execution of a program by enhancing Modave's systems for monitoring program execution integrity with Kang's insertion of control-flow verification instructions (setBID and chkBID) among the program instructions and predefined branch identifier verification rules that trigger a detection signal upon failure of verification in order to enhance the detection of unauthorized deviations from the intended control flow and abnormal program execution.
The motivation is to ensure reliable, deterministic monitoring of program execution integrity by detecting control-flow hijacking, fault injection attacks, and execution anomalies, and by initiating an appropriate protective response when expected security marker instructions are not properly detected or verified.
Regarding Claim 2:
The method as claimed in claim 1, Modave in view of Kang disclose the predefined monitoring rule being the lack of detection of a discontinuity instruction or of a security marker for a predefined period and/or after a predefined number of program instructions have been read and/or after a predefined number of clock cycles(Modave, [0022], assigning a digital increment, respectively decrement, to at least one section considered as critical as to the program execution and called by the function; [0026], comparing the current value of the counter with a predetermined critical threshold. [0027], the comparison with the critical threshold is performed at each end of a function. [0028], an error processing is implemented when the current value becomes smaller, respectively greater, than the critical threshold, said processing resulting, preferably, in a blocking of the microprocessor.).
Regarding Claim 3:
The method as claimed in claim 1, Modave in view of Kang disclose such that the number of clock cycles leading to the triggering of the predefined alert action is greater than the maximum number of clock cycles needed to execute the program instructions(Modave, [0026-0028], comparing the current value of the counter with a predetermined critical threshold, the comparison with the critical threshold is performed at each end of a function, the current value becomes smaller, respectively greater, than the critical threshold)
the security markers being inserted into the code with a variable periodicity and/or the security markers being inserted into the code such that the execution of program instructions located between two consecutive security markers corresponds to a number of clock cycles less than that leading to the triggering of the predefined alert action (Kang, [0010], to the multiple branch identifier registers depending on sequence numbers in response to the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier, [0011], the control flow is a control flow in which each of two or more first functions branches to at least one of two or more second functions, allocate different identifiers to respective second functions, and determine whether at least one of the two or more first functions calls an identifier),
two consecutive security markers preferably being arranged(Kang, [0010], … the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction…)
located between the two security markers(Kang, [0010], … the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction…).
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Modave's control of the execution of a program by enhancing Modave's systems for monitoring execution integrity with Kang's placement of control-flow verification instructions at different control-flow locations, including function calls, indirect branch targets, function pointer targets, and conditional branch targets, in order to enhance the ability to detect unauthorized deviations from the intended control flow.
The motivation is to ensure reliable control-flow integrity by placing security verification instructions according to the program's control-flow structure so that abnormal execution paths and control-flow hijacking attacks can be more effectively detected.
Regarding Claim 4:
The method as claimed in claim 1, Modave in view of Kang disclose at least one security marker being inserted at the start and at the end of the code of a function forming part of the program and/or at least one security marker being inserted at the destination address of a branch instruction and/or at least one security marker being inserted at the start or at the end of the code of a loop forming part of the program(Kang, [0010], , to the multiple branch identifier registers depending on sequence numbers in response to the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier written to a branch identifier register at a predetermined sequence number corresponding to the called branch target. [0011], the control flow is a control flow in which each of two or more first functions branches to at least one of two or more second functions, ).
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Modave's control of the execution of a program by enhancing Modave's systems for monitoring program execution integrity with Kang's placement of control-flow verification instructions at selected control-flow locations, including function calls, branch targets, function pointer targets, and conditional branch targets, in order to enhance verification of intended execution paths and detection of unauthorized control-flow transfers.
The motivation is to ensure reliable protection of security-sensitive program regions by verifying execution at critical control-flow locations and promptly detecting control-flow hijacking or fault injection attacks.
Regarding Claim 5:
The method as claimed in claim 1, Modave in view of Kang disclose based on forcing to the complementary binary value of the characteristic bit(Modave, [0057], a first number b1 corresponding to an a priori confidence level is stored in non-volatile memory 6 or in ROM 4. Number b1 is used to initialize the totalization counter representing instantaneous or dynamic confidence level d which is updated, for example, by being contained in memory 5 (RAM) on each program execution. Preferably, instantaneous confidence level d is stored in non-volatile memory 6. This enables implementing the checking method over several card use sessions.).
the security markers being encoded so as to have at least one particular bit with a significance corresponding to the same significance as that of at least one characteristic bit of a branch instruction, the particular bit having the same encoded value of the characteristic bit, so as to trigger the predefined alert action in the event of an attack(Kang, [0015], The set branch identifier (setBID) instruction may include, as operands, a branch identifier register sequence number (BIDR_idx), a branch identifier base (BID_base), and a branch identifier offset (BID_offset), [0010], identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier written to a branch identifier register at a predetermined sequence number corresponding to the called branch target. [0017], identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier written to a branch identifier register at a predetermined sequence number corresponding to the called branch target.).
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Modave's control of the execution of a program by enhancing Modave's systems for monitoring execution integrity with Kang's encoded branch identifier verification instructions (setBID and chkBID), which include encoded branch identifier information and compare stored branch identifiers to expected branch identifiers in order to enhance the verification of intended program execution paths and the detection of unauthorized control-flow modifications.
The motivation is to ensure reliable detection of control-flow hijacking and other execution integrity violations by encoding verification information into dedicated security instructions and validating that the executed control flow corresponds to the expected control flow.
Regarding Claim 7:
The method as claimed in claim 1, Modave in view of Kang disclose the security markers differing from one another in terms of their payload(Kang, [0010], the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier written to a branch identifier register, [0011], locate different identifiers to respective second functions, and determine whether at least one of the two or more first functions calls an identifier of a second function that does not correspond to the control flow. [0015], The set branch identifier (setBID) instruction may include, as operands, a branch identifier register sequence number (BIDR_idx), a branch identifier base (BID_base), and a branch identifier offset (BID_offset).).
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Modave's control of the execution of a program by enhancing Modave's execution monitoring system with Kang's use of different branch identifiers assigned to different branch targets and control-flow locations in order to enhance differentiation among security verification instructions during program execution.
The motivation is to ensure more precise verification of intended execution paths and improve detection of unauthorized control-flow modifications.
Regarding Claim 8:
The method as claimed in claim 1, Modave in view of Kang disclose comprising, the execution of which corresponds to a number of clock cycles able to lead to the triggering of the predefined alert action(Modave, [0026-0028], comparing the current value of the counter with a predetermined critical threshold., the comparison with the critical threshold is performed at each end of a function, an error processing is implemented when the current value becomes smaller, respectively greater, than the critical threshold, said processing resulting, preferably, in a blocking of the microprocessor.).
in a step of analyzing the code before it is loaded into the register, inserting at least one linear execution discontinuity instruction into a portion of the code comprising program instructions(Kang, [0010], identifier registers depending on sequence numbers in response to the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier written to a branch identifier register at a predetermined sequence number corresponding to the called branch target. [0013], the control flow is a control flow in which a function branches to one of two or more targets using a conditional branch statement)
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Modave's control of the execution of a program by enhancing Modave's execution monitoring system with Kang's insertion of control-flow verification instructions (setBID and chkBID) into selected portions of the program code corresponding to critical control-flow locations in order to enhance detection of abnormal execution paths.
The motivation is to ensure reliable verification of execution integrity by monitoring execution at predetermined security-sensitive portions of the program.
Regarding Claim 9:
The method as claimed in claim 8, Modave in view of Kang disclose the linear execution discontinuity instruction being inserted during the compilation of the code, this instruction being stored in the memory and having a memory address(Kang, [0010], The program may be configured to write different identifiers, respectively allocated to multiple branch targets in a predetermined control flow, to the multiple branch identifier registers depending on sequence numbers in response to the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction. [0014], the method being performed by an apparatus including a processor for executing a program, wherein the processor includes a set branch identifier (setBID) instruction configured to command an identifier of a branch target to be written to a branch identifier register at a predetermined sequence number, among multiple branch identifier registers, and a check branch identifier (chkBID)).
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Modave's control of the execution of a program by enhancing Modave's monitored program code with Kang's insertion of dedicated control-flow verification instructions during preparation of the executable program so that the verification instructions are stored with the program code in memory in order to enhance control-flow integrity verification during execution.
The motivation is to ensure that security verification instructions are available throughout execution to detect unauthorized control-flow deviations.
Regarding Claim 10:
The method as claimed in claim 8, Modave in view of Kang disclose the linear execution discontinuity instruction being inserted after the instructions to be loaded have been read from the memory and before these instructions are loaded into the instruction register(Kang, FIG. 2, 4 and 6, [0010], allocated to multiple branch targets in a predetermined control flow, to the multiple branch identifier registers depending on sequence numbers in response to the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier written to a branch identifier register. [0037], executing programs or processing instructions stored in the memory 1030 or the storage 1060.).
Regarding Claim 11:
The method as claimed in claim 1, Modave in view of Kang disclose the predefined alert action comprising at least one of the following actions: resetting the electronic circuit, erasing the memory, resetting the read address in memory to zero(Modave, [0016-0020], a solution which takes into account the more or less critical character of an operation according to the operations which have come before it., aims at providing a solution which does not require a signature updating on each updating of the software code to be protected, aims at providing a solution which is compatible with an execution on a smart card type power microcontroller of limited power, aims at providing a solution which is compatible with a restarting of the microcontroller after a blocking resulting from a fault in the program execution, automatic control of the execution of a program by a microprocessor, comprising:),
the read address in memory adopting non-consecutive values such that the extraction of the code becomes non-linear, and skipping a section of code, in particular a sensitive section to be protected(Modave, [0007], the program to be protected is contained in a ROM written into upon manufacturing and not modifiable or in a rewritable non-volatile memory, for example, a flash memory. [0045], a microcontroller 1 of smart card type to which the present invention more specifically applies. Such a microcontroller 1 comprises a central processing unit 2 (CPU) communicating via a bus 3 with different memories, among which at least one memory 4 (for example, a ROM or a flash memory) for storing programs to be executed, a RAM 5 used during execution of the programs, and a rewritable non-volatile memory (NVM) 6).
Regarding Claim 12:
The method as claimed in claim 1, Modave in view of Kang disclose being implemented at all times in order to protect the entire program code(Modave, [0002], the execution of programs (software codes) by an integrated microprocessor. The present invention more specifically relates to the control of the integrity of a program during its execution, [0019], …a solution which is compatible with a restarting of the microcontroller after a blocking resulting from a fault in the program execution.),
the first instruction thereof in particular being a discontinuity instruction or a security marker(Kang, [0014], the method being performed by an apparatus including a processor for executing a program, wherein the processor includes a set branch identifier (setBID) instruction configured to command an identifier of a branch target to be written to a branch identifier register at a predetermined sequence number, among multiple branch identifier registers, and a check branch identifier (chkBID), [0017], the set branch identifier (setBID) instruction, and detecting whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier written to a branch identifier register at a predetermined sequence number corresponding to the called branch target) .
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Modave's control of the execution of a program by enhancing Modave's continuous execution monitoring with Kang's insertion of control-flow verification instructions throughout the executable program in order to enhance comprehensive monitoring of program execution integrity.
The motivation is to ensure continuous protection of the program against control-flow hijacking and fault injection attacks throughout program execution.
Regarding Claim 14:
The method as claimed in claim 1, Modave in view of Kang disclose being implemented in order to protect at least a portion of the program code delimited by a start address and an end address, the method being activated as soon as a program instruction the address of which lies between the start address and the end address is read for execution, and being deactivated as soon as a program instruction not belonging to said code portion is read for execution, said code portion corresponding in particular to the start phase of the circuit or a portion of code implementing security functions, in particular cryptographic tools(Modave, [0021], assigning a digital decrement or increment to at least one function of the program; [0022], assigning a digital increment, respectively decrement, to at least one section considered as critical as to the program execution and called by the function; [0024], the counter once per program function before a call to a critical section, by a value which is a function of the decrement, respectively increment, assigned to the concerned program function; [0027], the comparison with the critical threshold is performed at each end of a function. [0028], an error processing is implemented when the current value becomes smaller, respectively greater, than the critical threshold, said processing resulting, preferably, in a blocking of the microprocessor, [0005], the execution of a cryptography algorithm may include having the program counter jump to cause an unexpected jump in the execution sequence by any means, [0006], the pirate attempts to modify the program sequencing on execution thereof. In the case of a smart card, this sometimes amounts to modifying the order of commands received by the card processor, sometimes inserting abnormal commands in sessions of communication with the card.).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Modave(US Publication No. 20050289270 A1) in view of Kang (US Publication No. 20220269777 A1) in further view of Frank(US Patent No. 5822578 A).
Regarding Claim 6:
Modave and Kang disclose:
The method as claimed in claim 1…
Modave in view of Kang do not disclose:
the security markers being inserted into the code during the execution thereof, in particular when the program instructions are read from the memory, the memory preferably containing control logic having a logic block that periodically inserts a security marker among the program instructions when they are read, the logic block in particular transmitting a wait cycle command to the microprocessor core when a security marker is loaded into the instruction register so that the microprocessor core inserts a wait cycle into the execution flow when the security marker is received
Frank discloses:
the security markers being inserted into the code during the execution thereof, in particular when the program instructions are read from the memory, the memory preferably containing control logic having a logic block that periodically inserts a security marker among the program instructions when they are read, the logic block in particular transmitting a wait cycle command to the microprocessor core when a security marker is loaded into the instruction register so that the microprocessor core inserts a wait cycle into the execution flow when the security marker is received(Frank, Col. 3, lines 26-39, Selected processors can further include a register element for storing digital values representative of data. In this aspect of the invention, the insert elements can assert inserted-instructions to control movement of data into and out of register elements associated with the selected processors. The inserted-instructions can be configured to cause execution of selected logical operations on digital values stored in the register elements. the processors can include trap elements which initiate a trap sequence in response to an applied trap signal. The insert elements include elements for generated inserted-instructions for generating the trap signal, and the resulting trap sequence can include any of a set of selected program steps. Col. 21-22, lines 64-67 and line 1, the processor stops fetching instruction, refuses to allow inserted instructions, and waits for all of the co-execution units to retire any instructions in progress. If any of these instructions report exceptions, each exception is included as part of the trap information.) .
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Maizels in view of Kang’s facial movements wake up wearable by enhancing Maizels in view of Kang's systems for dynamically injecting wait states during instruction fetch to ensure the microprocessor core synchronizes execution timing with the insertion of security markers as taught by Frank in order to enhance system security against linear memory readout attacks.
The motivation is to ensure that execution flow is paused cleanly during marker insertion without disrupting processor synchronization or causing pipeline stalls.
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Maizels in view of Kang’s facial movements wake up wearable by enhancing Maizels in view of Kang's systems for dynamically injecting wait states during instruction fetch to ensure the microprocessor core synchronizes execution timing with the insertion of security markers as taught by Frank in order to enhance system security against linear memory readout attacks.
The motivation is to ensure that execution flow is paused cleanly during marker insertion without disrupting processor synchronization or causing pipeline stalls.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Modave(US Publication No. 20050289270 A1) in view of Kang (US Publication No. 20220269777 A1) in further view of Khoury(US Patent No. 6445606 B1).
Regarding Claim 13:
Modave in view of Kang disclose:
The method as claimed in claim 1…
and the first instruction of the program code being a discontinuity instruction or a security marker, if the method is activated(Kang, [0010], to the multiple branch identifier registers depending on sequence numbers in response to the set branch identifier (setBID) instruction, and detect whether a control flow hijacking attack has been attempted based on whether an identifier of a branch target that is called in response to the check branch identifier (chkBID) instruction is identical to an identifier).
Modave in view of Kang do not disclose:
being implemented in a parameterizable manner via configuration of a fuse, in particular a one-time programmable fuse, or of a variable in non-volatile memory, in particular a Flash or EEPROM memory, in the programming phase of the circuit, the value stored in the fuse or in the non-volatile memory being read when the circuit is started, in particular when it is powered on or when it is woken up after being reset, said value making it possible to activate the detection method
Khoury discloses:
being implemented in a parameterizable manner via configuration of a fuse, in particular a one-time programmable fuse, or of a variable in non-volatile memory, in particular a Flash or EEPROM memory, in the programming phase of the circuit, the value stored in the fuse or in the non-volatile memory being read when the circuit is started, in particular when it is powered on or when it is woken up after being reset, said value making it possible to activate the detection method(Khoury, Col. 4, 65-67, During power-up or reset the secure OTP secure output register is set to a programmed value. A programmed value is used by designers to lock or disable key features of the on-chip design, Col. 3, lines 58-62, The fuse element, or (one time programmable) OTP fuse element is often formed from a conductive salicided poly silicon wire. In an unblown—unprogrammed—state, the fuse is conducting with a low impedance. To program the fuse a large programming current of approximately 20 mA, Col. 4, lines 31-36, the secure OTP ROM. After a secure read cycle is completed, all input paths to the control block, es 7 a, bs 7 b, we 7 c, address 7 d, are released to allow a normal read operation allowing for a read of the secure or test bits of the secure OTP into the test output register, performing a secure read operation after power-up or reset de-assertion, performing a normal read operation at any time after a secure read operation is completed, and writing to any OTP fuse. The secure register strobe 21 writes to the secure output register 3 and the test register strobe 20 writes to the test output register 4. Col. 4-5, 66.67 and 1-8, A programmed value is used by designers to lock or disable key features of the on-chip design. Advantageously, for security purposes, some key digital functions are immune to the intervention of hackers during the reset or power-up mode. When the secure OTP is powered-up and/or reset is de-asserted, the control block performs only one secure read operation, reading the secure bits of the secure OTP into the secure output register. This allows one time unlocking of some key digital function according to the stored value in the secure OTP.).
Before the effective filing date of the claimed invention, it would have been obvious to one with ordinary skill in the art to modify Maizels in view of Kang’s facial movements wake up wearable by enhancing Maizels in view of Kang systems for configuring security monitoring parameters via non-volatile hardware fuses or non-volatile memory during circuit boot-up to ensure that the linear extraction detection mechanism is selectively activated and locked upon circuit power-on or reset as taught by Khoury in order to enhance the post-fabrication flexibility and tamper-resistance of the protection scheme.
The motivation is to ensure that security features can be permanently or dynamically provisioned per device chip architecture without requiring mask redesign or exposing activation pathways to software tampering.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MAYASA SHAAWAT whose telephone number is (571)272-3939. The examiner can normally be reached on M-F, 8 AM TO 5 PM.
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/MAYASA SHAAWAT/
Examiner, Art Unit 2433
/JEFFREY C PWU/Supervisory Patent Examiner, Art Unit 2433
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