Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of species C in the reply filed on 02/06/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 7-15, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bush (PG pub 20200295209), and in view of Goto et al (PG Pub 20100282291).
Regarding claim 1, Bush teaches a solar cell module comprising a first solar cell and a
second solar cell disposed on a substrate and connected in series [fig 6A para 49] wherein:
the first solar cell 220 comprises a first bottom electrode layer 210A disposed on the substrate 202, a first stack (subcell) 220A disposed on the first bottom electrode layer, a first top electrode layer 250A disposed on the first stack, wherein the first stack is configured to generate electric current by means of the photovoltaic effect from the first bottom electrode layer to the first top electrode layer when the first stack is illuminated [fig 6A para 46-50]
a first by-pass diode 300 electrically connected in parallel with the first stack, the first by-pass diode disposed between the first bottom electrode layer and the first top electrode layer [fig 6A para 46-50]. It is noted layer (230,280,270) formed bypass diode path 300 [para 39].
said first stack comprises a first semiconductor layer arranged between the first bottom electrode layer and the first top electrode layer, the first semiconductor layer being of a first type [fig 4 par 43] ( it is noted that fig 4A-B shows subcell 220B including semiconductor layer in details)
said first stack further comprises a second semiconductor layer arranged between the first semiconductor layer and the first top electrode, the second semiconductor layer being of a second type, and wherein the first type is one of an n-type semiconductor layer and a p-type semiconductor layer, and the second type is the other of the n-type semiconductor layer and the p-type semiconductor layer [fig 4A-B para 43-44].
the second solar cell 220 comprise a second bottom electrode layer 210B disposed on the substrate 202, a second stack (subcell) 220B disposed on the second bottom electrode layer, a second top electrode layer250B disposed on the second stack, wherein the second stack is configured to generate electric current by means of the photovoltaic effect from the second top electrode layer to the second bottom electrode layer when the second stack is illuminated.
said second stack comprises a third semiconductor layer arranged between the second bottom electrode layer and the second top electrode layer, the third semiconductor layer being of the second type, and wherein said second stack further comprises a fourth semiconductor layer arranged between the third semiconductor layer and the second top electrode, the fourth semiconductor layer being of the first type [fig 4 para 43] ( it is noted that fig 4A-B shows subcell 220B including semiconductor layer in details)
the first top electrode layer 250A and the second top electrode layer 250B is a single conductive layer 250 [fig 6A]
Bush teaches the bypass diode 300 being parallel connected with solar cell, but Bush does not teach the bypass diode having structure as claimed.
Goto et al teaches a thin film solar cell comprising pin bypass diode in the diode region C [fig 4 5c para 100].
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify the bypass diode (especially layer 230) or replace semiconductor layer of the bypass diodes by the pin structure as taught by Goto et al since the claimed subject matter merely combines familiar elements according to known methods and does no more than yield predictable results. See MPEP 2141 (III) Rationale A,KSR v. Teleflex (Supreme Court 2007).
As for combination, the first by-pass diode comprises a fifth semiconductor layer arranged between the first bottom electrode layer of the first solar cell and the single conductive layer, the fifth semiconductor layer being of the second type, and wherein said first by-pass diode further comprises a sixth semiconductor layer arranged
between the fifth semiconductor layer and the single conductive layer, the sixth
semiconductor layer being of the first type.
Regarding clam 7, modified Bush teaches the first stack comprises an n-type semiconductor layer disposed on the first bottom electrode layer, a first absorber layer disposed on the n-type semiconductor layer, and a p-type semiconductor layer disposed on the first absorber layer, the first top electrode layer is disposed on the p-type semiconductor layer [fig 4A-B 6 para 43-44].
Regarding claim 8, modified Bush teaches the second stack comprises a p-type semiconductor layer disposed on the second bottom electrode layer, a second absorber layer disposed on the p-type semiconductor layer, and an n-type semiconductor layer disposed on the second absorber layer, the first top electrode layer is disposed on the n-type semiconductor layer [fig 4A-B 6 para 43-44].
Regarding claim 9, modified Bush teaches thefirst by-pass diode further comprises a p-type semiconductor layer disposed on the first bottom electrode layer and an n-type semiconductor layer disposed on the p-type semiconductor layer, the n-type semiconductor layer is in electrical contact with the first top electrode layer [fig 6, Bush fig 4 5c para 100, Goto et al]
Regarding claim 10, modified Bush teaches the first by-pass diode further comprises a p-type semiconductor layer disposed on the first bottom electrode layer, an intrinsic semiconductor layer disposed on the p-type semiconductor layer and an n-type semiconductor layer disposed on the intrinsic semiconductor layer, the n-type semiconductor layer is in electrical contact with the first top electrode layer [fig 6, Bush fig 4 5c para 100, Goto et al].
Regarding claim 11, modified Bush teaches the second solar cell further comprises a second by-pass diode electrically connected in parallel with the second stack and the second by-pass diode is disposed between the second top electrode layer and the second bottom electrode layer [fig 6A, Bush]. It is noted that there is each bypass diode between two adjacent solar cells where there are multiples solar cells in solar cells module (abstract para 24).
Regarding claim 12, modified Bush teaches the second by-pass diode further comprises a p-type semiconductor layer disposed on the second bottom electrode layer, an intrinsic semiconductor layer disposed on the p-type semiconductor layer and an n-type semiconductor layer disposed on the intrinsic semiconductor layer, the n-type semiconductor layer is in electrical contact with the first top electrode layer [fig 6, Bush fig 4 5c para 100, Goto et al].
Regarding claim 13, modified Bush teaches the second by-pass diode further comprises an n-type semiconductor layer disposed on the second bottom electrode layer, an intrinsic semiconductor layer disposed on the n-type semiconductor layer and a p-type semiconductor layer disposed on the intrinsic semiconductor layer, the p-type semiconductor layer is in electrical contact with the first top electrode layer[fig 6, Bush fig 4 5c para 100, Goto et al].
Regarding claim 14 and 19, modified Bush teaches the intrinsic semiconductor layer is an absorber layer.
Regarding claim 15, modified Bush teaches the solar cell module comprising perovskite solar cells [Para 1, Bush]
Claim(s) 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bush (PG pub 20200295209), and Goto et al (PG Pub 20100282291) and further in view of Foss (PG pub 20100126550)
Regarding claim 16, modified Bush teaches plurality of strings of modules [fig 1], but modified Bush does not teach plurality of modules being connected in series.
Foss teaches an apparatus comprising strings which includes plurality of modules being connected in series [para 48 fig 1B].
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify the plurality of modules of modified Bush to be connected in series and arranged the same as taught by Foss for increasing voltage and since the claimed subject matter merely combines familiar elements according to known methods and does no more than yield predictable results. See MPEP 2141 (III) Rationale A,KSR v. Teleflex (Supreme Court 2007).
As for combination, the plurality of thin film solar cell modules comprises at least one intermediate solar cell module, wherein each intermediate solar cell module is arranged most adjacent to and electrically upstream of a first adjacently arranged solar cell module and each intermediate solar cell module is arranged most adjacent to and electrically downstream of a second adjacently arranged solar cell module wherein the first bottom electrode layer of each respective intermediate solar cell module is electrically connected to a second bottom electrode layer of said first adjacently arranged solar cell module, and the second bottom electrode layer of each respective intermediate solar cell module is electrically connected to a first bottom electrode layer of said second adjacently arranged solar cell module [fig 1B, Foss fig 6A, Bush].
Regarding claim 17, modified Bush teaches a solar panel comprising a string of thin film solar cell modules electrically connected in series, wherein the first bottom electrode layer of a solar cell module is electrically connected to a second bottom electrode layer of a first adjacently arranged solar cell, and the second bottom electrode layer of the solar cell module is electrically connected to a first bottom electrode layer of a second adjacently arranged solar cell [fig 1B, Foss fig 6A, Bush].
Claim(s) 3-6, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bush (PG pub 20200295209), and Goto et al (PG Pub 20100282291) and further in view of Donnelly et al (PG Pub 20180040663).
Regarding claim 3 and 5, modified Bush teaches the claimed limitation, but modified Bush does not teach photon blocking layer as claimed.
Donnelly et al teaches a photodiode array comprising material region 24 which is blocking layer being used for blocking photon.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to add the photon blocking layer of Donnelly et al between first bottom electrode and first bypass diode as taught by modified Bush et al for preventing loss of photon or preventing photon travelling around to another solar cell [para 35]. As for combination, the photon blocking layer between substrate and first bypass diode.
Regarding claim 4, modified Bush teach the photon blocking layer 24 being made of metal [para 42] which is the same material of instant application [para 86], it is considered that the average transmission of said photon blocking layer is at most 50% within a wavelength range of 400 nm to 900 nm. It is noted that "Products of identical chemical composition can not have mutually exclusive properties." In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990). A chemical composition and its properties are inseparable. Therefore, if the prior art teaches the identical chemical structure, the properties applicant discloses and/or claims are necessarily present.
Regarding claim 3 and 6, modified Bush teaches the claimed limitation, but modified Bush does not teach photon blocking layer as claimed.
Donnelly et al teaches a photodiode array comprising material region 24 which is blocking layer being used for blocking photon.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to add the photon blocking layer of Donnelly et al between first bottom electrode and first substrate as taught by modified Bush et al for preventing loss of photon or preventing photon travelling around to another solar cell [para 35]. As for combination, the photon blocking layer between first substrate and first bypass diode.
Regarding claim 18, modified Bush teach the photon blocking layer 24 being made of metal [para 42] which is the same material of instant application [para 86], it is considered that the average transmission of said photon blocking layer is at most 1% within said wavelength range of 400 nm to 900 nm. It is noted that "Products of identical chemical composition can not have mutually exclusive properties." In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990). A chemical composition and its properties are inseparable. Therefore, if the prior art teaches the identical chemical structure, the properties applicant discloses and/or claims are necessarily present.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to UYEN M TRAN whose telephone number is (571)270-7602. The examiner can normally be reached Monday-Friday 9am-6pm.
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/UYEN M TRAN/Primary Examiner, Art Unit 1726
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