DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action is sent in response to Applicant’s Communication received 5/21/2024 for application number 18/712,222. The Office hereby acknowledges receipt of the following and placed of record in file: Specification, Drawings, Abstract, Oath/Declaration, claims, and certified copy of foreign priority application.
Claims 1 – 20 are presented for examination.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Drawings
Examiner contends that the drawings filed 5/21/2024 are acceptable for examination proceedings.
Title
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The examiner believes that the title of the invention is imprecise. A descriptive title indicative of the invention will help in proper indexing, classifying, searching, etc. See MPEP 606.01. However, the title of the invention should be limited to 500 characters.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-4 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 recites “determining whether an in-place signal of the storage array is received; determining whether the in-place signal of the storage array is an interference signal in response to receiving the in-place signal; in response to the signal being the interference signal, returning to the step of determining whether an in-place signal of the storage array is received; and in response to the signal being not the interference signal, proceeding to the step of acquiring state data for representing power supply state of power modules” but the limitations are unclear.
First, it is unclear what “the in-place signal of the storage array is an interference signal in response to receiving the in-place signal” is meant to convey because it appears to be circular logic specifying that the in-place signal is in response to receiving the in-place signal. Perhaps Applicant meant “determining whether the received in-place signal of the storage array is an interference signal
Second, it is unclear what “the signal” is referring to. At a glance, it would appear that “the signal” refers to the in-place signal, but Applicant’s specification in PGPUB 2025/0004524 paragraph [0101] states that an in-place signal is received and at the same time, a PSON signal is evaluated to determine whether the signal is an interference signal by determining the level of the PSON signal. Thus it is unclear whether “the signal” is referring to the in-place signal or a different signal. Paragraph [0101] appears to suggest that when PSON signal is low it is not an interference signal, but if PSON signal is non-low (e.g. high) it is an interference signal triggered by mistake. For examination purposes, Examiner will interpret the signal as being the PSON signal.
Claim 4 is rejected based on dependency to rejected claim 3.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 and 5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lv et al. (hereinafter as Lv) EP2065892.
As per claim 1, Lv teaches a method for supplying power to a storage array [0020: disk array], comprising:
acquiring state data for representing power supply state of power modules [0041-0042: (detect whether the power input of the power input lead of the power module is normal)];
determining, according to the state data, whether the storage array satisfies power failure triggering conditions [0042: (power input is not normal (power failure triggering conditions)]; and
controlling a current power module to be switched to another power module or a standby battery in response to determining that the storage array satisfies the power failure triggering conditions [0042: (if the power input is not normal, control the standby power unit to supply power) and 0025 and 0027: (battery is standby power)].
As per claim 5, Lv teaches the method for supplying power to the storage array according to claim 1, wherein after the acquiring state data for representing power supply state of power modules, the method further comprises: redetermining a power supply control mode of the storage array according to the state data [0031, 0037, and 0040-0042: (one control unit is active and the other is standby; after detecting that a failure occurs such as in one control unit from the collected power information, the other control unit may be determined to switch from standby to active so that it does not affect normal operation of the disk array)].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 6-10, and 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lv et al. (hereinafter as Lv) EP2065892, and further in view of Nelson et al. (hereinafter as Nelson) PGPUB 2018/0329468.
As per claim 6, Lv teaches the method for supplying power to the storage array according to claim 5.
Lv does not teach wherein the redetermining a power supply control mode of the storage array according to the state data comprises: determining a control algorithm subroutine according to the state data; and determining the power supply control mode of the storage array according to the control algorithm subroutine. Lv does not describe performing a control algorithm subroutine to redetermine the power supply control mode.
Nelson teaches a data prevention loss technique in a disk array system when power is lost. Nelson is thus similar to Lv because they teach preventing data loss when power is interrupted. Nelson further teaches teach wherein the redetermining a power supply control mode of the storage array according to the state data comprises: determining a control algorithm subroutine according to the state data [0013: (a strategy is determined based on detected structure to select a data loss prevention technique)]; and determining the power supply control mode of the storage array according to the control algorithm subroutine [0013-0014: (the selected technique is applied and used when a power loss occurs)]. Nelson teaches using an algorithm routine to determine how to supply backup power when main power is lost.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use Nelson’s teachings of using an algorithm routine to determine how to utilize backup power in Lv. One of ordinary skill in the art would have been motivated to provide a routine to select between different power options in response to detecting a power loss in Lv because such routine provides different options on how the system may respond to a power loss, thus providing flexibility.
As per claim 7, Lv and Nelson teach the method for supplying power to the storage array according to claim 5, wherein the power supply control mode of the storage array comprises: distributed logic parallel control, master-slave redundant parallel control [Lv 0040: (two control units work concurrently in the active-standby mode where one control unit is active and the other is in standby; thus it is a master-slave redundant mode)] or other control mode, wherein the other control mode is a mode initiated when the power supply state of the power modules are determined to be abnormal according to the state data [Lv 0040: (failure of one control unit leads to the other standby control unit becoming the primary control unit; such mode in which the standby control unit becoming the active/primary control unit is the other control mode)].
As per claim 8, Lv and Nelson teach the method for supplying power to the storage array according to claim 7, wherein the distributed logic parallel control is a power supply control mode in which the multiple power modules supply power at the same time; and the master-slave redundant parallel control is a power supply control mode in which one of the power modules supplies power alone and other power modules are in a standby state [Lv 0040: (two control units work concurrently in the active-standby mode where one control unit is active and the other is in standby; thus it is a master-slave redundant mode)].
As per claim 9, Lv and Nelson teach the method for supplying power to the storage array according to claim 7, further comprising: in the distributed logic parallel control, adding a current-sharing bus voltage into a proportional-integral-derivative (PID) control loop as a control parameter, and taking the current-sharing bus voltage as a feedforward signal to improve a current-sharing precision when a load is suddenly changed [the distributed logic parallel control limitation is an alternative limitation in claim 7, and this claim further limits that particular alternative limitation; however, another alternative limitation was addressed to teach claim 7, and thus this claim 9 has also been addressed)].
As per claim 10, Lv and Nelson teach the method for supplying power to the storage array according to claim 7, further comprising: in response to receiving a primary-standby host configuration instruction in the master-slave redundant parallel control, sending a cold redundant control signal [Lv 0040: (one control unit is active whereas the other control unit is in standby and inactive; when it is determined that one control unit is to be a primary control unit and the other a standby control unit, the control signal that is provided to the control unit to be in a standby inactive state is equivalent to a cold redundant control signal)]; and in response to receiving a primary-standby slave configuration instruction in the master-slave redundant parallel control, adjusting the output voltage to be lower than a normal output voltage by a preset voltage [Lv 0040: (when it is determined that one control unit is to be a primary control unit and the other a standby control unit, the standby control unit has its voltage to be adjusted to a lower than normal voltage because it is inactive and on standby)].
As per claim 12, Lv and Nelson teach the method for supplying power to the storage array according to claim 7, wherein when the power supply control mode is the distributed logic parallel control, the redetermining a power supply control mode of the storage array according to the state data comprises: calling a first algorithm for the distributed logic parallel control; and redetermining the power supply control mode of the storage array according to the first algorithm [the distributed logic parallel control limitation is an alternative limitation in claim 7, and this claim further limits that particular alternative limitation; however, another alternative limitation was addressed to teach claim 7, and thus this claim 9 has also been addressed)]; when the power supply control mode is the master-slave redundant parallel control, the redetermining a power supply control mode of the storage array according to the state data comprises: calling a second algorithm for the master-slave redundant parallel control; and redetermining the power supply control mode of the storage array according to the second algorithm [Lv 0040 and Nelson 0013-0014: (it is apparent that if a failure occurs to one control unit, the standby/slave control unit is switched into the primary/master role according to the loss prevention strategy/technique)].
As per claim 13, Lv and Nelson teach the method for supplying power to the storage array according to claim 7, wherein the power supply control mode of the storage array is the other model control; after the redetermining a power supply control mode of the storage array according to the state data, the method further comprises: restoring an anomaly through a self-diagnosis subroutine [Nelson 0012 and 0020: (recover from power outage)].
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lv et al. (hereinafter as Lv) EP2065892, and further in view of Ren PGPUB 2008/0151452 and Wendel et al. (hereinafter as Wendel) PGPUB 2005/0168934.
As per claim 18, Lv teach the method for supplying power to the storage array according to claim 1.
Lv does not explicitly teach further comprising: adding a first protection circuit for preventing static electricity and hot-drawing from damaging a power control signal pin, a second protection circuit for eliminating a power on sequence and a third protection circuit for eliminating software delay impacts in a circuit.
Ren teaches circuitry for power control of a computing device. Ren is thus similar to Lv. Ren further teaches adding a second protection circuit for eliminating a power on sequence [0029-0031: (protect computer from damage by controlling state of PSON signal)] and a third protection circuit for eliminating software delay impacts in a circuit [0005: (PWROK signal is controlled to protect from damage due to abnormal power-on voltage)]. Ren teaches circuitry for protecting the computing device from abnormal power conditions.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use Ren’s teachings of protection circuity in Lv. One of ordinary skill in the art would have been motivated to provide such protection circuity in Lv because they are circuitry that prevent damage to the computing device, thus extending the life of the disk array in Lv.
Lv and Ren do not teach a first protection circuit for preventing static electricity and hot-drawing from damaging a power control signal pin.
Wendel teaches circuitry for disk arrays. Wendel is thus similar to Lv and Ren. Wendel further teaches a first protection circuit for preventing static electricity and hot-drawing from damaging a power control signal pin [0173: (ESD coated material fit over circuity pins)].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use Wendel’s teachings of providing electrostatic prevention in Lv. One of ordinary skill in the art would have been motivated to do so in Lv because it prevents damage to the disk array that may be caused by static electricity, thus extending the life of the device.
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lv et al. (hereinafter as Lv) EP2065892, and further in view of Petersen1 PGPUB 2016/0283336.
Claim 19 is similar in scope to claim 1 as addressed above and is thus rejected under the same rationale.
Lv does not explicitly mention memory configured to store a computer program; and a processor configured to execute the computer program to implement operations. Lv describes performing control through software [0022] but does not specify the hardware components.
Petersen teaches a circuit to prevent data loss in a disk array in response to a power failure. Petersen is thus similar to Lv. Peterson further teaches memory configured to store a computer program [0038: (instructions stored in tangible storage memory)]; and a processor configured to execute the computer program to implement operations [0038: processor]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use Petersen’s teachings of a processor and memory storing instructions in Lv. One of ordinary skill in the art would have been motivated to provide a memory storing instructions and a processor in Lv because such components are necessary to execute the control software of Lv.
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lv et al. (hereinafter as Lv) EP2065892, and further in view of Petersen PGPUB 2016/0283336 and Fukumori PGPUB 2006/0190747.
As per claim 20, Lv and Petersen teach the device for supplying power to the storage array according to claim 19.
Lv and Peterson does not explicitly mention a server.
Fukumori teaches a disk array system with redundant power supplies and power failure judging units based on monitored data. Fukumori is thus similar to Lv and Peterson. Fukumori further teaches a server comprising the device [FIG. 2 -FIG. 3 and 0055: (disk array is in communication with server which implements method for supplying power to the storage array)].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use Fukumori’s teachings of using the disk array in a server in Lv and Peterson. One of ordinary skill in the art would have been motivated to use Fukumori’s teachings of implementation with a server in Lv and Peterson because it allows the disk array to be used with a server and thus improve functionality and reliability of storage systems of the server.
Allowable Subject Matter
Claims 2, 11, 14-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 3-4 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, and if the USC 112(b) rejection above is corrected.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2, Lv teaches the method for supplying power to the storage array according to claim 1.
Krasner et al. (PGPUB 2022/0026970) teaches wherein the acquiring state data for representing power supply state of power modules comprises: acquiring power supply data of a power grid; and the power failure triggering conditions comprise: power supply from the power grid being cut off.
Yamamoto et al. (PGPUB 2006/0279869) teaches acquiring state data for representing power supply state of power modules comprises: acquiring output data of multiple power modules; the power failure triggering conditions comprise output of the power modules being stopped, output voltages of the power modules not reaching a minimum power supply voltage required by the storage array or exceeding a maximum power supply voltage of the storage array.
Kris (PGPUB 2014/0229755) teaches acquiring state data for representing power supply state of power modules comprises: driving data for driving the multiple power modules; the power failure triggering conditions comprise abnormal driving of the power modules.
Neither Lv, Krasner et al., Yamamoto et al., nor Kris teach the remaining limitations of acquiring state data for representing power supply state of power modules comprises: a control signal for controlling the multiple power modules, and temperature data of controllable switches; and the power failure triggering conditions comprise the control signal for controlling the multiple power modules disappearing; and temperatures of the controllable switches being too high. Ly, Krasner et al., Yamamoto et al., and Kris teach acquiring data of different conditions pertaining to the power modules and determining triggering conditions, but they do not teach all the different types of state data that has to be acquired and they do not teach all the power failure triggering conditions that have to be met. The claim as presented requires a plurality of types of data to be acquired and the power failure triggering condition requires a plurality of different conditions to be met. The prior art of record do not teach individually or in combination all the limitations required by the independent claims as a whole.
Claims 11, 16, and 17 are dependent on claim 2, and are also objected to base on the allowability of claim 2.
Regarding claim 14, Lv and Nelson teach the method for supplying power to the storage array according to claim 13.
Neither Lv nor Nelson appear to teach the remaining limitations of wherein after the restoring an anomaly through a self-diagnosis subroutine, the method further comprises: determining whether the anomaly is restored; in response to the anomaly being restored, continuing to supply power for the storage array through the power modules; and in response to the anomaly being not restored, controlling the standby battery to supply power to the storage array, and controlling an alarm module to give an alarm. Lv and Nelson describes recovery from a power outage but do not appear to confirm or check that the anomaly has been restored, or generating an alarm if it has not been restored. The prior art of record do not teach individually or in combination all the limitations required by the independent claims as a whole.
Regarding claim 15, Lv teach the method for supplying power to the storage array according to claim 1.
Fukumori (PGPUB 2006/0190747) teaches an input from the power grid is converted by an Active Power Factor Correction (APFC) circuit.
Neither Lv nor Fukumori appear to teach the remaining limitations of, wherein an implementation process of supplying power to the storage array by the power modules is as follows: then inverted and rectified driven by a driver circuit, output to a control circuit for the power modules, the power modules are selected by the control circuit, and the power modules supply power for the storage array. Lv and Fukumori teach rectifying AC input and then providing to a power factor improving circuit, but Ly and Fukumori do not appear to describe the specific order of perform inverting and rectifying after the Active Power Factor Correction (AFPC), and then providing to a control circuit for the power modules. The prior art of record do not teach individually or in combination all the limitations required by the independent claims as a whole.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicant is reminded that in amending in response to a rejection of claims, the patentable novelty must be clearly shown in view of the state of the art disclosed by the references cited and the objections made. Applicant must also show how the amendments avoid such references and objections. See 37 CFR §1.111(c).
Suzuki (PGPUB 2011/0066884) teaches a disk array circuit and determining if electric power is disconnected before switching to another supply of power.
Spengler (USPAT 7,321,521) teaches a pair of power modules that operate in tandem to supply power to controller and devices.
Roux et al. (USPAT 7,243,248) teaches providing redundant power to a disk drive system.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANNY CHAN whose telephone number is (571)270-5134. The examiner can normally be reached Monday - Friday 10-7 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew J. Jung can be reached at 5712703779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DANNY CHAN/Primary Examiner, Art Unit 2175
1 Cited in IDS on 5/21/2024.