Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The disclosure is objected to because of the following informalities:
In paragraph [97], the two instances of “STI” should both be “ST1”.
In paragraph [210], “second clad layer 210” should be “second clad layer 122b”.
Appropriate correction is required.
Claim Objections
Claims 1-2, 10, and 16 are objected to because of the following informalities:
In claim 1, line 9, the applicant recites “a first electrode”, but no second electrode is recited in any of the claims; the examiner suggests simply reciting “an electrode” here.
In claim 2, line 5, “…second part different are different each other” should read “…second part are different from each other”.
In claim 10, line 2, “…not configured to become conductive” may be confusing language; the examiner suggests “…not conductive” instead.
In claim 16, there is a missing period at the end of the text of the claim.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 13-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 13 recites the limitations, “the portion of the first assembly wiring and the second assembly wiring” in line 9 and “the light emitting device” in line 10. There is insufficient antecedent basis for these limitations in the claim.
Claims 14-20 are dependent on claim 13, and therefore inherit the deficiencies of the parent claim. In addition, claims 15-20 are rejected due to the additional issues, separate from the parent claim, detailed below.
Claim 15 recites the limitation, “wherein the making the portion of the first assembly wiring into the conductor comprises doping the first assembly wiring on top of the first assembly wiring using the second assembly wiring as a mask” (Emphasis added by the examiner). The parent claim, claim 13, only recites one first assembly wiring, so the additional first assembly wiring implied here lacks antecedent basis.
Claims 16-20 are dependent on claim 15, and therefore inherit the additional deficiencies of the immediate parent claim.
The following will be assumed for examination purposes:
The portions of the first and second assembly wirings recited in claim 13 may be any portion of said first and second assembly wirings.
The light emitting device recited in claim 13 is any light emitting device.
Claim 15 was meant to state that a top portion of the first assembly wiring is being doped.
These rejections may be overcome by:
Reciting portions of the first and second assembly wirings earlier in claim 13.
Reciting a light emitting device in claim 13, e.g., replace “the light emitting device” with “a light emitting device”.
Reciting a top portion of the first assembly wiring either earlier in claim 15 or in claim 13.
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Fig. 11 of Jeon, reproduced with annotation added by the examiner.
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Fig. 16 of Jeon, reproduced with annotations added by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Jeon et. al., Pub. No. US 2020/0235077, hereafter referred to as Jeon.
Regarding claim 1, the embodiment of Jeon shown in Fig. 16 teaches “A display device including a semiconductor light emitting device comprising: a substrate” ([0191]; Fig. 16, substrate 4010); “a first assembly wiring” ([0198]; Fig. 16, second electrode 4040) “and a second assembly wiring” ([0198]; Fig. 16, first electrode 4020) “alternately arranged on the substrate and overlapping each other” (Fig. 16; note that the first and second electrodes 4020 and 4040 alternate with each other and overlap); “a planarization layer disposed on the first assembly wiring and the second assembly wiring” (Fig. 16, planarization layer 4030; also see [0167] and [0176-0177] and note that this structure corresponds to the planarization layer 1030 in Fig. 11) “and comprising a first opening” (Fig. 16; note that there is an opening within which the light emitting devices are disposed), “and a light emitting device” ([0201]; Fig. 16, red, green, and blue semiconductor light emitting devices 4051, 4052, and 4053) “in which a first electrode” ([0189]; Fig. 16, first conductive electrode 4156) “is configured to overlap the first assembly wiring and the second assembly wiring” (Fig. 16; note that the first conductive electrode 4156 overlaps the first and second electrodes 4020 and 4040) “and is disposed inside the first opening” (Fig. 16; note that the first conductive electrode 4156 is contained within the opening that the light emitting element is disposed in), “wherein the first electrode is bonded to one of the first assembly wiring and the second assembly wiring” ([0198]: “A solder material may be applied to each of the first electrode 4020 and the second electrode 4040, and coupled to the first conductive electrode 4156 and the second conductive electrode 4152.” and [0210]; Fig. 16, red, green, and blue semiconductor light emitting devices 4051, 4052, and 4053; note that the first conductive electrode 4156 on each of the light emitting devices is bonded to the corresponding first electrode 4020), but does not explicitly teach “an insulating layer disposed between the first assembly wiring and the second assembly wiring”.
Jeon, however, has an alternate embodiment, shown in Fig. 11, that teaches an insulating layer ([0130]; Fig. 11, insulating layer 1060) between an electrode ([0130]; Fig. 11, first electrode 1020) and light emitting devices ([0140]; red, green, and blue semiconductor light emitting devices 1051, 1052, and 1053).
The insulating layer of the embodiment depicted in Fig. 11 can be incorporated into the embodiment depicted in Fig. 16 as a similar insulating layer (Fig. 16, insulator) disposed between the first and second electrodes 4020 and 4040. The combined embodiment teaches “an insulating layer disposed between the first assembly wiring and the second assembly wiring” (Fig. 16; note that the insulator is between the first and second electrodes 4020 and 4040).
It would have been obvious to one of ordinary skill in the art to dispose an insulating layer between the first and second electrodes of the embodiment of Fig. 16 because it would help to prevent cross talk between the two electrodes and it would have been a simple combination of elements of the two embodiments.
Regarding claim 13, the embodiment of Jeon shown in Fig. 16 teaches “A method of manufacturing a display device including a semiconductor light emitting device comprising: forming a first assembly wiring on a substrate” (Jeon [0198]; Fig. 16, note that the second electrode 4040 is on top of the substrate 4010); “forming an insulating layer on the first assembly wiring” (Jeon Fig. 16, insulator; note that this structure corresponds to the insulating layer 1060 in Fig. 11 and that it is disposed on the second electrode 4040; also see [0130]); “forming a second assembly wiring on the insulating layer” (Jeon [0198]; Fig. 16, first electrode 4020) “to be parallel to and partially overlap the first assembly wiring” (Jeon Fig. 16; note that the first and second electrodes 4020 and 4040 are parallel and partially overlap); “making a portion of the first assembly wiring into a conductor” (Jeon [0133]: “In addition, the first electrode 1020 may be a lower wiring made of a conductive material.”; Fig. 11, first electrode 1020; note that the first and second electrodes 4020 and 4040 in Fig. 16 are in a corresponding location to the first electrode 1020 of Fig. 11); “forming a planarization layer on the first assembly wiring and the second assembly wiring” (Fig. 16, planarization layer 4030; also see [0167] and [0176-0177] and note that this structure corresponds to the planarization layer 1030 in Fig. 11) “to expose the portion of the first assembly wiring and the second assembly wiring” (Fig. 16; note that there is an opening within which the light emitting devices are disposed and that portions of the first and second electrodes 4020 and 4040 are disposed underneath the opening), “and bonding the light emitting device to be in contact with the second assembly wiring” ([0198] and [0210]; Fig. 16, red, green, and blue semiconductor light emitting devices 4051, 4052, and 4053; note that the first conductive electrode 4156 on each of the light emitting devices is bonded to the corresponding first electrode 4020), but does not explicitly teach “forming an insulating layer on the first assembly wiring”.
Jeon, however, has an alternate embodiment, shown in Fig. 11, that teaches an insulating layer ([0130]; Fig. 11, insulating layer 1060) between an electrode ([0130]; Fig. 11, first electrode 1020) and light emitting devices ([0140]; red, green, and blue semiconductor light emitting devices 1051, 1052, and 1053).
The insulating layer of the embodiment depicted in Fig. 11 can be incorporated into the embodiment depicted in Fig. 16 as a similar insulating layer (Fig. 16, insulator) disposed between the first and second electrodes 4020 and 4040. The combined embodiment teaches “forming an insulating layer on the first assembly wiring” (Fig. 16; note that the insulator is between the first and second electrodes 4020 and 4040).
It would have been obvious to one of ordinary skill in the art to dispose an insulating layer between the first and second electrodes of the embodiment of Fig. 16 because it would help to prevent cross talk between the two electrodes and it would have been a simple combination of elements of the two embodiments.
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Fig. 5 of Kim, reproduced with annotation added by the examiner.
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Fig. 8 of Kim, reproduced with annotations added by the examiner.
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Fig. 14 of Kim, reproduced with annotations added by the examiner.
Claims 2-9, 11, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Jeon in view of Kim et. al., Pub. No. US 2020/0066699, hereafter referred to as Kim.
Regarding claim 2, Jeon teaches “The display device including the semiconductor light emitting device according to claim 1, wherein the second assembly wiring is disposed on the first assembly wiring” (Jeon Fig. 16; note that the first electrode 4020 is disposed on the second electrode 4040), “wherein each of the first assembly wirings comprise a first part not to overlap with the second assembly wiring” (Jeon Fig. 16; note that a portion of the second electrode 4040 does not overlap the first electrode 4020) “and a second part to overlap with the second assembly wiring” (Jeon Fig. 16; note that other portions of the second electrode 4040 do overlap the first electrode 4020), but does not teach “and wherein materials of the first part and the second part different are different each other.”
Kim, on the other hand, teaches a similar device with two electrodes consisting of two layers (Kim [0134]; Fig. 14, first and second electrodes E1a and E2a) consisting of two layers (Kim [0115]; Fig. 14, note that the first electrode consists of a first reflective electrode RFE1 and a first capping electrode CPE1, and that the second electrode consists of a second reflective electrode RFE2 and a second capping electrode CPE2). Furthermore, Kim teaches that the first and second reflective electrodes RFE1 and RFE2 are made of a reflective material (Kim [0116]: “In one embodiment, for example, each of the first and second reflective electrodes RFE1 and RFE2 may have a structure in which an indium tin oxide (“ITO”) layer, a silver (Ag) layer, and an indium tin oxide (“ITO”) layer are sequentially stacked one on another.”) and the first and second capping electrodes CPE1 and CPE2 may be made from transparent conducting materials (Kim [0117]: “In one embodiment, for example, each of the first and second capping electrodes CPE1 and CPE2 may include at least one of IZO, ITO, indium gallium oxide (“IGO”), indium zinc gallium oxide (“IGZO”), or any mixture/compound thereof.”).
The double-layered electrodes of Kim can be incorporated into the device of Jeon as similar double-layered electrodes. The layers of the second electrode of Jeon may be arranged such that the lower layer (corresponding to RFE1 of Kim) is made of a stack of indium tin oxide, silver, and another layer of indium tin oxide and does not overlap with the first electrode, while the upper layer (corresponding to CPE1 of Kim and made of a transparent conducting material) is made of a transparent conductive material and does overlap with the first electrode. The combination of Jeon and Kim just described teaches “and wherein materials of the first part and the second part different are different each other” (Kim [0116-0117]; note that the first part in the combined device includes silver, while the second part only contains a transparent conductive material).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have modified the electrodes of Jeon to have two layers, the upper of the two layers made of a transparent conducting material, as taught by Kim because doing so makes it possible for light to pass through the electrode and it would have been a simple substitution of one element for another.
Regarding claim 3, the combination of Jeon and Kim described in the discussion of claim 2 further teaches “The display device including the semiconductor light emitting device according to claim 2, wherein a material of the second part is semiconductor” (Kim [0117]; Fig. 14, first capping electrode CPE1; note that the possible materials for the first capping electrode CPE1 are oxide semiconductors) “and a material of the first part and the second assembly wiring is a conductive material” (Kim [0116]; Fig. 14, first and second reflective electrodes RFE1; note that the stack of indium tin oxide and silver layers is conductive).
Regarding claim 4, the combination of Jeon and Kim described in the discussion of claim 2 further teaches “The display device including the semiconductor light emitting device according to claim 3, wherein the material of the second part is an oxide” (Kim [0117]; Fig. 14, first capping electrode CPE1; note that the possible materials for the first capping electrode CPE1 are oxide semiconductors).
Regarding claim 5, Jeon teaches “The display device including the semiconductor light emitting device according to claim 1”, but does not teach “wherein the first assembly wiring comprises a first conductive layer disposed on the substrate; and a first clad layer in contact with the first conductive layer, wherein the second assembly wiring comprises a second conductive layer disposed on the insulating layer and a second clad layer in contact with the second conductive layer, and wherein the first electrode of the light emitting device is in contact with the second clad layer.”
Kim, on the other hand, teaches a similar device with two electrodes consisting of two layers (Kim [0134]; Fig. 14, first and second electrodes E1a and E2a) consisting of two layers (Kim [0115]; Fig. 14, note that the first electrode consists of a first reflective electrode RFE1 and a first capping electrode CPE1, and that the second electrode consists of a second reflective electrode RFE2 and a second capping electrode CPE2). Furthermore, Kim teaches that the first and second reflective electrodes RFE1 and RFE2 are made of a reflective material (Kim [0116]) and the first and second capping electrodes CPE1 and CPE2 may be made from transparent conducting materials (Kim [0117]).
The double-layered electrodes of Kim can be incorporated into the device of Jeon as similar double-layered electrodes. The layers of the second electrode of Jeon may be arranged such that the lower layer (corresponding to RFE1 of Kim) is made of a stack of indium tin oxide, silver, and another layer of indium tin oxide and does not overlap with the first electrode, while the upper layer (corresponding to CPE1 of Kim and made of a transparent conducting material) is made of a transparent conductive material and does overlap with the first electrode. The combination of Jeon and Kim just described teaches “wherein the first assembly wiring comprises a first conductive layer disposed on the substrate” (Kim [0116]; Fig. 14, first reflective electrode RFE1); “and a first clad layer in contact with the first conductive layer” (Kim [0116]; Fig. 14, first capping electrode CFE1), “wherein the second assembly wiring comprises a second conductive layer disposed on the insulating layer” (Kim [0117]; Fig. 14, second reflective electrode RFE2) “and a second clad layer in contact with the second conductive layer” (Kim [0117]; Fig. 14, second capping electrode CFE2), “and wherein the first electrode of the light emitting device is in contact with the second clad layer” (Jeon Fig. 16, first electrode 4020; note that the second capping electrode of Kim in the combined device contacts the first conductive electrode 4156).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have modified the electrodes of Jeon to have two layers, the upper of the two layers made of a transparent conducting material, as taught by Kim because doing so makes it possible for light to pass through the electrode and it would have been a simple substitution of one element for another.
Regarding claim 6, the combination of Jeon and Kim described in the discussion of claim 5 further teaches “The display device including the semiconductor light emitting device according to claim 5, wherein the first conductive layer and the second conductive layer are configured to overlap the planarization layer” (Jeon Fig. 16; note that portions of the first and second electrodes 4020 and 4040 overlap the planarization layer 4030; Kim Fig. 14, first and second reflective electrodes RFE1 and RFE2; note that the reflective electrodes overlap the planarization layer in the combined device), “and wherein a portion of each of the first clad layer and the second clad layer is disposed inside the first opening” (Jeon Fig. 16; note that portions of the first and second electrodes 4020 and 4040 overlap the opening in the planarization layer 4030 containing the light emitting device; Kim Fig. 14, first and second capping electrodes CPE1 and CPE2; note that portions of the capping electrodes overlap the opening in the planarization layer in the combined device).
Regarding claim 7, the combination of Jeon and Kim described in the discussion of claim 5 further teaches “The display device including the semiconductor light emitting device according to claim 5, wherein the second clad layer is configured to cover a portion of the first clad layer on the first clad layer” (Jeon Fig. 16; note that portions of the first and second electrodes 4020 and 4040 overlap each other; Kim Fig. 14, first and second capping electrodes CPE1 and CPE2; note that portions of the capping electrodes overlap each other in the combined device).
Regarding claim 8, the combination of Jeon and Kim as applied to claim 5 further teaches “The display device including the semiconductor light emitting device according to claim 7, wherein the first clad layer is divided into a first region” (Jeon Fig. 16, portion of the second electrode 4040 that does not overlap the first electrode 4020; Kim Fig. 14, first and second capping electrodes CPE1 and CPE2; note that a portion of the first capping electrode CPE1 would not overlap the second capping electrode CPE2 in the combined device) “and a second region” (Jeon Fig. 16, portion of the second electrode 4040 that overlaps the first electrode 4020; Kim Fig. 14, first and second capping electrodes CPE1 and CPE2; note that a portion of the first capping electrode CPE1 would overlap the second capping electrode CPE2 in the combined device), “wherein the second clad layer is configured to cover at least a portion of the second region” (Jeon Fig. 16, portion of the second electrode 4040 that overlaps the first electrode 4020; Kim Fig. 14, first and second capping electrodes CPE1 and CPE2; portion of the first capping electrode CPE1 that overlaps the second capping electrode CPE2 in the combined device).
Regarding claim 9, the combination of Jeon and Kim described in the discussion of claim 5 further teaches “The display device including the semiconductor light emitting device according to claim 8, wherein the first region of the first clad layer is not configured to vertically overlap with the second clad layer” (Jeon Fig. 16, portion of the second electrode 4040 that overlaps the first electrode 4020; Kim Fig. 14, first and second capping electrodes CPE1 and CPE2; portion of the first capping electrode CPE1 that overlaps the second capping electrode CPE2 in the combined device).
Regarding claim 11, the combination of Jeon and Kim described in the discussion of claim 5 teaches “The display device including the semiconductor light emitting device according to claim 5”, but does not teach “further comprising a third clad layer disposed on the first clad layer and in contact with the first electrode of the light emitting device.”
Kim, on the other hand, shows an embodiment of their invention (Kim Fig. 5) in which there is a third electrode layer disposed on the two-layer electrodes E1 and E2 (Kim [0121]; Fig. 5, connection electrodes CNE1 and CNE2) that each connect to an electrode of the light emitting element ED. Furthermore, Kim teaches that these connection electrodes can be made from transparent conductive oxides (Kim [0123]: “In one embodiment, for example, the conductive material may include at least one of IZO, ITO, IGO, IGZO, or any mixture/compound thereof.”).
The third electrode layers of Kim can be incorporated into the combined device of Jeon and Kim described in the discussion of claim 5 as a third layer on the first electrode of Jeon, said third layer corresponding to the second connection electrode CNE2, connected to the first conductive electrode of said combined device. The combined device teaches “further comprising a third clad layer disposed on the first clad layer” (Kim [0121]; Fig. 5, second connection electrode CNE2; note that this layer would overlap the first capping electrode CPE1 in the combined device and can thus still be considered to be disposed on it) “and in contact with the first electrode of the light emitting device” (Jeon Fig. 16, first electrode 4020; note that the second connection electrode CNE2 would contact the first conductive electrode 4156 in the combined device). Furthermore, the third layer has a greater contact area with the light emitting diode (Kim Fig. 5; note the greater contact area of the second connection electrode CNE2 to the light emitting diode ED).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have introduced a third layer to the first electrode of the combined device of Jeon and Kim described in the discussion of claim 5 as taught by Kim because it would help to increase the contact area between the first electrode and the first conductive electrode and it would have been a simple combination of elements of the two disclosures.
Regarding claim 14, the combination of Jeon and Kim described in the discussion of claim 13 teaches “The method of manufacturing the display device including the semiconductor light emitting device according to claim 13”, but does not teach “wherein the forming the first assembly wiring on the substrate comprises forming a semiconductor layer on the substrate.”
Kim, on the other hand, teaches a similar device with two electrodes consisting of two layers (Kim [0134]; Fig. 14, first and second electrodes E1a and E2a) consisting of two layers (Kim [0115]; Fig. 14, note that the first electrode consists of a first reflective electrode RFE1 and a first capping electrode CPE1, and that the second electrode consists of a second reflective electrode RFE2 and a second capping electrode CPE2). Furthermore, Kim teaches that the first and second reflective electrodes RFE1 and RFE2 are made of a reflective material (Kim [0116]) and the first and second capping electrodes CPE1 and CPE2 may be made from transparent oxide semiconductors (Kim [0117]).
The double-layered electrodes of Kim can be incorporated into the device of Jeon as similar double-layered electrodes. The layers of the second electrode of Jeon may be arranged such that the lower layer (corresponding to RFE1 of Kim) is made of a stack of indium tin oxide, silver, and another layer of indium tin oxide and does not overlap with the first electrode, while the upper layer (corresponding to CPE1 of Kim and made of a transparent conducting material) is made of a transparent conductive material and does overlap with the first electrode. The combination of Jeon and Kim just described teaches “wherein the forming the first assembly wiring on the substrate comprises forming a semiconductor layer on the substrate” (Kim [0115], [0117]; Fig. 14, first and second capping electrodes CPE1 and CPE2; note that the first and second capping electrodes CPE1 and CPE2 are both made of transparent oxide semiconductors).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the application to have modified the electrodes of Jeon to have two layers, the upper of the two layers made of a transparent conducting material, as taught by Kim because doing so makes it possible for light to pass through the electrode and it would have been a simple substitution of one element for another.
Allowable Subject Matter
Claims 10 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 15-20 would be allowable if rewritten to overcome the rejections under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record, whether considered individually or in combination, especially when all claim limitations are taken into account, do not teach or suggest the limitations of:
Claim 10, which recites “wherein the second region of the first clad layer is not configured to become conductive.”
Claim 12, which recites “wherein the third clad layer is supplied with power of a same polarity as the first clad layer.”
Claim 15, which recites “wherein the making the portion of the first assembly wiring into the conductor comprises doping the first assembly wiring on top of the first assembly wiring using the second assembly wiring as a mask.”
Claims 16-20 are dependent on claim 15, and therefore contain the same allowable material.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Robert E Throckmorton whose telephone number is (571) 272-7014. The examiner can normally be reached 7:30 AM - 11:30 AM and 12:30 PM - 4:30 PM ET Monday to Friday.
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/R.E.T./Examiner, Art Unit 2818
/CUONG B NGUYEN/Primary Examiner, Art Unit 2818
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