Prosecution Insights
Last updated: October 25, 2026
Application No. 18/713,734

INTEGRATED CIRCUIT SYSTEMS COOLED BY EMBEDDED MICROTUBES

Final Rejection §103
Filed
May 28, 2024
Priority
Dec 31, 2021 — TÜ 2021/022036 +1 more
Examiner
PRASAD, NEIL R
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sabanci Universitesi Nanoteknoloji Arastirma Ve Uygulama Merkezi Sunum
OA Round
2 (Final)
86%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
618 granted / 723 resolved
+17.5% vs TC avg
Moderate +10% lift
Without
With
+9.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
27 currently pending
Career history
751
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
58.5%
+18.5% vs TC avg
§102
28.3%
-11.7% vs TC avg
§112
4.3%
-35.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 723 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 9/23/2026 have been fully considered but they are not persuasive. Applicant argues that secondary reference Koeneman (‘788) does not disclose a tube since the cooling fluid (208) circulates through the microchannels (270) and is in contact with the die with no tube. It is agreed that the cooling fluid contacts the die (paragraph 18), but this is not in all portions. There are microchannels (170) (grooves), with pumps (190) (tubes) therein (Figure 3), which help circulate the cooling fluid (208) (Figure 4). These pumps are membranes which help restrict or allow fluid to flow as desired (paragraphs 30-31). Applicant also argues that primary reference does not disclose the claimed tube within the groove. It is agreed upon that this feature is not taught by the primary reference. Additionally, secondary reference Koeneman (‘788) discloses all of the features of claim 1 including at least one chip (110) with a groove (170), and a tube (190) in the groove, which allows transport of a cooling fluid (208) (paragraphs 28-35). Even tertiary reference Oganesian (‘148) teaches a tube (70) in a groove (26) of an image sensor substrate (10). In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). In this case, the membrane tubes (190) are found in grooves (270) which help to circulate cooling fluid through the grooves of the die and/or interposer (paragraph 28). Additionally, the test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981). The combination solves a problem of circulation by using MEMS tubes to circulate the cooling fluid, which improves cooling efficiency. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-8 and 13-20 are rejected under 35 U.S.C. 103 as being unpatentable over Koeneman (US Publication No. 2013/0044431) in view of Koeneman et al. (US Publication No. 2003/0110788). Regarding claim 1, Koeneman (‘431) discloses an integrated circuit unit (100) comprising: at least one electronic chip (120) consisting of a wafer body with at least one groove (22) extending along its surface from one end to the other, and of an active area (24) (Figure 1) Koeneman (‘431) does not disclose the integrated circuit unit further comprises at least one tube, which is housed in the said at least one groove, and which allows a transport of a cooling fluid for cooling the at least one electronic chip. However, Koeneman (‘788) discloses a tube (290) housed in a groove (270) for cooling fluid (paragraph 34). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the integrated circuit unit of Koeneman (‘431) to include a tube in the groove, as taught by Koeneman (‘788), since it can improve cooling efficiency of the system (paragraph 35). Regarding claim 2, Koeneman (‘431) discloses the at least one grooves extend parallel to each other along a horizontal axis of the wafer body (paragraph 27). Regarding claim 3, Koeneman (‘788) discloses the at least one tube is configured not to allow the cooling fluid carried therein to contact with an active area (side with solder balls 232) and the wafer body (1) of the at least one electronic chip (10), and configure-configured to allow only the fluid transfer. As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 4, Koeneman (‘431) discloses the geometry of the said at least one groove is in the shape of rectangular prism (Figure 1). Regarding claim 5, Koeneman (‘431) discloses the integrated circuit comprises the at least one groove (22) obtained on the wafer body (20) directly by wet etching or dry etching method (paragraph 22). Regarding claim 6, Koeneman (‘431)/Koeneman (‘788) discloses the limitations as discussed in the rejection of claim 1 above. Koeneman (‘431) also discloses any suitable shape and size for fluidic pathways. Koeneman (‘431)/Koeneman (‘788) is silent regarding the at least one tube has a form that does not include any corners along its circumference, preferably a circular form. However, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the shape to be circular to maximize structural integrity of the channels, since it has been held that adjusting the shape of an article involves only routine skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Regarding claim 7, Koeneman (‘431) discloses the cooling fluid carried in the said at least one tube dielectric liquid (paragraph 24). Regarding claim 8, Koeneman (‘431) discloses the said dielectric liquid is water (paragraph 24). Regarding claim 13, Koeneman (‘788) discloses the wafer body is made of a semiconductor material, preferably silicon (paragraphs 5-6). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 14, Koeneman (‘431) discloses a three-dimensional stack-type integrated circuit system comprising two of the integrated circuit units (20) according to claim 1 (Figure 1; paragraphs 4-5). Regarding claim 15, Koeneman (‘431) discloses two electronic chips (20) with at least a part of which is aligned opposite to each other and the wafer bodies face each other, wherein each electronic chip has grooves (29) on the surfaces of the wafer body, at least a part of which is aligned opposite to each other, and the grooves (29) are configured to allow the at least one tube to be housed (23) therein (Figure 1). Regarding claim 16, Koeneman (‘431) discloses a three-dimensional stack-type integrated circuit system (40) comprising more than two of the integrated circuit units (20) according to claim 1 (Figure 1 shows 4 integrated circuit units 20). Regarding claim 17, Koeneman (‘788) discloses a method for forming the integrated circuit unit according to claim 1, comprising the steps of: providing at least one electronic chip (20) consisting of a wafer body and an active area (solder side 232), forming at least one groove (270) extending from one end to the other along the surface of the wafer body of the at least one electronic chip (20), and housing the at least one tube (290) in the said groove (270). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 18, Koeneman (‘431) discloses the integrated circuit comprises the at least one groove (22) obtained on the wafer body (20) directly by wet etching or dry etching method (paragraph 22). Regarding claim 19, Koeneman (‘788) discloses the at least one tube is configured not to allow the cooling fluid carried therein to contact with an active area (side with solder balls 232) and the wafer body (1) of the at least one electronic chip (10), and configure-configured to allow only the fluid transfer. As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 20, Koeneman (‘431) discloses the geometry of the said at least one groove is in the shape of rectangular prism (Figure 1). Claims 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Koeneman (US Publication No. 2013/0044431) in view of Koeneman et al. (US Publication No. 2003/0110788), and further in view of Oganesian et al. (US Publication No. 2015/0084148). Regarding claim 9, Koeneman (‘431)/Koeneman (‘788) discloses the limitations as discussed in the rejection of claim 1 above. Koeneman (‘431)/Koeneman (‘788) does not disclose a thermal conductive material is provided in the at least one groove where the said at least one tube is placed. However, Oganesian discloses a groove (26) in a chip (10) with thermal conductive material (72) provided in the groove where a tube (70) is placed (Figure 4). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the grooves of Koeneman (‘431)/Koeneman (‘788) to include a thermal paste surrounding a tube, as taught by Oganesian, since it can enhance thermal conduction between the heat pipes (70) and substrate (10) and provided structural support (paragraph 34). Regarding claim 10, Oganesian discloses the gap (26) in the at least one groove contains, partially or completely, a thermal conductive material (72) (Figure 4). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 11, Oganesian/Koeneman (‘431)/Koeneman (‘788) discloses the limitations as discussed in the rejection of claim 9 above. Oganesian/Koeneman (‘431)/Koeneman (‘788) is silent regarding the thermal conductivity coefficient of the thermal conductive material is in the range of 50-75 W/m.K. However, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the thermal conductive material to conduct heat in this range to optimize heat dissipation while maintaining structural integrity of the device, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claim 12, Oganesian discloses the thermal conductive material is a thermal paste (paragraph 34). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NEIL R PRASAD whose telephone number is (571) 270-3129. The examiner can normally be reached M-F 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /N.R.P/ 10/6/2026Examiner, Art Unit 2897 /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

May 28, 2024
Application Filed
Jul 01, 2026
Non-Final Rejection mailed — §103
Sep 23, 2026
Response Filed
Oct 15, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12765381
ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
3y 4m to grant Granted Oct 13, 2026
Patent 12765409
INTERCONNECTION STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
2y 5m to grant Granted Oct 13, 2026
Patent 12751178
OLED DISPLAY PANEL AND PREPARATION METHOD THEREFOR
3y 9m to grant Granted Sep 29, 2026
Patent 12751167
DISPLAY DEVICE
2y 6m to grant Granted Sep 29, 2026
Patent 12702025
SCALABLE ELECTRONICS MANUFACTURING WITH RIGID TILE PANEL EMBEDDING
1y 5m to grant Granted Aug 04, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
86%
Grant Probability
95%
With Interview (+9.6%)
2y 3m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 723 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month