DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5, 7, 9 and 13-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ha et al. (US 2021/0367039 A1).
Regarding claim 1, Ha discloses a field effect transistor (Fig 1-6), comprising a drift layer (107); a first P-well portion (110) disposed within the drift layer, and a first N-source portion (112) disposed at least partially over the first P-well portion. Note that while Ha discloses the layers having first and second conductivity types instead of being P and N, this is merely common language in the art to indicate that they are oppositely doped and such doping can either be P as the first type and N as the second type or N as the first type and P as the second type in such a manner as to disclose both embodiments to one of ordinary skill in the art.
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Additionally, Ha discloses that the field effect transistor comprises repeating units of the P-well and N-source regions (Fig 2), such that a first unit is considered the first section, a second unit is considered the first area of the second section, and a third unit is considered the second area of the second section. This reading of Ha is possible because no structural differences distinguish the three claimed portions of the field effect transistor.
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Regarding claim 2, Ha discloses that a first section including a first channel (110c) is disposed in an upper portion of the P-well between a first upwardly extending region of the drift layer (107) and the first N-source portion (110), this feature being most easily seen in Fig 3.
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As discussed regarding claim 1 above, the various limitations of the first section, first area of the second section, and second area of the second section can all be considered repeats of the cited structures as seen most clearly in Fig 2.
Regarding claims 3 and 4, while Ha does not explicitly call the upwardly extending region of the drift layer a JFET region, the function of the region is inherent in the disposition of the elements therein and it stands to reason as the structure of Ha is similar to that claimed the upwardly extending region of the drift layer may similarly be termed a JFET region.
Regarding claim 5, Ha discloses that the P-well portions include sidewalls that extend upwards from the drift layer to form an enclosed structure with an outer perimeter and an inner perimeter (Fig 2, 110); the N-source portions surround the outer perimeter of the sidewalls (Fig 2, 112); the upwardly extending portion of the drift layer extends upwards through the inner perimeter of the sidewalls (Fig 2, 107); and the channels (110c) are disposed in an upper portion of the sidewalls (Fig 3).
Regarding claim 7, Ha discloses an oxide layer (118 & 120) disposed over the P-well (110), the N-source (112), and the drift layer (107); a metal layer (140) disposed over the oxide layer, the metal layer in electrical communication with the P-well and the N-source; and a gate layer (120) extending at least partially though the oxide layer between the metal layer and the P-well
Regarding claim 9, Ha discloses that the oxide layer, the metal layer and the gate layer extend over the device (Fig 1), where any portion including the P-well and N-source may be considered the second section.
Regarding claim 13, Ha discloses a plurality of second sections (Fig 2, additional repeating units of the P-well 110 and N-source 112).
Regarding claim 14, Ha discloses a field effect transistor (Fig 1-6), comprising: a drift layer (107), a P-well portion (110) disposed over the drift layer, and a N-source portion (112) disposed at least partially over the first P-well portion; where the P-well portion includes sidewalls that extend upwards from the drift layer to form an enclosed structure with an outer perimeter and an inner perimeter, an N-source portion surrounding the outer perimeter of the sidewalls of the P-well portion (Fig 2); and an upwardly extending intermediate portion of the drift layer that extends upwards though the inner perimeter of the sidewalls of the area P-well portion (Fig 3).
Similarly to claim 1 above, Ha discloses that the field effect transistor comprises repeating units of the P-well and N-source regions (Fig 2), such that a first unit is considered the first section, a second unit is considered the first area of the second section, and a third unit is considered the second area of the second section. This reading of Ha is possible because no structural differences distinguish the three claimed portions of the field effect transistor.
Regarding claim 15, Ha discloses a channel (110c) disposed in an upper portion of the P-well portion between a first upwardly extending region of the drift layer and the N-source portion.
Regarding claim 16, Ha discloses that the inner perimeter and outer perimeter of the enclosed structure are substantially rectangular in shape (Fig 2).
Regarding claim 17, Ha discloses that the field effect transistor comprises a plurality of second sections (additional repeating units per Fig 2).
Regarding claim 18, while Ha does not explicitly call the upwardly extending region of the drift layer a JFET region, the function of the region is inherent in the disposition of the elements therein and it stands to reason as the structure of Ha is similar to that claimed the upwardly extending region of the drift layer may similarly be termed a JFET region.
Regarding claim 19, Ha discloses an oxide layer (118 & 120) disposed over the P-well (110), the N-source (112), and the drift layer (107); a metal layer (140) disposed over the oxide layer, the metal layer in electrical communication with the P-well and the N-source; and a gate layer (120) extending at least partially though the oxide layer between the metal layer and the P-well
Regarding claim 20, Ha discloses that the oxide layer, the metal layer and the gate layer extend over the device (Fig 1), where any portion including the P-well and N-source may be considered the second section.
Allowable Subject Matter
Claims 8, 10-12 and 21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Prior art does not disclose or suggest the distinct metal via and distinct contact along with the other limitations found in claims 10 and 21.
Additionally, prior art does not disclose or suggest the P-source having the structure of claim 8, the closest structure to that element being P contact 114 of Ha, Fig 5.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL P SHOOK whose telephone number is (571)270-7890. The examiner can normally be reached 9:00 am - 5:00 pm, Mon-Fri.
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/DANIEL P SHOOK/Primary Examiner, Art Unit 2896
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