DETAILED ACTION
The following claims are pending in this office action: 1-13
Claims 1, 10 and 12 are independent claims.
The following claims are amended: 1-3, 11 and 13
The following claims are new: -
The following claim is cancelled: -
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings filed on 06/03/2024 are accepted.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/03/2024 has been considered. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, an initialed and dated copy of Applicant’s IDS form 1449 filed 06/03/2024 is attached to the instant Office action.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 6 is rejected under 35 U.S.C. 112(b), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claim 6 recites the limitation “the predicted execution time” (claim 6, ln. 7). There is insufficient antecedent basis for this limitation in the claim. Examiner suggests replacing “the predicted execution time” with “a predicted execution time” or making the claim dependent on claim 2.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4-5 and 8-13 are rejected under 35 U.S.C. 103 as being unpatentable over Nied et al. (US Pub. 2020/0073713) (hereinafter “Nied”) in view of Courtney (US Pub. 2018/0323960) (hereinafter “Courtney”).
As per claim 1, Nied teaches a method for enhancing of a computerized digital device, the method comprising: ([Nied, para. 0005] “A method of scheduling tasks within ... highly paralleled processing unit is described”; [para. 0032] “This scheduling approach improves the efficiency ... overall”; Courtney teaches protecting a computerized digital security device against side-channel, fault injection, and timing attacks, however, as this is the preamble, it is interpreted as non-limiting as it is merely the intended purpose; this preamble is omitted from the mappings below for the same reason)
identifying asynchronous tasks to be performed by the computerized digital device; ([Nied, para. 0035; Fig. 1] “the scheduler 102 receives [identifying] tasks 110 [asynchronous tasks] ... scheduled for execution [to be performed] by the processing unit [computerized digital device]”; [para. 0038] “Tasks ... complete out of order [asynchronous tasks] ... in a different order from the order in which they were received”)
placing identified asynchronous tasks in an asynchronous task queue; and ([Nied, para. 0035; Fig. 1] “these tasks 110 are added to the task queue 108”)
executing a first application, including: ([Nied, para. 0031] “Described herein is a method of scheduling tasks [executing as scheduling includes executing of the tasks – see para. 0032 “the scheduling method ... which a task can be selected for execution”] ... for high performance computing applications ... application where there are lots of tasks [executing a first application] ... tasks ... defining a program to be run on a set of data”)
nonlinearizing execution of the application by performing the steps: ([Nied, para. 0038] “Tasks [the application] ... complete [execution] out of order [nonlinearizing] ... in a different order from the order in which they were received”)
selecting at least one task from the asynchronous task queue; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... selectively scheduled”)
executing the selected at least one task; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... scheduled for execution”; [para. 0055] “a task has fully executed”)
removing the selected at least one task from the asynchronous task queue. ([Nied, para. 0055] “removes the particular task from the task queue”)
Nied does not clearly teach protecting a computerized digital security device against side-channel, fault injection, and timing attacks; and identifying asynchronous tasks to be performed by the computerized digital security device.
However, Courtney teaches protecting a computerized digital security device against side-channel, fault injection, and timing attacks; ([Courtney, para. 0028] “the crypto engine [computerized digital security device] ... implement countermeasure to defeat [protecting the device] various forms of DPA attacks [side-channel, fault injection, and timing attacks]”)
identifying asynchronous tasks to be performed by the computerized digital security device. ([Courtney, para. 0067] “a selected cryptographic function [asynchronous task as functions includes encrypting/decryption using private/public keys – see para. 0039] is identified ... the cryptographic function will be executed [to be performed] by cryptographic processing circuitry [by the computerized digital security device]”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to have modified the elements disclosed by Nied with the teachings of Courtney to include identifying asynchronous tasks to be performed by the computerized digital security device. One of ordinary skill in the art would have been motivated to make this modification because such a scheme may be used to reduce or eliminate unwanted access to data by unauthorized user of digital data storage systems. (Courtney, para. 0018)
As per claim 4, Nied in view of Courtney teaches claim 1.
Nied also teaches the method comprising shuffling execution of the first application ([Nied, para. 0038] “if there are tasks in the task queue 108 behind a completing task, their position in the task queue [execution of the first application as per above] 108 is shifted [shuffling]”) by selecting at least one task from the asynchronous task queue and executing the selected at least one task ([para. 0050; Fig. 4] “Having identified a task of the selected task type [selecting at least one task] ... then the identified task is sent for execution [executing the selected at least one task]”) prior to continuing execution of the first application. ([Para. 0050; Fig. 4] “it is determined [in a previous iteration as this method was repeated] that not all the task dependencies of the identified task are met, the identified task is not yet ready for execution [prior to continuing execution of the first application as the task is for execution of the first application] ... the task type ... of the identified task is cleared ... and the method may be repeated”)
As per claim 5, Nied in view of Courtney teaches claim 1.
Nied also teaches the method comprising desynchronizing execution of the first application ([Nied, para. 0038] “Tasks 110 in the task queue 108 may complete [execution] out of order [desynchronizing] ... in a different order to the order in which they were received by the scheduler 102 and placed”) by modifying execution flow of the first application ([para. 0038] “if there are tasks in the task queue 108 behind a completing task, their position in the task queue [executing flow of the application] 108 is shifted [modifying]”) by selecting at least one task from the asynchronous task queue and executing the selected task ([para. 0050; Fig. 4] “Having identified a task of the selected task type [selecting at least one task] ... then the identified task is sent for execution [executing the selected at least one task]”) prior to continuing execution of the first application. ([Para. 0050; Fig. 4] “it is determined [in a previous iteration as this method was repeated] that not all the task dependencies of the identified task are met, the identified task is not yet ready for execution [prior to continuing execution of the first application as the task is for execution of the first application] ... the task type ... of the identified task is cleared ... and the method may be repeated”)
As per claim 8, Nield in view of Courtney teaches claim 1.
Nield also teaches wherein tasks added to the asynchronous task queue include tasks selected from tasks required by the first application. ([Nied, para. 0031] “Described herein is a method of scheduling tasks [tasks added to the asynchronous task queue] ... for high performance computing applications [required by the first application]”; [para. 0038] “the scheduler ... adds tasks 110 that are received to the task queue [added to the asynchronous task queue] ... selectively schedules tasks [include tasks selected] ... for execution ... until the program ... has finished executing ... to which the task relates [from tasks required by the first application]”)
Nield does not clearly teach wherein tasks added to the asynchronous task queue include tasks required by an operating system of the computerized digital security device, and tasks required by applications other than the first application.
However, Courtney teaches wherein tasks added to the asynchronous task queue ([Courtney, para. 0040] “the cryptographic algorithm ... broken up into a sequence [queue] of ... a series of combinational functions [tasks] ... FCN(1) to FCN(4) ... that are successively carried out [added]”) include tasks required by an operating system of the computerized digital security device, ([para. 0032] “the data storage device ... including ... a computer [operating system]”; [para. 0033] “a data storage device 110 ... the data storage device 100 of Fig. 1; [para. 0037] “a cryptographic algorithm block [of the computerized digital security device] ... which forms a portion of... 110 [operating system] ... to transform ... plaintext, into ... ciphertext”; [para. 0039] “cryptographic function [tasks] ... used by the block [required by an operating system of the computerized digital security device] ... to transform the input plaintext to provide the output ciphertext”) and tasks required by applications other than the first application. ([Para. 0060] “the control circuit ... can instruct the crypto engine ... to perform other functions .... including non-crypto based functions”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to combine the teachings of Nield and Courtney for the same reasons as disclosed above.
As per claim 9, Nield in view of Courtney teaches claim 1.
Nield does not clearly teach wherein tasks added to the asynchronous task queue include tasks selected from the group computation of a very large prime number, defragmentation of memory, non-volatile memory (NVM) page refresh, NVM erase, NVM write, generation of a small buffer of random numbers using hardware true random number generation, security sensor check, memory integrity verification, code execution flow control, data compression, and data decompression.
However, Courtney teaches wherein tasks added to the asynchronous task queue include ([Courtney, para. 0040] “the cryptographic algorithm ... broken up into a sequence [queue] of ... a series of combinational functions [tasks] ... FCN(1) to FCN(4) ... that are successively carried out [added]”) tasks selected from the group computation of a very large prime number, defragmentation of memory, non-volatile memory (NVM) page refresh, NVM erase, NVM write, generation of a small buffer of random numbers using hardware true random number generation, security sensor check, memory integrity verification, code execution flow control, data compression, and data decompression. ([Para. 0039] “any cryptographic function can be used by the block 130 to transform the input plaintext data to provide the output ciphertext data”; [para. 0060] “the control circuit ... can instruct the crypto engine ... to perform other functions .... including non-crypto based functions”; Examiner takes Official Notice that claimed functions are well known/common knowledge in the art to be part of cryptographic algorithms or non-cryptographic general computer processes executable by a computer application; for example, computation of a very large prime number is known in the art to generate an encryption key, which is disclosed as a cryptographic function in Courtney, NVM erase and NVM write are disclosed tasks in para. 0035, generation of a buffer of random number using TRNG is commonly used in encryption/decryption; such a finding is further supported by pg. 11 of the International Search Report and Written Opinion disclosed in Applicant’s IDS dated 06/03/2024 which states “Depend claims ... 9 ... describe ... features readily apparent to a skilled person based on his common general knowledge of the art”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to combine the teachings of Nield and Courtney for the same reasons as disclosed above.
As per claim 10, Nield teaches a digital device having improved performance, comprising: ([Nied, para. 0005] “A method of scheduling tasks within ... highly paralleled processing unit is described”; [para. 0032] “This scheduling approach improves the efficiency ... overall”; Courtney teaches a digitalized security device protected against side-channel, fault injection, and timing attacks, however, as this is the preamble, it is interpreted as non-limiting as it is merely the intended purpose; this preamble is omitted from the mappings below for the same reason)
a processor; and ([Nied, para. 0082] “methods described herein ... performed by one or more processors”)
a memory connected to the processor, the memory including instructions executable by the processor, ([Nied, para. 0082] “methods described herein ... configured with software [instructions] in machine readable form stored on ... memory ... software ... suitable for execution on [connected to and executable by] a ... processor”) including instructions for nonlinearizing execution of a first application by causing the processor to: ([para. 0038] “Tasks [the application] ... complete [execution] out of order [nonlinearizing] ... in a different order from the order in which they were received”)
identify asynchronous tasks to be performed by the computerized digital device; ([Nied, para. 0035; Fig. 1] “the scheduler 102 receives [identifying] tasks 110 [asynchronous tasks] ... scheduled for execution [to be performed] by the processing unit [computerized digital device]”; [para. 0038] “Tasks ... complete out of order [asynchronous tasks] ... in a different order from the order in which they were received”)
place identified asynchronous tasks in an asynchronous task queue; and ([Nied, para. 0035; Fig. 1] “these tasks 110 are added to the task queue 108”)
execute a first application, performing the steps: ([Nied, para. 0031] “Described herein is a method of scheduling tasks [executing as scheduling includes executing of the tasks – see para. 0032 “the scheduling method ... which a task can be selected for execution”] ... for high performance computing applications ... application where there are lots of tasks [executing a first application] ... tasks ... defining a program to be run on a set of data”)
selecting at least one task from the asynchronous task queue; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... selectively scheduled”)
executing the selected at least one task; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... scheduled for execution”; [para. 0055] “a task has fully executed”)
removing the selected at least one task from the asynchronous task queue. ([Nied, para. 0055] “removes the particular task from the task queue”)
Nied does not clearly teach a digitalized security device protected against side-channel, fault injection, and timing attacks; and identify asynchronous tasks to be performed by the computerized digital security device.
However, Courtney teaches a digitalized security device protected against side-channel, fault injection, and timing attacks; and ([Courtney, para. 0028] “the crypto engine [computerized digital security device] ... implement countermeasure to defeat [protecting the device] various forms of DPA attacks [side-channel, fault injection, and timing attacks]”)
identify asynchronous tasks to be performed by the computerized digital security device. ([Courtney, para. 0067] “a selected cryptographic function [asynchronous task as functions includes encrypting/decryption using private/public keys – see para. 0039] is identified ... the cryptographic function will be executed [to be performed] by cryptographic processing circuitry [by the computerized digital security device]”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to have modified the elements disclosed by Nied with the teachings of Courtney to include a digitalized security device protected against side-channel, fault injection, and timing attacks; and identify asynchronous tasks to be performed by the computerized digital security device. One of ordinary skill in the art would have been motivated to make this modification because such a scheme may be used to reduce or eliminate unwanted access to data by unauthorized user of digital data storage systems. (Courtney, para. 0018)
As per claim 11, Nield in view of Courtney teaches claim 10.
Nield also a device programed to perform steps of: ([Nied, para. 0082] “methods described herein ... performed by a computer configured with software [instructions] in machine readable form”; Examiner interprets device as the processor programmed to perform the steps below, and not a mean-plus-function invocation as the device includes the structure, a processor, to perform the steps described)
identifying asynchronous tasks to be performed by the computerized digital device; ([Nied, para. 0035; Fig. 1] “the scheduler 102 receives [identifying] tasks 110 [asynchronous tasks] ... scheduled for execution [to be performed] by the processing unit [computerized digital device]”; [para. 0038] “Tasks ... complete out of order [asynchronous tasks] ... in a different order from the order in which they were received”)
placing identified asynchronous tasks in an asynchronous task queue; and ([Nied, para. 0035; Fig. 1] “these tasks 110 are added to the task queue 108”)
executing a first application, including: ([Nied, para. 0031] “Described herein is a method of scheduling tasks [executing as scheduling includes executing of the tasks – see para. 0032 “the scheduling method ... which a task can be selected for execution”] ... for high performance computing applications ... application where there are lots of tasks [executing a first application] ... tasks ... defining a program to be run on a set of data”)
nonlinearizing execution of the application by performing the steps: ([Nied, para. 0038] “Tasks [the application] ... complete [execution] out of order [nonlinearizing] ... in a different order from the order in which they were received”)
selecting at least one task from the asynchronous task queue; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... selectively scheduled”)
executing the selected at least one task; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... scheduled for execution”; [para. 0055] “a task has fully executed”)
removing the selected at least one task from the asynchronous task queue. ([Nied, para. 0055] “removes the particular task from the task queue”)
Nied does not clearly teach identifying asynchronous tasks to be performed by the computerized digital security device.
However, Courtney teaches identifying asynchronous tasks to be performed by the computerized digital security device. ([Courtney, para. 0028] “the crypto engine [computerized digital security device] ... implement countermeasure to defeat [protecting the device] various forms of DPA attacks [side-channel, fault injection, and timing attacks]”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to combine the teachings of Nield and Courtney for the same reasons as disclosed above.
As per claim 12, Nied teaches a non-transitory memory comprising instructions to cause a processor of a digital device to perform a method ([Nied, para. 0082] “methods described herein ... configured with software [instructions] in machine readable form stored on ... memory [non-transitory – see para. 0084] ... software ... suitable for execution on a ... processor”) for enhancing performance ([para. 0032] “This scheduling approach improves the efficiency ... overall”) including instructions for nonlinearizing execution of a first application by causing a processor to: ([para. 0038] “Tasks [the application] ... complete [execution] out of order [nonlinearizing] ... in a different order from the order in which they were received”; Courtney teaches protecting a computerized digital security device against side-channel, fault injection, and timing attacks, however, as this is the preamble, it is interpreted as non-limiting as it is merely the intended purpose; this preamble is omitted from the mappings below for the same reason)
identify asynchronous tasks to be performed by the computerized digital device; ([Nied, para. 0035; Fig. 1] “the scheduler 102 receives [identifying] tasks 110 [asynchronous tasks] ... scheduled for execution [to be performed] by the processing unit [computerized digital device]”; [para. 0038] “Tasks ... complete out of order [asynchronous tasks] ... in a different order from the order in which they were received”)
place identified asynchronous tasks in an asynchronous task queue; and ([Nied, para. 0035; Fig. 1] “these tasks 110 are added to the task queue 108”)
execute a first application, performing the steps: ([Nied, para. 0031] “Described herein is a method of scheduling tasks [executing as scheduling includes executing of the tasks – see para. 0032 “the scheduling method ... which a task can be selected for execution”] ... for high performance computing applications ... application where there are lots of tasks [executing a first application] ... tasks ... defining a program to be run on a set of data”)
selecting at least one task from the asynchronous task queue; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... selectively scheduled”)
executing the selected at least one task; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... scheduled for execution”; [para. 0055] “a task has fully executed”)
removing the selected at least one task from the asynchronous task queue. ([Nied, para. 0055] “removes the particular task from the task queue”)
Nied does not clearly teach protecting a computerized digital security device against side-channel, fault injection, and timing attacks; and identify asynchronous tasks to be performed by the computerized digital security device;
However, Courtney teaches protecting a computerized digital security device against side-channel, fault injection, and timing attacks; and ([Courtney, para. 0028] “the crypto engine ... implement countermeasure to defeat [protecting the device] various forms of DPA attacks [side-channel, fault injection, and timing attacks]”)
identify asynchronous tasks to be performed by the computerized digital security device. ([Courtney, para. 0067] “a selected cryptographic function [asynchronous task as functions includes encrypting/decryption using private/public keys – see para. 0039] is identified ... the cryptographic function will be executed [to be performed] by cryptographic processing circuitry [by the computerized digital security device]”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to have modified the elements disclosed by Nied with the teachings of Courtney to include protecting a computerized digital security device against side-channel, fault injection, and timing attacks; and identify asynchronous tasks to be performed by the computerized digital security device. One of ordinary skill in the art would have been motivated to make this modification because such a scheme may be used to reduce or eliminate unwanted access to data by unauthorized user of digital data storage systems. (Courtney, para. 0018)
As per claim 13, Nied in view of Courtney teaches claim 12.
Nied also teaches instructions to cause the processor of the digital security device to perform steps of: ([Nied, para. 0070] “A processor ... with processing capability such that it can execute instructions”; [para. 0082] “methods described herein ... performed by one or more processors”)
identifying asynchronous tasks to be performed by the computerized digital device; ([Nied, para. 0035; Fig. 1] “the scheduler 102 receives [identifying] tasks 110 [asynchronous tasks] ... scheduled for execution [to be performed] by the processing unit [computerized digital device]”; [para. 0038] “Tasks ... complete out of order [asynchronous tasks] ... in a different order from the order in which they were received”)
placing identified asynchronous tasks in an asynchronous task queue; and ([Nied, para. 0035; Fig. 1] “these tasks 110 are added to the task queue 108”)
executing a first application, including: ([Nied, para. 0031] “Described herein is a method of scheduling tasks [executing as scheduling includes executing of the tasks – see para. 0032 “the scheduling method ... which a task can be selected for execution”] ... for high performance computing applications ... application where there are lots of tasks [executing a first application] ... tasks ... defining a program to be run on a set of data”)
nonlinearizing execution of the application by performing the steps: ([Nied, para. 0038] “Tasks [the application] ... complete [execution] out of order [nonlinearizing] ... in a different order from the order in which they were received”)
selecting at least one task from the asynchronous task queue; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... selectively scheduled”)
executing the selected at least one task; ([Nied, para. 0035; Fig. 1] “tasks 110 are ... scheduled for execution”; [para. 0055] “a task has fully executed”)
removing the selected at least one task from the asynchronous task queue. ([Nied, para. 0055] “removes the particular task from the task queue”)
Nied does not clearly teach identifying asynchronous tasks to be performed by the computerized digital security device.
However, Courtney teaches identifying asynchronous tasks to be performed by the computerized digital security device. ([Courtney, para. 0028] “the crypto engine [computerized digital security device] ... implement countermeasure to defeat [protecting the device] various forms of DPA attacks [side-channel, fault injection, and timing attacks]”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to combine the teachings of Nield and Courtney for the same reasons as disclosed above.
Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Nied in view Courtney as applied to claim 1 above, and further in view of Li et al. (US Pub. 2020/0409754) (hereinafter “Li”).
As per claim 2, Nied in view of Courtney teaches claim 1.
Nied in view of Courtney does not clearly teach predicting execution time for each identified asynchronous task; and wherein the step of selecting at least one task from the asynchronous task queue comprises basing the selection of the at least one task from the asynchronous task queue on the predicted execution times of tasks in the asynchronous task queue.
However, Li teaches predicting execution time for each identified asynchronous task; and ([Li, para. 0025] “After server computer system 100 receives a particular one of program tasks 120 [an out-of-order/asynchronous task – see para. 0018], task scheduling module 102 may... estimate an execution time for the particular program task”)
wherein the step of selecting at least one task from the asynchronous task queue comprises basing the selection of the at least one task from the asynchronous task queue on the predicted execution times of tasks in the asynchronous task queue. ([Li, para. 0026] “Task scheduling module 102 may then select, using the updated scheduling algorithm 108, the first set of task queues [from the asynchronous task queue] ... for the particular program task [selecting at least one task] ... the ones of program tasks 120 with estimated execution times that are greater than a threshold amount of time are stored in the first set of task queues 110 ... Similarly, the ones of program tasks 120 with estimated execution times that are less than a threshold amount of time are stored in the second set of task queues 112 ... The first set of task queues 110, therefore, may store ones of program tasks 120 [biasing the selection of the at least one task] that are estimated [on the predicted execution times] to take longer to execute”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to have modified the elements disclosed by Nied in view of Courtney with the teachings of Li to include predicting execution time for each identified asynchronous task; and wherein the step of selecting at least one task from the asynchronous task queue comprises basing the selection of the at least one task from the asynchronous task queue on the predicted execution times of tasks in the asynchronous task queue. One of ordinary skill in the art would have been motivated to make this modification because by doing so, the computer system will be able to schedule and execute program tasks more quickly, thereby allowing the computer to provide efficient services. (Li, para. 0027)
As per claim 3, Nied in view of Courtney and further in view of Li teaches claim 2.
Nied in view of Li does not clearly teach identifying an execution location at which to add desynchronization time; determining how much desynchronization time to add; wherein the step of selecting at least one task comprises selecting at least one task such that the predicted execution time of the selected at least one task sums to less than the determined desynchronization time to add; and performing at least one dummy task to equal the difference in execution time between the determined desynchronization time to add and the sum of the predicted execution time of the selected at least one task.
However, Courtney teaches identifying an execution location at which to add desynchronization time; ([Courtney, para. 0047] “FIG. 6 shows the beginning [an execution location T1] and ending locations of the associated processing operations carried out to execute the cry[p]to function to represent the overall processing interval [identifying an execution location]”; [para. 0058; Fig. 9] “The varying process intervals 160, 170 from FIG. 6 have been extended [add time], or padded, by respective pad intervals 182 and 192 ... time T4 [desynchronization time, as time defines how far apart the two functions are desynchronized]”)
determining how much desynchronization time to add; ([Courtney, para. 0059] “The overall duration of time [desynchronization time to add] ... predetermined”)
wherein the step of selecting at least one task comprises selecting at least one task such that the predicted execution time of the selected at least one task sums to less than the determined desynchronization time to add; and ([Courtney, para. 0059; Fig. 9] “The overall duration of time from time T1 to time T4 can be predetermined based on ... based on the worst-case scenario”; Fig. 9 shows the predicted execution time [T1 to T3 in the first selected function and T1 to T2 in the second selected function] is less than the determined desynchronizing time T4)
performing at least one dummy task to equal the difference in execution time between the determined desynchronization time to add and the sum of the predicted execution time of the selected at least one task. ([Courtney, para. 0058; Fig. 9] “The varying process intervals 160, 170 from FIG. 6 have been extended [add time], or padded, by respective pad intervals 182 and 192 [performing at least one dummy task – see para. 0060] “; Fig. 9 shows that the time PAD added is the difference in the sum of predicted execution time [for example, T3 for the first selected function and T2 for the second selected function] and the determined desynchronization time T4)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to have modified the elements disclosed by Nied in view of Courtney with the teachings of Li to include identifying an execution location at which to add desynchronization time; determining how much desynchronization time to add; wherein the step of selecting at least one task comprises selecting at least one task such that the predicted execution time of the selected at least one task sums to less than the determined desynchronization time to add; and performing at least one dummy task to equal the difference in execution time between the determined desynchronization time to add and the sum of the predicted execution time of the selected at least one task. One of ordinary skill in the art would have been motivated to make this modification because in this way, the associated cryptographic function will provide nominally the same overall elapsed period of time, thereby increasing the difficulty in gleaning useful side-channel information about the crypto function from a timing attack. (Courtney, para. 0030)
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Nied in view Courtney as applied to claim 1 above, and further in view of Wang et al. (US Pub. 2013/0138919) (hereinafter “Wang”).
As per claim 6, Nied in view of Courtney teaches claim 1.
Nied does not clearly teach identifying at least a first and a second code branch wherein execution time for the first and second code branch are unequal; and equalizing the execution time for the first and second code branch by selecting at least one task from the asynchronous task queue so that the predicted execution time of the selected at least one task balances the execution time of both code branches.
However, Courtney teaches equalizing the execution time by selecting at least one task from the asynchronous task queue. ([Courtney, para. 0029] “the control circuit may initiate [selecting at least one task] additional function calls or other processing operations, [from the asynchronous task queue] ... to continue the level of activity by the circuitry at a nominally consistent level [equalizing the execution time]”; [para. 0040] “the cryptographic algorithm [asynchronous tasks] ... broken up into a sequence [queue] of ... a series of combinational functions [tasks] ... FCN(1) to FCN(4) ... that are successively carried out [selected]”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to combine the teachings of Nield and Courtney for the same reasons as disclosed above.
Nied in view of Courtney does not clearly teach identifying at least a first and a second code branch wherein execution time for the first and second code branch are unequal; and equalizing the execution time for the first and second code branch so that the predicted execution time of the selected at least one task balances the execution time of both code branches.
However, Wang teaches identifying at least a first and a second code branch ([Wang, para. 0060] “eliminate a data dependency of an execution time by appending ... operations to the sub-function, but ... an executable program can be produced for ... inserting ... operations into the left branch so that the two branches [a first and second code branch] have equal execution time”) wherein execution time for the first and second code branch are unequal; and ([para. 0109] “Two sub-functions fna [first code branch] and fnb [second code branch] ... Tdelay(fna) is not equal to Tdelay(fnb) [execution time is not equal]”; [para. 0092] “The delay of the program, Tdelay, which is defined as the time ... when the last operation is completed [executed] ... end of the program”)
equalizing the execution time for the first and second code branch so that the predicted execution time of the selected at least one task balances the execution time of both code branches. ([Wang, para. 0110] “one of the programs can be padded with ... operations to make Tdelay(fna)=Tdelay(fnb)”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to have modified the elements disclosed by Nied in view of Courtney with the teachings of Wang to include identifying at least a first and a second code branch wherein execution time for the first and second code branch are unequal; and equalizing the execution time for the first and second code branch so that the predicted execution time of the selected at least one task balances the execution time of both code branches. One of ordinary skill in the art would have been motivated to make this modification because in such a way, no synchronization procedure will need to be written since the flow of the codes will be synchronized automatically, improving efficiency of reaching a final mapping of an application algorithm. (Wang, para. 0054 and para. 0112)
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Nied in view Courtney as applied to claim 1 above, and further in view of Eker et al. (US Pub. 2010/0262839) (hereinafter “Eker”).
As per claim 7, Nied in view of Courtney teaches claim 1.
Nied also teaches tasks are selected from the asynchronous task queue. ([Nied, para. 0035; Fig. 1] “tasks 110 are added to the task queue [asynchronous task queue] ... selectively scheduled for execution by the processing unit”; [para. 0038] “Tasks ... complete out of order [asynchronous tasks] ... in a different order from the order in which they were received”)
Nied in view of Courtney does not clearly teach wherein tasks are randomly selected.
However, Eker teaches wherein tasks are randomly selected. ([Eker, para. 0092] “the selection and dispatch function uses a function, κ, to select the "next" task t; [para. 0095] “the functions κ ... modified so as to provide a randomised selection of the tasks”)
It would have been obvious before the effective filing date of the claimed invention for one of ordinary skill in the art to have modified the elements disclosed by Nied in view of Courtney with the teachings of Eker to include identifying wherein tasks are randomly selected from the asynchronous task queue. One of ordinary skill in the art would have been motivated to make this modification because such a method provides an efficient protection of the program code against an attack based on dynamic analysis. (Eker, para. 0022)
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Leplus et al. (US Pub. 2022/0360424) discloses securing execution of a function by temporal desynchronization where a dummy instruction in constructed into a sequence to delay the time a second legitimate instruction is executed.
Zejda et al. (US Patent 11,003,429) discloses scheduling of asynchronous processes where an estimated execution time is used to determine operations to schedule for first.
Wang et al. (US Pub. 2020/0059421) discloses processing queues where a random number generated is used to select processing queues to process a control packet.
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/ZHE LIU/Examiner, Art Unit 2493
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