Prosecution Insights
Last updated: October 02, 2026
Application No. 18/715,866

LIGHT-RECEIVING DEVICE

Non-Final OA §102§103
Filed
Jun 03, 2024
Priority
Dec 10, 2021 — JP 2021-201271 +1 more
Examiner
ROLAND, CHRISTOPHER M
Art Unit
Tech Center
Assignee
Sony Group Corporation
OA Round
1 (Non-Final)
65%
Grant Probability
Moderate
1-2
OA Rounds
10m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 65% of resolved cases
65%
Career Allowance Rate
360 granted / 557 resolved
+4.6% vs TC avg
Strong +21% interview lift
Without
With
+21.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
33 currently pending
Career history
586
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
51.6%
+11.6% vs TC avg
§102
20.8%
-19.2% vs TC avg
§112
24.6%
-15.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 557 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement Information disclosure statements filed 3 June 2024, 10 June 2024, and 14 November 2025 have been fully considered. Specification The preliminary amendments to the specification were received on 3 June 2024. These preliminary amendments to the specification are acceptable. Claim Objections Claim 12 is objected to because of the following informalities: Claim 12 recites the limitation, “comprising a protective film provided between the via and the insulating film.” Because claim 12 recites an additional element to the device, the claim should read, “further comprising a protective film provided between the via and the insulating film.” Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-10 and 14-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Endo et al. (US Patent Application Publication 2011/0155893, hereinafter Endo ‘Endo ‘893) of record. With respect to claim 1, Endo ‘893 teaches (FIG. 1) a light-receiving device as claimed, comprising: a first substrate (104) including a plurality of photoelectric conversion sections (112, 115, and 116) that photoelectrically converts light and an accumulation section (113) that accumulates electric charge photoelectrically converted by the photoelectric conversion sections ([0031, 0033-0034]); a second substrate (108 and upper one-third of 111) stacked on the first substrate (104), the second substrate including a readout circuit (124-126 and 130) that outputs a first signal based on the electric charge accumulated in the accumulation section (113) ([0032, 0035]); and a wiring layer (107 and lower two-thirds of 111) including a via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) that electrically couples the accumulation section (113) and the readout circuit (124-126 and 130) to each other ([0031-0032]), wherein the first substrate (104) and the second substrate (108 and upper one-third of 111) are stacked to allow a first surface of the first substrate on which an element is formed and a second surface of the second substrate on which an element is formed to be opposed to each other ([0031-0032]), and the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) penetrates a plurality of layers in the wiring layer (107 and lower two-thirds of 111) ([0031-0032]). With respect to claim 2, Endo ‘893 teaches wherein the first substrate (104) and the second substrate (108 and upper one-third of 111) are stacked by bonding between electrodes (elements 123 and 129 at connection portion 311), and the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is directly coupled to the bonded electrodes ([0028]). With respect to claim 3, Endo ‘893 teaches wherein the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is directly coupled to the first substrate (104) ([0031-0032]). With respect to claim 4, Endo ‘893 teaches wherein the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is directly coupled to the accumulation section (113) of the first substrate (104) ([0031-0032]). With respect to claim 5, Endo ‘893 teaches wherein the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is directly coupled to the second substrate (108 and upper one-third of 111) ([0031-0032]). With respect to claim 6, Endo ‘893 teaches wherein the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is directly coupled to a gate (126 and 130) of a transistor (124-126 and 130) provided in the second substrate (108 and upper one-third of 111) ([0031-0032]). With respect to claim 7, Endo ‘893 teaches wherein the transistor (124-126 and 130) comprises a transistor of the readout circuit (124-126 and 130) ([0031-0032]). With respect to claim 8, Endo ‘893 teaches wherein the readout circuit (124-126 and 130) includes an amplification transistor (124-126 and 130) that generates the first signal, and the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is electrically coupled to a gate (126 and 130) of the amplification transistor ([0035]). With respect to claim 9, Endo ‘893 teaches wherein the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is directly coupled to the gate (126 and 130) of the amplification transistor (124-126 and 130) ([0035]). With respect to claim 10, Endo ‘893 teaches wherein the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) includes tungsten, cobalt, ruthenium, copper, molybdenum, or aluminum ([0038]). With respect to claim 14, Endo ‘893 teaches wherein the first substrate (104) and the second substrate (108 and upper one-third of 111) are stacked by bonding between the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) and an electrode (elements 123 and 129 at connection portion 311) ([0031-0032]). With respect to claim 15, Endo ‘893 teaches wherein a width of the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is smaller than a width of the electrode (elements 123 and 129 at connection portion 311) in a direction orthogonal to a stacking direction of the first substrate (104) and the second substrate (108 and upper one-third of 111) ([0031-0032]). With respect to claim 16, Endo ‘893 teaches wherein the wiring layer (107 and lower two-thirds of 111) includes a first wiring layer (107) provided on a side of the first surface of the first substrate (104) and a second wiring layer (lower two-thirds of 111) provided on a side of the second surface of the second substrate (108 and upper one-third of 111), and the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) includes a first via (through-via wiring within wiring layer 107, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) provided in the first wiring layer and being electrically coupled to the accumulation section (113) and a second via (through-via wiring within wiring layer lower two-thirds of 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) provided in the second wiring layer and electrically coupling the first via and the readout circuit (124-126 and 130) to each other ([0031-0032]). With respect to claim 17, Endo ‘893 teaches wherein the first via (through-via wiring within wiring layer 107, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) penetrates a plurality of layers in the first wiring layer (107), and the second via (through-via wiring within wiring layer lower two-thirds of 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) penetrates a plurality of layers in the second wiring layer (lower two-thirds of 111) ([0031-0032]). With respect to claim 18, Endo ‘893 teaches wherein the second via (through-via wiring within wiring layer lower two-thirds of 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) is directly coupled (at connection portion 311) to the first via (through-via wiring within wiring layer 107, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) ([0031-0032]). With respect to claim 19, Endo ‘893 teaches wherein the first substrate (104) and the second substrate (108 and upper one-third of 111) are stacked by bonding between the first via (through-via wiring within wiring layer 107, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) and the second via (through-via wiring within wiring layer lower two-thirds of 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) ([0031-0032]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Endo ‘893 as applied to claim 1 above, and further in view of Shigetoshi (US Patent Application Publication 2015/0097258, hereinafter Shigetoshi ‘258) of record. With respect to claim 11, Endo ‘893 teaches the device as described in claim 1 above, including the additional limitation wherein the wiring layer (107 and lower two-thirds of 111) includes an insulating film, and the via (through-via wiring within wiring layers 107 and 111, e.g., 122, 123, and 129, excluding elements 123 and 129 at connection portion 311) penetrates the insulating film ([0031]). Thus, Endo ‘893 is shown to teach all the features of the claim with the exception of wherein the insulating film has a permittivity lower than a permittivity of a silicone oxide film. However, Shigetoshi ‘258 teaches (FIG. 19) a low-k dielectric such as SiOC as an art-recognized material for an insulating film (65) of a wiring layer, wherein the low-k dielectric material is selected to reduce capacitance ([0086-0087]). Further, the selection of a known material based on its suitability for its intended use supports a prima facie obviousness determination. Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) and In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960). See MPEP 2144.07. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the insulating film of Endo ‘893 having a permittivity lower than a permittivity of a silicone oxide film as taught by Shigetoshi ‘258 based on its suitability for its intended use and to reduce capacitance. Claims 12 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Endo ‘893 and Shigetoshi ‘258 as applied to claim 11 above, and further in view of Jang et al. (US Patent Application Publication 2022/0199670, hereinafter Jang ‘670). With respect to claims 12 and 13, Endo ‘893 and Shigetoshi ‘258 teach the device as described in claim 11 above with the exception of the additional limitations comprising a protective film provided between the via and the insulating film; and wherein the protective film includes silicon and at least one of oxygen, nitrogen, or carbon. However, Jang ‘670 teaches (FIG. 3) a protective film (331) provided between a via (332) and an insulating film (111), wherein the protective film includes silicon and nitrogen to insulate said via from other wiring elements in the wiring layer (110) ([0063]). Further, the selection of a known material based on its suitability for its intended use supports a prima facie obviousness determination. Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) and In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960). See MPEP 2144.07. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have formed the light-receiving device of Endo ‘893 and Shigetoshi ‘258 comprising a protective film provided between the via and the insulating film, wherein the protective film includes silicon and at least one of oxygen, nitrogen, or carbon as taught by Jang ‘670 to insulate said via from other wiring elements in the wiring layer. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Kwon (US Patent Application Publication 2017/0092680); Takahashi (US Patent Application Publication 2018/0175083); Matsumoto (US Patent Application Publication 2022/0157876); and Tojinbara (US Patent Application Publication 2022/0392942) teach vias connecting a photoelectric conversion section to a readout circuit. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher M. Roland whose telephone number is (571)270-1271. The examiner can normally be reached Monday-Friday, 10:00AM-7:00PM Eastern. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at (571)270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.M.R./Examiner, Art Unit 2893 /YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
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Prosecution Timeline

Jun 03, 2024
Application Filed
Sep 10, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
65%
Grant Probability
86%
With Interview (+21.4%)
3y 2m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 557 resolved cases by this examiner. Grant probability derived from career allowance rate.

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