DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-6, 8, 10-15, 17, 19-24, 26, and 28-36 are pending.
The U.S.C. 112 rejections, other than those stated below, have been corrected and the rejections are withdrawn.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-2, 6, 8, and 31-32 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “a protocol defined by the Mobile Industry Processor Interface (MIPI) Alliance display serial interface (DSI)”. It is unclear which versions of the MIPI and DSI protocols would apply. As written, this limitation includes future as well as past protocols which may contradict each other. Additionally, future protocols could not be envisioned by the inventors.
Claims 2-6, 8, and 31-32 are also rejected as incorporating the deficiencies of the claims that they are dependent upon.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 10-11, 19-20, and 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harriman et al. (US 20140068135) in view of Kim et al. (US 20230239133)
configure the physical layer circuit for a high-speed mode of communication; ([0071], “In configuration state 520, the PHY parameters can be configured and upon completion on all configured lanes of each end of the link, a configuration ready signal (CFG-RDY) can be indicated, e.g., using the sideband interconnect, while the high impedance is maintained on all lanes.”)
cause the physical layer circuit to transmit display data over the serial bus while the physical layer circuit is configured for the high-speed mode of communication; ([0076], “ for active data transfer, control thus passes to active state 550. Specifically, this is the state where link and transaction layers begin exchanging information using data link layer packets (DLLPs) and TLPs.”) *display data*
halt transmission of the display data when the error indication signal transitions to an active state; ([0079], “ If an error occurs or otherwise as directed, control can also pass to recovery state 560. Here, a transition to recovery causes all configured lanes in both directions to enter into the STALL state. … When this stall signal has been sent and received, as indicated by a received GO TO STALL indication on the sideband interconnect”)
configure the physical layer circuit for a low-power mode of communication after terminating the transmission of the display data; ([0077], “from this active state control can pass back to STALL state 530, to a recovery state 560, e.g., responsive to a receiver error” and [0079], “ If an error occurs or otherwise as directed, control can also pass to recovery state 560. Here, a transition to recovery causes all configured lanes in both directions to enter into the STALL state. … When this stall signal has been sent and received, as indicated by a received GO TO STALL indication on the sideband interconnect, control passes back to STALL state 530. Note that this recovery state thus establishes the protocol using the sideband to coordinate simultaneous entry into the STALL state.” And [0080], “Specifically, control passes to the L1 lower power state 540 from the STALL state so that the PHY can be placed into a SLEEP state.”)
reconfigure the physical layer circuit for the high-speed mode of communication when the error indication signal transitions to an inactive state; and ([0090], “When directed to exit the state, control passes back to STALL state 530” and [0072], “ As seen, depending on whether data is available for transmission or receipt control can pass to an active state L1 (state 530)”)
cause the physical layer circuit to resume the transmission of the display data after reconfiguring the physical layer circuit for the high-speed mode of communication. (Fig. 5, [0072], “As seen, depending on whether data is available for transmission or receipt control can pass to an active state L1 (state 530)”))
Harriman teaches operating mobile industry processor interface (MIPI) and addressing errors that occur in the system but does not specifically teach a display serial interface monitoring an error signal received from a receiving device or reconfiguring based on the error signal becoming in active.
Kim teaches
A display system interface for a transmitting device, comprising: a physical layer circuit coupled to a serial bus and configurable to operate in accordance with a protocol defined by the Mobile Industry Processor Interface (MIPI) Alliance display serial interface (DSI); ([0051], “The transmission controller 112 and the reception controller 122 may correspond to a network layer and/or a transport layer of the OSI 7-layer model, an internet layer and/or a transport layer of the TCP/IP model, or a protocol layer of the MIPI protocol. The protocol layer of the MIPI protocol may be configured according to various predefined specifications such as a display serial interface (DSI)”)
a controller configured to monitor an error indication signal received from a receiving device coupled to the serial bus, ([0048], “The receiver 120 may receive the clock-embedded data CEDT, detect a clock embedding-related error from the clock-embedded data CEDT, and output an error flag ER_FG corresponding to the clock embedding-related error to the transmitter 110.”)
display data ([0050-51], “The transmission unit 111 may be connected to the reception unit 121 through the line 130. The transmission unit 111 and the reception unit 121 may be referred to as data channels. … The protocol layer of the MIPI protocol may be configured according to various predefined specifications such as a display serial interface (DSI)”)
reconfigure the physical layer circuit for the high-speed mode of communication when the error indication signal transitions to an inactive state; ([0099], “ In such an embodiment, the transmitter 110 may transmit a reset signal RS to the receiver 120 based on the error flag ER_FG. The receiver 120 may be initialized or may initiate reception of the clock-embedded data CEDT based on the reset signal RS transmitted from the transmitter 110.” And [0021], “the error flag may include one of a pulse of a high voltage level, a pulse of a low voltage level, a signal increasing from the low voltage level to the high voltage level, and a signal decreasing from the high voltage level to the low voltage level.” Where using a pulsed error error flag/signal is interpreted as causing the reset to reconfigure the physical layer for high speed mode after the negation of the pulse)
Harriman and Kim are analogous art. Kim is cited to teach a similar concept of error handling in mobile industry processor interface (MIPI) system. Kim teaches error handling in a mobile industry processor interface (MIPI) system using a direct signal from the receiver to the transmitter. Based on Kim, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Harriman to use a direct error signal rather than an error message from the data path in response to an error from the receiver. Furthermore, using a direct error signal from the receiver to the transmitter improves on Harriman by being able to more quickly respond to the occurrence of an error in the communication system. To one of ordinary skill in the art before the effective filing data of the invention it would have been advantageous to make this modification because “in the clock-embedded data scheme, handling of a clock embedding-related error (error detection, error transmission, etc.) may be desired.”, [0004]
Regarding claim 2, Kim teaches wherein the error indication signal transitions to the active state to indicate that a transmission error has been detected at the receiving device. ([0048], “The transmitter 110 may transmit clock-embedded data CEDT, which includes a clock training pattern, a start pattern, an encoded payload, and an end pattern, through the line 130. The receiver 120 may receive the clock-embedded data CEDT, detect a clock embedding-related error from the clock-embedded data CEDT, and output an error flag ER_FG corresponding to the clock embedding-related error to the transmitter 110.” [0021], “the error flag may include one of a pulse of a high voltage level, a pulse of a low voltage level, a signal increasing from the low voltage level to the high voltage level, and a signal decreasing from the high voltage level to the low voltage level.”)
As to claims 10, 19, and 28, Brett and Yang teach these claims according to the reasoning provided in claim 1.
As to claims 11 and 20, Brett and Yang teach these claims according to the reasoning provided in claim 2.
Claim(s) 3-6, 8, 12-15, 17, 21-24, 26, and 29-30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harriman and Kim as applied to claim 1, 10, and 19, above, and further in view of Brett et al. (US 10649946)
Regarding claim 3, Brett teaches wherein the controller is further configured to: cause the physical layer circuit to transmit a control sequence while the physical layer circuit is configured for the low-power mode of communication, wherein the control sequence is transmitted in a signal that has a nominal 1.2 volt amplitude and includes an LP-11 state that has a maximum voltage amplitude configured for the signal. (col. 4, lines 51-57, “The logic low voltage levels LP.sub.LOW_THRESHOLD 303 and the logic high threshold voltage level (LP.sub.HIGH_THRESHOLD) 304 define the switching voltage levels for high-to-low transitions and low- to high transitions, respectively. In one example, the maximum low-power (LP.sub.MAX) voltage level 305 may be nominally defined at 1.2 Volts (V).” and col. 5, lines 11-13, “the return to the low-power mode may be accomplished when the master device issues a first Stop state 405 using the voltage levels defined for the low-power mode (e.g., LP11).”)
Brett, Harriman, and Kim are analogous art. Brett is cited to teach a similar concept of data transmission both high speed and low power operation. Harriman and Kim teach data transmission with low power operation and error detection and resuming transmission after the error in transmission is eliminated/corrected using MIPI transmission including a PHY-D protocol. Brett teaches when that when operating a PHY-D protocol one might operate at a nominal 1.2 V amplitude. By operating at this amplitude Brett teaches the system is reliable thereby yielding predictable results. Based on Brett and the KSR rationale of combining prior art elements according to known methods to yield predictable results, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Harriman and Kim to operate a PHY-D protocol at a nominal 1.2 V amplitude.
Regarding claim 4, Brett teaches wherein the physical layer circuit is configured to transmit the display data over the serial bus in a signal that has a nominal 200 millivolt amplitude. (col. 4, lines 37-48, “In the high-speed communication mode 320, signals are centered on a high-speed common (HS.sub.COMMON) voltage level 302, which is offset from a reference ground voltage level 301. Signals in the high-speed communication mode 320 have a voltage range 311 that ensures that high-speed signals 310 do not exceed a logic low threshold voltage level (LP.sub.LOW_THRESHOLD) 303, which defines the upper limit for logic low in the low-power communication mode 321. In one D-PHY example, the HS.sub.COMMON voltage level 302 may be nominally defined to be 200 millivolts (mV), and the voltage range 311 for high-speed signals may be nominally defined to be 200 mV.”)
Brett, Harriman, and Kim are analogous art. Brett is cited to teach a similar concept of data transmission both high speed and low power operation. Harriman and Kim teach data transmission with low power operation and error detection and resuming transmission after the error in transmission is eliminated/corrected using MIPI transmission including a PHY-D protocol. Brett teaches when that when operating a PHY-D protocol one might transmit the display data over the serial bus in a signal that has a nominal 200 millivolt amplitude. By operating at this amplitude Brett teaches the system is reliable thereby yielding predictable results. Based on Brett and the KSR rationale of combining prior art elements according to known methods to yield predictable results, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Harriman and Kim to transmit the display data over the serial bus in a signal that has a nominal 200 millivolt amplitude.
Regarding claim 5, Brett teaches wherein the controller is further configured to: cause the physical layer circuit to transmit a start sequence in a signal that has a nominal 200 millivolt amplitude. (Fig. 4, col. 4, lines 45-48, “In one D-PHY example, the HS.sub.COMMON voltage level 302 may be nominally defined to be 200 millivolts (mV), and the voltage range 311 for high-speed signals may be nominally defined to be 200 mV.” And col. 4, lines 62-65, “ a high-speed burst begins after transmission of a Start of Transmission (SoT) sequence 401 that may include LP codes (LP11, LP01, LP00).”)
Brett, Harriman, and Kim are analogous art. Brett is cited to teach a similar concept of data transmission both high speed and low power operation. Harriman and Kim teach data transmission with low power operation and error detection and resuming transmission after the error in transmission is eliminated/corrected using MIPI transmission including a PHY-D protocol. Brett teaches when that when operating a PHY-D protocol to transmit a start sequence in a signal that has a nominal 200 millivolt amplitude. By operating at this amplitude Brett teaches the system is reliable thereby yielding predictable results. Based on Brett and the KSR rationale of combining prior art elements according to known methods to yield predictable results, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Harriman and Kim to transmit a start sequence in a signal that has a nominal 200 millivolt amplitude.
Regarding claim 6, Brett teaches wherein the start sequence comprises a settle period that follows the LP-11 state. (cols. 4-5, lines 62-2, “a high-speed burst begins after transmission of a Start of Transmission (SoT) sequence 401 that may include LP codes (LP11, LP01, LP00). In high-speed communication mode, low power transition begins with a low power transition phase LPX having a duration T.sub.LPX and a high speed preparation phase HsPrepare having a duration T.sub.HsPrepare. Allowing for settling time T.sub.HSSettle”)
Brett, Harriman, and Kim are analogous art. Brett is cited to teach a similar concept of data transmission both high speed and low power operation. Harriman and Kim teach data transmission with low power operation and error detection and resuming transmission after the error in transmission is eliminated/corrected using MIPI transmission including a PHY-D protocol. Brett teaches when that when operating a PHY-D protocol one might use a start sequence which has a settle period that follows the LP-11 state. By operating at this amplitude Brett teaches the system is reliable thereby yielding predictable results. Based on Brett and the KSR rationale of combining prior art elements according to known methods to yield predictable results, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Harriman and Kim to use a start sequence which has a settle period that follows the LP-11 state.
Regarding claim 8, Brett teaches wherein the start sequence comprises a preamble that is transmitted after the LP-11 state. (cols. 4-5, lines 62-2, “a high-speed burst begins after transmission of a Start of Transmission (SoT) sequence 401 that may include LP codes (LP11, LP01, LP00). In high-speed communication mode, low power transition begins with a low power transition phase LPX having a duration T.sub.LPX and a high speed preparation phase HsPrepare having a duration T.sub.HsPrepare. Allowing for settling time T.sub.HSSettle”)
Brett, Harriman, and Kim are analogous art. Brett is cited to teach a similar concept of data transmission both high speed and low power operation. Harriman and Kim teach data transmission with low power operation and error detection and resuming transmission after the error in transmission is eliminated/corrected using MIPI transmission including a PHY-D protocol. Brett teaches when that when operating a PHY-D protocol one might use a start sequence comprises a preamble that is transmitted after the LP-11 state. By operating at this amplitude Brett teaches the system is reliable thereby yielding predictable results. Based on Brett and the KSR rationale of combining prior art elements according to known methods to yield predictable results, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Harriman and Kim to use start sequence comprises a preamble that is transmitted after the LP-11 state.
As to claims 12 and 21, Harriman, Kim, and Brett teach these claims according to the reasoning provided in claim 3.
As to claims 13 and 22, Harriman, Kim, and Brett teach these claims according to the reasoning provided in claim 4.
As to claims 14, 23, and 30, Harriman, Kim, and Brett teach these claims according to the reasoning provided in claim 5.
As to claims 15 and 24, Harriman, Kim, and Brett teach these claims according to the reasoning provided in claim 6.
As to claims 17 and 26, Harriman, Kim, and Brett teach these claims according to the reasoning provided in claim 8.
As to claim 29, Harriman, Kim, and Brett teach these claims according to the reasoning provided in claims 3 and 4.
Claim(s) 31, 33, and 35 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harriman and Kim as applied to claim 1, 10, and 19, above, and further in view of Takahashi (JP 2011237490).
Regarding claim 31, Harriman and Kim teach resuming transmission but does not specifically teach retransmitting the portion of data associated with the error. Takahashi teaches wherein transmission of the display data is resumed by retransmitting a portion of data associated with a display line that was affected by affected by a transmission error. (Abstract, “The display part specifies the parts data as error data when determined there is the difference, and requests the control part to retransmit the parts data. When the control part receives the retransmission request, the control part retransmits the parts data specified as the error data to the display part.”)
Harriman, Kim, and Takahashi are analogous art. Takahashi is cited to teach a similar concept of data transmission. Harriman and Kim teach data transmission with low power operation and error detection and resuming transmission after the error in transmission is eliminated/corrected. Takahashi teaches when an error is detected in transmission a retransmission of the portion of the data in which the error occurred should be retransmitted. By retransmitting the data with the error, the correct information is sent to the display thereby yielding predictable results. Based on Takahashi and the KSR rationale of combining prior art elements according to known methods to yield predictable results, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Harriman and Kim to retransmitted the data from portion of data with the error.
As to claims 33 and 35, Harriman, Kim, and Takahashi teach these claims according to the reasoning provided in claims 31.
Claim(s) 32, 34, and 36 is/are rejected under 35 U.S.C. 103 as being unpatentable over Harriman and Kim as applied to claim 1, 10, and 19, above, and further in view of Sakai et al. (US 20120162694).
Regarding claim 32, Harriman and Kim teach resuming transmission but does not specifically teach transmitting display data related to the next display line.
Sakai teaches wherein transmission of the display data is resumed by transmitting all data associated with a next display line that follows a display line that was affected by affected by a transmission error. ([0044], “the transmission controller 44 determines as to whether all the pieces of line data 62 in the print data 60 have been transmitted to the receiver unit 46. If one or more pieces of line data 62 remains unsent (S8: YES), the flow returns to S1, the transmitter unit 45 starts transmitting a next piece of line data 62.”)
Harriman, Kim, and Sakai are analogous art. Sakai is cited to teach a similar concept of data transmission when an error occurs. Harriman and Kim teach data transmission with low power operation and error detection and resuming transmission after the error in transmission is eliminated/corrected. Sakai teaches when an error is detected in transmission a transmission of the next line of data should occur. By transmitting the next line of data after the error, relevant data is sent to the system thereby yielding predictable results. Based on Sakai and the KSR rationale of combining prior art elements according to known methods to yield predictable results, it would have been obvious before the effective filing date of the invention to a person having ordinary skill in the art to which said subject matter pertains to have modified Harriman and Kim to transmit the next line of data after the error.
As to claims 34 and 36, Harriman, Kim, and Sakai teach these claims according to the reasoning provided in claims 32.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1, 10, 19, and 28 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHERI L. HARRINGTON whose telephone number is (571)270-0468. The examiner can normally be reached Generally, M-F, 7:30a-4p.
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/CHERI L HARRINGTON/Examiner, Art Unit 2176 July 7, 2026
/JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176
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