DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, 365(c), or 386(c) is acknowledged.
Acknowledgment is made of applicant's claim for foreign priority based on an application filed in CHINA on 04/27/2022.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/10/2024 is being considered by the examiner.
Drawings
Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: “C” in Fig. 6, “S102” in Fig. 17. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The title of the invention is not descriptive of the current invention and claims. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “PRINTED CIRCUIT BOARD WITH SIGNAL VIA LINKS STRUCTURES”.
Applicant is reminded of the proper content and the proper language and format of an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided.
A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art.
If the patent is of a basic nature, the entire technical disclosure may be new in the art, and the abstract should be directed to the entire disclosure. If the patent is in the nature of an improvement in an old apparatus, process, product, or composition, the abstract should include the technical disclosure of the improvement. The abstract should also mention by way of example any preferred modifications or alternatives.
Where applicable, the abstract should include the following: (1) if a machine or apparatus, its organization and operation; (2) if an article, its method of making; (3) if a chemical compound, its identity and use; (4) if a mixture, its ingredients; (5) if a process, the steps.
Extensive mechanical and design details of an apparatus should not be included in the abstract. The abstract should be in narrative form and generally limited to a single paragraph within the range of 50 to 150 words in length.
See MPEP § 608.01(b) for guidelines for the preparation of patent abstracts.
The abstract of the disclosure is objected to because the first sentence is similar to the title and the last sentence seems to be purported merits. A corrected abstract (such as removing the first and last sentence and making the abstract be similar to Claim 1) of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Objections
Applicant is advised that should claim 1 be found allowable, claims 11 and 29 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim 28 objected to because of the following informalities: “round” should be “ground”. Appropriate correction/explanation is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Applicant cannot rely upon the certified copy of the foreign priority application to overcome this rejection because a translation of said application has not been made of record in accordance with 37 CFR 1.55. When an English language translation of a non-English language foreign application is required, the translation must be that of the certified copy (of the foreign application as filed) submitted together with a statement that the translation of the certified copy is accurate. See MPEP §§ 215 and 216.
Claim(s) 1-11 and 21-29 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by LI (CN114698233).
Regarding Claim 1. Li teaches, in Fig. 3-16, a printed circuit board (PCB) signal via structure, comprising a via structure arranged on a PCB and in-via routes arranged on an inner wall of the via structure (see Fig. 3), wherein the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers (see Fig. 3); the in-via routes are in one-to-one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers (see Fig. 3); and the in-via routes are insulated from each other (see Claim 1).
Regarding Claim 2. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein each of the in-via routes is specifically obtained by performing groove milling on a copper surface according to a line width of each of the signals that need to switch layers and a line distance of each of the signals that need to switch layers after the via structure is obtained from the PCB and the inner wall of the via structure is electroplated with the copper surface that has a same thickness as a layer surface of the PCB (see Claim 2).
Regarding Claim 3. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein the via structure comprises a plating through hole structure; and the plating through hole structure penetrates through the PCB (see Claim 3, Embodiment 2 paragraph 2).
Regarding Claim 4. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein the via structure comprises a blind via hole structure; and
the blind via hole structure spans from a surface layer to an inner layer of the PCB and does not penetrate through the PCB (see Claim 3).
Regarding Claim 5. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein the via structure comprises a buried via hole structure; and the buried via hole structure spans from an inner layer of the PCB, and plating flattening treatment is performed on one side closed to a surface of the PCB (see Claim 3).
Regarding Claim 6. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein a cross section of the via structure is shaped like a character "-" (Claim 4).
Regarding Claim 7. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein a cross section of the via structure is a cross (Claim 4).
Regarding Claim 8. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein a cross section of the via structure is L-shaped (Claim 4).
Regarding Claim 9. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein each of the signals that need to switch layers is a differential signal; the via structure at least comprises a first via structure; and
a pair of differential signals in the first via structure is only provided with ground signals on two sides of the first via structure (Claim 5).
Regarding Claim 10. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein each of the signals that need to switch layers is a differential signal;
the via structure at least comprises a second via structure; and
a pair of differential signals in the second via structure is only provided with ground signals on two, opposite sides of the second via structure and opposite sides (Claim 5).
Regarding Claim 11. (Currently Amended) Li teaches a printed circuit board (PCB), comprising a PCB signal via structure, wherein the PCB signal via structure comprises a via structure arranged on the PCB and in-via routes arranged on an inner wall of the via structure, wherein the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers; the in-via routes are in one-to-one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the in-via routes are insulated from each other (see Claim 6 and Claim 1).
Regarding Claim 21. (New) Li teaches the PCB signal via structure according to claim 1, wherein a distance between the in-via routes is not less than a distance between a surface-layer route of the signals that need to switch layers (Embodiment 1 paragraph 7).
Regarding Claim 22. (New) Li teaches the PCB signal via structure according to claim 21, wherein the distance between the in-via routes is consistent with the distance between the surface-layer route (Embodiment 1 paragraph 7).
Regarding Claim 23. (New) Li teaches the PCB signal via structure according to claim 1, wherein the via structure is filled with an insulation material (Embodiment 1 paragraph 8).
Regarding Claim 24. (New) Li teaches the PCB signal via structure according to claim 1, wherein the via structure comprises a plating through hole structure, a blind via hole structure, or a buried via hole structure according to layer switching requirements of the signals that need to switch layers (Contents of the Invention, paragraph 19-20).
Regarding Claim 25. (New) Li teaches the PCB signal via structure according to claim 1, wherein a depth of the signals that need to switch layers is a thickness of the PCB (embodiment 2 paragraph 3).
Regarding Claim 26. (New) Li teaches the PCB signal via structure according to claim 1, wherein an inner wall of the via structure is electroplated with a copper surface and a thickness of the copper surface is the same as a thickness of an inner-layer copper foil of the PCB (embodiment 2 paragraph 4).
Regarding Claim 27. (New) Li teaches the PCB signal via structure according to claim 1, wherein each of the signals that need to switch layers comprises two differential signals with different signal shielding requirements, and the via structure at least comprises a first via structure and a second via structure;
wherein a pair of differential signals in the first via structure is only provided with ground
signals on two sides of the first via structure, and a pair of differential signals in the second via structure is only provided with ground signals on two, opposite sides of the second via structure (Embodiment 2 paragraph 11-13).
Regarding Claim 28. (New) Li teaches the PCB signal via structure according to claim 1, wherein each of the signals that need to switch layers comprises two pairs of differential signals and two sides of the via structure set round signals and the in-via routes at opposite side corners of the via structure set ground signals (embodiment 2 paragraph 13-16).
Regarding Claim 29. (New) Li teaches, in Fig. 3-16, an electronic device, comprising a printed circuit board (PCB) (see Fig. 4), wherein the PCB comprises a PCB signal via structure, the PCB signal via structure comprises a via structure arranged on the PCB and in-via routes arranged on an inner wall of the via structure, the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers; the in-via routes are in one-to- one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the in-via routes are insulated from each other (see Claim 1).
Claim(s) 1, 3, 11, 21-25 and 29 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by YI (CN104219880).
Regarding Claim 1. (Currently Amended) Yi teaches in Fig. 3-5, a printed circuit board (PCB) signal via structure, characterized by comprising a via structure arranged on a PCB and in-via routes arranged on an inner wall of the via structure (see Fig. 4),wherein the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers ([0026-0037]); the in-via routes are in one-to-one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the various-in-via routes are insulated from each other ([0033]).
Regarding Claim 3. (Currently Amended) Yi teaches the PCB signal via structure according to claim 1, wherein the via structure comprises a plating through hole structure; and the plating through hole structure penetrates through the PCB ([0027]).
Regarding Claim 21. (New) Yi teaches the PCB signal via structure according to claim 1, wherein a distance between the in-via routes is not less than a distance between a surface-layer route of the signals that need to switch layers (see Fig. 4).
Regarding Claim 22. (New) Yi teaches the PCB signal via structure according to claim 21, wherein the distance between the in-via routes is consistent with the distance between the surface-layer route (see Fig. 4).
Regarding Claim 23. (New) Li teaches the PCB signal via structure according to claim 1, wherein the via structure is filled with an insulation material (claim 5).
Regarding Claim 24. (New) Yi teaches the PCB signal via structure according to claim 1, wherein the via structure comprises a plating through hole structure, a blind via hole structure, “or a” buried via hole structure according to layer switching requirements of the signals that need to switch layers ([0026-0027]).
Regarding Claim 25. (New) Yi teaches the PCB signal via structure according to claim 1, wherein a depth of the signals that need to switch layers is a thickness of the PCB (see Fig.4).
Regarding Claim 11. (Currently Amended) Yi teaches, in Fig.3-5, a printed circuit board (PCB), comprising a PCB signal via structure, wherein the PCB signal via structure comprises a via structure arranged on the PCB and in-via routes arranged on an inner wall of the via structure(see Fig. 4),wherein the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers ([0026-0037]; the in-via routes are in one-to-one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the in-via routes are insulated from each other ([0033]).
Regarding Claim 29. (New) Yi teaches, in Fig. 3-5, an electronic device, comprising a printed circuit board (PCB), wherein the PCB comprises a PCB signal via structure, the PCB signal via structure comprises a via structure arranged on the PCB and in-via routes arranged on an inner wall of the via structure (see Fig. 4), the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers ([0026 -0037]); the in-via routes are in one-to- one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the in-via routes are insulated from each other ([0033]).
Claim(s) 1, 4-8, 11, and 29 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by WANG (CN107124821).
Regarding Claim 1. (Currently Amended) WANG teaches, in Fig. 1-6, a printed circuit board (PCB) signal via structure, characterized by comprising a via structure arranged on a PCB and in-via routes arranged on an inner wall of the via structure (see Fig. 6), wherein the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers (specific implementation methods- paragraph 1-6); the in-via routes are in one-to-one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers (specific implementation method- paragraph 1-6); and the various-in-via routes are insulated from each other (specific implantation methods- paragraph 16-17).
Regarding Claim 4. (Currently Amended) Wang teaches the PCB signal via structure according to claim 1, wherein the via structure comprises a blind via hole structure; and
the blind via hole structure spans from a surface layer to an inner layer of the PCB and does not penetrate through the PCB (see Fig. 3).
Regarding Claim 5. (Currently Amended) The PCB signal via structure according to claim 1, wherein the via structure comprises a buried via hole structure; and the buried via hole structure spans from an inner layer of the PCB (see Fig. 4), and plating flattening treatment is performed on one side closed to a surface of the PCB (product by process- MPEP 2113).
Regarding Claim 6. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein a cross section of the via structure is specifically shaped like a character "-" (specific implementation methods- paragraph 13- “polygonal hole” would meet this limitation).
Regarding Claim 7. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein a cross section of the via structure is-specifically a cross (specific implementation methods- paragraph 13- “polygonal hole” would meet this limitation)
Regarding Claim 8. (Currently Amended) Li teaches the PCB signal via structure according to claim 1, wherein a cross section of the via structure is-specifically L-shaped (specific implementation methods- paragraph 13- “polygonal hole” would meet this limitation).
Regarding Claim 11. (Currently Amended) WANG teaches a printed circuit board (20) (PCB), comprising a PCB signal via structure, wherein the PCB signal via structure comprises a via structure arranged on the PCB and in-via routes arranged on an inner wall of the via structure, wherein the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers; the in-via routes are in one-to-one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the in-via routes are insulated from each other (see claim 1 rejection above).
Regarding Claim 29. (New) WANG teaches an electronic device, comprising a printed circuit board (20) (PCB), wherein the PCB comprises a PCB signal via structure, the PCB signal via structure comprises a via structure arranged on the PCB and in-via routes arranged on an inner wall of the via structure, the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers; the in-via routes are in one-to- one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the in-via routes are insulated from each other (see Claim 1 rejection above).
Claim(s) 1, 9-11, and 29 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kiani (US6388208).
Regarding Claim 1. Kiani teaches, in Fig.1A, 1D, 2, a printed circuit board (PCB) signal via structure, characterized by comprising a via structure arranged on a PCB and in-via routes arranged on an inner wall of the via structure (see Fig. 1A), wherein the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers (description paragraph 2); the in-via routes are in one-to-one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the various-in-via routes are insulated from each other (see Fig. 2-3).
Regarding Claim 9. (Currently Amended) Kiani teaches the PCB signal via structure according to claim 1, wherein each of the signals that need[[s]] to switch layers is a differential signal (see Fig. 3- {61a, 61b}, column 13 lines 52-column 14 line 11); the via structure at least comprises a first via structure (see 61a, 61b- see Fig. 3E) and teaches a pair of differential signals (Sa1, Sa2) in the first via structure is only provided with ground signals (64) on two sides of the first via structure (see Fig. 3E).
Regarding Claim 10. (Currently Amended) Kiani teaches the PCB signal via structure according to claim 1, wherein each of the signals that need[[s]] to switch layers is a differential signal (see Fig. 3- {61c, 61d}, column 13 lines 52-column 14 line 11); the via structure at least comprises a second via structure (61c, 61d); and a pair of differential signals (Sb1, Sb2) in the second via structure is only provided with ground signals on two, opposite sides of the second via structure (see Fig. 3E).
Regarding Claim 11. Kiani teaches, in Fig. 1A, 1D, 2, a printed circuit board (PCB), characterized comprising a PCB signal via structure, wherein the PCB signal via structure comprises a via structure arranged on the PCB and in-via routes arranged on an inner wall of the via structure (see Fig. 1A), wherein the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers (description paragraph 2); the in-via routes are in one-to-one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the in-via routes are insulated from each other (see Fig. 2-3).
Regarding Claim 29. Kiani teaches, in an electronic device, comprising a printed circuit board (PCB), wherein the PCB (10’) comprises a PCB signal via structure, the PCB signal via structure comprises a via structure arranged on the PCB and in-via routes arranged on an inner wall of the via structure (see Fig. 1A), the via structure spans from a signal starting layer of signals that need to switch layers in the PCB to a signal destination layer of the signals that need to switch layers (description paragraph 2); the in-via routes are in one-to- one correspondence to the signals that need to switch layers to serve as via links of the signals that need to switch layers; and the in-via routes are insulated from each other (see Fig. 2-3).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
The test for obviousness is not whether the features of a secondary reference may be bodily incorporated into the structure of the primary reference; nor is it that the claimed invention must be expressly suggested in any one or all of the references. Rather, the test is what the combined teachings of the references would have suggested to those of ordinary skill in the art. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981).
Claim(s) 2 and 26 is/are rejected under 35 U.S.C. 103 as being unpatentable over WANG in view of Case Law.
Regarding Claim 2. (Currently Amended) Wang teaches the PCB signal via structure according to claim 1, wherein each of the in-via routes is specifically obtained by performing groove milling on a the copper surface according to a line width of each of the signals that need[[s]] to switch layers and a line distance of each of the signals that need[[s]] to switch layers after the via structure is obtained from the PCB (MPEP 2113) and the inner wall of the via structure is electroplated with the-a copper surface as a layer surface of the PCB (specific implementation methods pargarph 16-17) except for a copper surface that has a the same thickness as a layer surface of the PCB.
It would have been obvious to one having ordinary skill in the art at the time the invention was made the surface have the same thickness in order to prevent any unplanned signal delays or interference as it is in the art, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Regarding Claim 26. (New) Wang teaches the PCB signal via structure according to claim 1, wherein an inner wall of the via structure is electroplated (MPEP 2113) with a copper surface (specific implementation methods paragraph 16-17) but does not teach a copper surface and an inner-layer copper foil of the PCB (see specific implementation methods paragraph 19-21).
It would have been obvious to one having ordinary skill in the art at the time the invention was made the surface have the same thickness as the foil in order to prevent any unplanned signal delays or interference as it is in the art, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is presented in the Notice of References Cited.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUHAMMED AZAM whose telephone number is (571)270-0593. The examiner can normally be reached Mon-Fri 11:00am-5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, TIMOTHY DOLE can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MA/Examiner, Art Unit 2847
/Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847
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