DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 12 is objected to because of the following informalities:
In Claim 12 (line 2), it appears the phrase “electrical conductive path” should instead read as --electrically conductive path-- to improve the grammatical form.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 11-15 and 19 are rejected under 35 U.S.C. 102a1 as being clearly anticipated by Shimura et al. (US 2006/0274992 cited by applicant).
Shimura (e.g. Figs. 1-2) discloses a high frequency/microwave device including:
Regarding Claim 11, A device for a transition of a high-frequency connection between a strip conductor connection (e.g. the strip portion 37 extending to the chip 4) and a waveguide (e.g. 2), comprising: an electrically insulating carrier substrate (e.g. dielectric plate 31) with a top side and a bottom side opposite the top side; wherein the carrier substrate includes a first portion with a strip conductor structure (e.g. the strip portion 37 extending to the chip 4), a second portion with a waveguide structure integrated into the carrier substrate (e.g. 3A is a substrate integrated waveguide portion, see [0057-0058]), and a third portion with a waveguide (e.g. 2) arranged on an outer side of the carrier substrate, and wherein the second portion is arranged between the first portion and the third portion (e.g. substrate integrated waveguide 3A connects waveguide 2 to the strip conductor portion 37).
Regarding Claim 12, wherein the strip conductor structure in the first portion includes an electrically conductive path on the top side (e.g. 37 is on the top of 31) and an electrically conductive coating on the bottom side (e.g. conductor layer 32b, see [0058]) of the carrier substrate, and wherein the waveguide (e.g. 2) in the third portion is arranged on the top side of the carrier substrate (e.g. waveguide 2 is mounted on the top of 31).
Regarding Claim 13, wherein the waveguide structure (e.g. 3A), integrated into the second portion of the carrier substrate (e.g. 31) includes an electrically conductive coating on the top side and the bottom side (e.g. top conductor layer 32a and bottom conductor layer 32b, see [0058]), and wherein lateral boundaries of the waveguide structure, integrated into the second portion of the carrier substrate, are formed using electrically conductive through-connection elements (e.g. 33, see [0058-0059]) between the top side and the bottom side.
Regarding Claim 14, wherein the waveguide structure, integrated into the second portion of the carrier substrate, and the waveguide arranged on the carrier substrate at least partially overlap in an overlap region (e.g. see Fig. 1 and Fig. 5, the waveguide 2 overlaps in the region of the end of the waveguide structure 3A).
Regarding Claim 15, wherein an aperture (e.g. coupling openings 34a, 34b are in conductor layer 32a, see [0062]) is provided in the overlap region in the electrically conductive coating on the top side of the carrier substrate for the waveguide structure (e.g. 3A) integrated into the second portion of the carrier substrate (e.g. see Fig. 5, overlap with openings 34a/34b).
Regarding Claim 19, a device for a transition of a high-frequency connection between a strip conductor connection and a waveguide, including: an electrically insulating carrier substrate with a top side and a bottom side opposite the top side, wherein the carrier substrate includes a first portion with a strip conductor structure, a second portion with a waveguide structure integrated into the carrier substrate, and a third portion with a waveguide arranged on an outer side of the carrier substrate, and wherein the second portion is arranged between the first portion and the third portion (e.g. see the description in relation to Claim 11 above for details); and a monolithic microwave integrated circuit (i.e. MMIC) arranged in the first portion on the top side of the carrier substrate (e.g. semiconductor chip 4 on the top of the end of strip conductor portion 37 can be considered an MMIC since it is a monolithic integrated chip that operates at microwave frequencies which is the definition of an MMIC, see [0002]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 17, 18, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Shimura et al. (US 2006/0274992 cited by applicant) in view of Baur et al. (US 2023/0358855).
Shimura discloses a high frequency device as described above but does not appear to teach a conductive adjustment element in an inner region of the aperture (Claim 17) or the waveguide (2) includes an antenna element (Claim 18).
Shimura further teaches that an antenna (e.g. 12) can be connected to the waveguide. Shimura also discloses the high frequency arrangement details of Claim 20 (see the specific details with regards to Claim 19 above), but does not teach the device in a radar system as recited in Claim 20.
Baur (e.g. Figs. 1-3) discloses a high frequency arrangement that transitions between a waveguide (305), a substrate integrated waveguide (102a, 102b, 101), and a radar chip (301); the waveguide includes an antenna (307); the device can be used for a radar system (e.g. see abstract); and the coupling aperture includes an excitation patch conductor (e.g. 201, i.e. an electrically conductive adjustment element) in the aperture (e.g. see Fig. 2).
Regarding Claim 20, it would have been considered obvious to one of ordinary skill in the art to have modified the Shimura device to have been used in a radar system where the chip is a radar chip such as taught by Baur, because the functionality of a radar system would have been a mere selection of a known use for a series transition between a waveguide, waveguide integrated in a substrate and a chip which is the same general orientation of the devices of both Baur and Shimura, thereby suggesting the obviousness of the modification to use the Shimura device for the same purpose as Baur.
Also, regarding Claim 17, it would have been considered obvious to one of ordinary skill in the art to have modified the Shimura coupling apertures to have included a patch conductor electrode within the aperture such as generally taught by Baur, because the patch electrode within the aperture would have provided the benefit of a desired signal excitation such as generally taught by Baur (e.g. see [0060]). Furthermore, regarding Claim 18, it would have been considered obvious to one of ordinary skill in the art to have modified the Shimura device to have the planar antenna (12) instead be a horn antenna built into the waveguide such as taught by Baur, because it would have been a mere substitution of art-recognized alternative antenna means for connection to a waveguide of a series transition between a waveguide, waveguide integrated in a substrate and a chip which is the same general orientation of the devices of both Shimura and Baur, thereby suggesting the obviousness of the modification.
Allowable Subject Matter
Claim 16 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Although the prior art of record teaches electrically conductive connection elements such as vias adjacent to the edge of coupling apertures/windows and connecting to the top and bottom conductor layers, the prior art of record does not teach an electrically conductive connection element is provided on an edge of the aperture.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEPHEN E JONES whose telephone number is (571)272-1762. The examiner can normally be reached 9AM to 5PM.
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/Stephen E. Jones/ Primary Examiner, Art Unit 2843