DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-10 are present for examination.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/18/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
RE claim 1, claim 1 recites the limitation "the electronic driving circuit" in line 5. There is insufficient antecedent basis for this limitation in the claim. Correction is required.
RE claim 1, claim 1 recites the limitation "the electronic control circuit" in line 7. There is insufficient antecedent basis for this limitation in the claim. Correction is required.
Claims 2-10 are rejected on the same basis as claim 1.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 5, 6, 8, 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yano et al (US 2004/0196049), hereinafter as Yano.
RE claim 1, Yano discloses that a display pixel comprising at least one light-emitting diode (see figures 5-6 and section [0045]; i.e., unit pixel 21i_k composed of three light-emitting diodes, namely red LED DRi_k, green LED DGi_k, blue LED DBi_k) and an electronic circuit for driving said light-emitting diode (see figure 5-6 and section [0046]; i.e., the driver IC for driving these LEDs, namely, driver DRICjR1 for driving red LED, driver DRICjG1 for driving green LED, driver DRICjB1 for driving blue LED), the display pixel comprising at least one first electrical conductive pad for receiving a supply voltage for the light-emitting diode (see figures 8&6 and section [0055]; i.e., supply terminal 50 of the connection terminals 43_k of the LED for receiving the bias power source voltage Va, VR, VG, VB), and one second electrically conductive pad coupled to electronic driving circuit (see figures 8&6 and sections [0057], [0046]; i.e., for example, electrically conductive pad SDI_1 coupled to electronic driving circuit DRIC1R1, wherein the voltage detection circuit 1 inputs an input data signal SDI from the input terminal 42, the input terminal 42 being an electrically conductive pad), the electronic driving circuit being configured in normal operation to drive the light-emitting diode on the basis of first signals received on the second electrically conductive pad (see figures 8&6 and sections [0057], [0046]; i.e., when the mode switching signal “Mode” indicates the normal operation mode, the voltage detection circuit 1 inputs an input data signal SDI input from the electrically conductive pad input terminal 42, for example, input data signal SDI_1 feeding to electronic driving circuit DRIC1R1), electronic control circuit comprising first and second modules (see figures 6&8 and sections [0049], [0050], [0051], [0052]; i.e., first and second modules are distributed in the electronic control circuit controller 30), the first module being coupled to the first and second electrically conductive pads and being configured to activate or deactivate the second module on the basis of the supply voltage received on the first electrically conductive pad and first signals received on the second electrically conductive pad (see figures 8&6&2 and sections [0046], [0047], [0049]-[0052], [0055]-[0057]; i.e., first module coupled to the first electrically conductive pad 50 and the second electrically conductive pad 42, configured to activate or deactivate the second module on the basis of the supply voltage Va/VR/VG/VB received on the first electrically conductive pad 50 and first signals SDI received on the second electrically conductive pad 42, namely, when the mode switching signal “Mode” indicating the “normal operation mode”, the voltage detection circuit 1 inputting an input data signal SDI input from the input terminal 42), the second module being configured, when activated, to provide second signals for driving the light-emitting diode for a test operation (see figure 2 and sections [0037]-[0042], [0061]; i.e., defect detection mode, when the mode switching signal “Mode” indicating a “defect detection mode”, inversely, activation of the driver 6 is stopped and the constant current source 3 and the reference voltage supply means 5 are activated; when the mode switching signal “Mode” indicating the “image display mode”, activation of the constant current source 3 and the reference voltage supply means 5 is stopped and only the driver 6 is activated, therefore, the light-emitting diode D emits light at a luminance in accordance with the video signal).
RE claim 5, Yano discloses that wherein the electronic driving circuit uses a clock signal to clock a storage of the first signals, and wherein the second module is configured, when activated, to further provide said clock signal (see figure 6 and section [0053]; i.e., the clock signal CLK configured to supply in parallel to be supplied to the driver IC, for defect detection or for light emission of the LED).
RE claim 6, Yano discloses that wherein the first module comprises at least one logic latch providing the activation signal (see figure 9 and section [0065]; i.e., the latch 9 providing the activation signal).
RE claim 8, Yano discloses that a face, the first and second electrically conductive pads being located on the face, the display pixel further comprising, on the face, at least one third electrically conductive pad electrically coupled to the electronic driving circuit, and comprising, on the face, at least one fourth electrically conductive pad, the electronic circuit comprising a controllable current source connected between an electrode of the light-emitting diode and the fourth electrically conductive pad (see figure 5 and its associated depictions; i.e., display face 20).
RE claim 9, Yano discloses that a display screen (see figure 5 and its associated depictions; i.e., display face 20), comprising: display pixels (see section [0045]; i.e., unit pixel 21i_k); first electrically conductive track coupled to the electronic circuit driving the display pixels (see figure 6 and sections [006], [0049]; i.e., for example, ENI_j, SKI_j, ENI_m, SDI_m, etc. which connected to driver DRICjR1, driver DRICmR1, respectively); a circuit for delivering third signals of the first electrically conductive tracks (see figure 6 and section [0049]; i.e., the controller 30); second electrically conductive tracks coupled to the electronic circuit driving the display pixels (see figure 6 and sections [006], [0049]; i.e., for example, ENI_j, SKI_j, ENI_m, SDI_m, etc. which connected to driver DRICjR1, driver DRICmR1, respectively); a circuit for delivering for the first signals to the second electrically conductive tracks (see figure 6 and sections [0049], [0050]; i.e., the controller 30); third and fourth electrically conductive tracks coupled to the electronic control circuits of the display pixels (see figures 2/3/4 and its associated depictions; i.e., Out1, Out2, … OutN, S10, etc.); and a circuit for delivering a supply voltage to the light-emitting diodes between the third and fourth electrically conductive tracks (see figures 2&3 and its associated depictions; i.e., the circuit for delivering supply voltage Va to the light-emitting diodes D between electrically conductive tracks 3, 4 and 5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Yano et al (US 2004/0196049), hereinafter as Yano, in view of Murphy et al (USPN 10,063,369), hereinafter as Murphy.
RE claim 3, Yano discloses the invention substantially as claimed.
However, Yano does not specifically disclose that wherein the electronic driving circuit is configured to drive the light-emitting diode by pulse-width modulation on the basis of the first signals during normal operation, and on the basis of the second signals during a test operation.
Murphy teaches that LED 141 may be activated when a voltage input meets a threshold voltage and otherwise be off when the voltage input is below that voltage. The light translation sub-circuit 123 may perform ADC conversion to produce a digital output. The output may be a pulse width modulated (PWM) signal that approximately represents the analog reference signal itself, such that the PMW light signal 133 effectively produces varying intensities of light (when averaged over time) (see column 9 lines 54-67, column 10 lines 1-4). The motivation of Murphy is to effectively produce varying intensities of light when averaged over time (see column 10 lines 1-4).
Yano and Murphy are combinable because they are from the same field of endeavor. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to modify Yano by including the teaching from Murphy in order to effectively produce varying intensities of light when averaged over time.
RE claim 4, Yano discloses the invention substantially as claimed.
However, Yano does not specifically disclose that wherein the electronic driving circuit uses an analog reference signal for pulse width modulation control, and wherein the second module is configured, when activated, to additionally provides said analog reference signal.
Murphy teaches that an analog reference signal may produce undesirable results when applied to a LED or other digital light-emitting components. The light translation sub-circuit 123 may convert the analog reference signal into a corresponding digital signal, which may either approximately represent the analog reference signal itself, or may be a digital representation of information encoded within the analog reference signal. For instance, the output may be a pulse width modulated (PMW) signal that approximately represents the analog reference signal itself, such that the PMW light signal 133 effectively produces varying intensities of light (when averaged over time) (see column 9 lines 54-67, column 10 lines 1-4).
Yano and Murphy are combinable because they are from the same field of endeavor. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to modify Yano by including the teaching from Murphy in order to effectively produce varying intensities of light when averaged over time.
Allowable Subject Matter
Claims 2, 7 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Takahiro (US 2016/0240132)
Peng et al (US 2012/0299896)
Gray et al (US 2022/0020316)
An et al (US 2022/0343836)
Any inquiry concerning this communication from the examiner should be directed to FRED TZENG whose telephone number is 571-272-7565. The examiner can normally be reached on weekdays from 2:0 pm to 10:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached on 571-272-0666. The fax phone numbers for the organization where this application or proceeding is assigned are 571-273-8300 for regular communications and 571-273-7565 for After Final communications.
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/FRED TZENG/ Primary Examiner, Art Unit 2625
FFT
November 28, 2025