DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Drawings
Figure 2 should be designated by a legend such as --Prior Art—because, as per Paragraphs 39 and 48 of Applicant’s disclosure, only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “baseboard management control apparatus configured for receiving…” in Claim 1, “control module…configured for processing…and controlling…” and “trusted root security management apparatus…configured for providing…” in Claim 2; “control module…configured for decoupling…and decoupling…” in Claim 3; “protocol conversion apparatus…configured for performing conversion…” in Claim 4; “control module…configured for…connecting…” in Claim 5; “baseboard management control apparatus configured for providing…” in Claim 11; “control module…configured for controlling…” in Claim 12; “control module…configured [for] directly connecting…” in Claim 13; “baseboard management control apparatus” in Claim 19; and “baseboard management control apparatus” in Claim 20.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Objections
Claim 13 is objected to because of the following informalities: the word “for” appears to have been omitted following the word “configured” and prior to the word “directly” in Line 2. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “a CPU connected to the gating switch” in Line 4. It is unclear as to whether this CPU connected to the gating switch is the same as the previously claimed CPU which sends a PCIe signal to the baseboard management control apparatus though the gating switch in Lines 2-3, as sending a signal through a gating apparatus necessarily requires connection to the gating apparatus, and the claim does not previously state that multiple CPU’s can be connected to the gating apparatus.
Claim 1 recites the limitation “the gating switch connected to two CPUs of a server” in Line 10. It is unclear as to whether the two CPUs of the server include the previously claimed “CPU connected to the gating switch” in Line 4, or whether they refer to different CPUs.
Claim 1 recites the limitation “a set of PCIe signals of a designating CPU of the two CPUs” in Lines 11-12. It is unclear as to whether the set of PCIe signals are part of the previously claimed “PCIe signal” in Line 2, as “the set of PCIe signals” in Lines 11-12 is recited in the plurality, and the “PCIe signal” in Line 2 is recited in the singular.
Claim 1 recites the limitation "the other set of PCIe signals" in Line 13. There is insufficient antecedent basis for this limitation in the claim.
Claim 1 recites the limitation “the gating switch…configured for connecting a set of PCIe signals of a designated CPU of the two CPUs to the baseboard management control apparatus and connecting the other set of PCIe signals to the USB controller” in Lines 10-13. It is unclear as to whether the set of PCIe signals is connected to the baseboard management control apparatus at the same time that the other set of PCIe signals is connected to the USB controller .
For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted Claim 1 utilizing the following (marked-up) language: “A server management system, comprising: a baseboard management control apparatus configured for receiving two sets of PCIe signals sent by two CPUs, respectively, through a gating switch, sending a keyboard and mouse instruction received through a first USB interface to one of the CPUs connected to the gating switch, and assisting the one of the CPUs connected to the gating switch in startup; a USB controller connected to the baseboard management control apparatus and configured for performing mutual conversion between a USB signal and a PCIe signal of the two sets of PCIe signals, so that communication between the at least one of the CPUs connected to the gating switch and the first USB interface is implemented; the two CPUs being two CPUs of a server, the gating switch connected to the two CPUs of [[a]] the server, the baseboard management control apparatus and the USB controller respectively, and configured for connecting, at the same time, a first set first designated CPU of the two CPUs to the baseboard management control apparatus and connecting a second set of the PCIe signals of a second CPU of the two CPUs to the USB controller; and the first USB interface connected to the baseboard management control apparatus and the USB controller respectively.
Claim 2 recites the limitation "the CPU" in Line 5. It is unclear as to whether this is intended to refer to the “one of the CPUs” in Line 4 of Claim 2. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “the one of the CPUs”.
Claim 2 recites the limitation "the CPU" in Line 13. It is unclear as to which of the “two CPUs” of Line 12 this refers to.
For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted Claim 2 utilizing the following (marked-up) language: “The system according to claim 1, wherein the baseboard management control apparatus comprises: a baseboard management controller BMC connected to an enhanced serial peripheral interface (ESPI interface) of one of the CPUs and configured for receiving the set of PCIe signals sent by the one of the CPUs through the gating switch, sending the keyboard and mouse instruction received through the first USB interface to the one of the CPUs connected to the gating switch, and receiving startup information sent by one of the CPUs through its own ESPI interface; a control module connected to the BMC, an ESPI interface of the other CPU and the gating switch respectively, and configured for processing the startup information sent by the other CPU through the ESPI interface by using a preset program, and controlling a state of the gating switch; and a trusted root security management apparatus connected to the two CPUs and the BMC respectively, and configured for providing a verified startup program for the one of the CPUs and the BMC during a power-on phase of the server.
Claim 4 recites the limitation "the UART signal sent by the protocol conversion apparatus" in Lines 8-9. There is insufficient antecedent basis for this limitation in the claim. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “a UART signal sent by the protocol conversion apparatus”.
Claim 5 recites the limitation "the CPU" in Lines 2, 4, and 5. It is unclear as to which of the multiple previously claimed CPUs this is intended to refer to. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “the one of the CPUs”.
Claim 7 recites the limitation "the CPU connected to the gating switch" in Line 4. It is unclear as to which of the previously claimed “two CPUs of a server” connected to the gating switch in Line 10 of Claim 1 this is intended to refer to. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “the one of the CPUs connected to the gating switch”.
Claim 9 recites the limitation “connected to two CPUs” in Line 3. It is unclear as to whether this is intended to refer to the previously claimed “two CPUs of a server” in Line 10 of Claim 1. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “connected to the two CPUs of the server”.
Claim 10 recites the limitation “a CPU which operates currently” in Line 2. It is unclear as to whether this refers to any of the multiple previously claimed CPUs. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “a CPU of the two CPUs of the server which operates currently”.
Claim 13 recites the limitation “an I3C signal of a CPU” in Line 2. It is unclear as to whether this refers to the previously claimed “I3C signal of a CPU” in Line 4 of Claim 5. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “an I3C signal of a CPU of the two CPUs of the server”.
Claim 15 recites the limitation "the third USB interface" in Line 1. There is insufficient antecedent basis for this limitation in the claim. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this claim as being dependent upon Claim 7.
Claim 16 recites the limitation "A server, comprising the server management system according to Claim 1" in Lines 1-2. It is unclear as to whether this is the same server as the previously claimed “a server” in Line 10 of Claim 1. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted the server of Claim 16 as being the same as the server of Claim 1.
Claim 17 recites the limitation "two CPUs of the server" in Lines 1-2. It is unclear as to whether these are the same CPUs as the previously claimed “two CPUs of a server” in Line 10 of Claim 1. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “the two CPUs of the server”.
Claim 18 recites the limitation "two CPUs of the server" in Lines 1-2. It is unclear as to whether these are the same CPUs as the previously claimed “two CPUs of a server” in Line 10 of Claim 1. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “the two CPUs of the server”.
Claim 19 recites the limitation "a CPU in the server" in Line 1. It is unclear as to whether this is one of the previously claimed “two CPUs of a server” in Line 10 of Claim 1. For the purposes of evaluating prior art with respect to patentability, the Examiner has interpreted this limitation as “a CPU of the two CPUs of the server”.
Dependent claims inherit the indefiniteness of their parent claims and are rejected for at least the same reasons.
Allowable Subject Matter
Claim(s) 1-20 would be allowable if rewritten or amended as set forth above to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter: The most relevant prior art referenced are US Patent Application Publication Number 2014/0344431 to Hsu et al. (“Hsu”) and Chinese Patent Publication Number CN 113608934 A to Chen et al. (“Chen”), with reference to the attached English language translation.
In reference to Claim 1, Hsu discloses server management system, comprising: a baseboard management control apparatus (See Figure 5 Number 331) configured for receiving two sets of PCIe signals sent by two CPUs, respectively (See Figure 5 Numbers 311 and 312 and Paragraph 35), through a gating switch (See Figure 5 Number 551), sending a keyboard and mouse instruction received through a first USB interface to one of the CPUs connected to the gating switch (See Paragraph 38), and assisting the one of the CPUs connected to the gating switch in startup (See Paragraph 9); a USB controller connected to the baseboard management control apparatus and configured for performing mutual conversion between a USB signal and a PCIe signal of the two sets of PCIe signals, so that communication between the at least one of the CPUs connected to the gating switch and the first USB interface is implemented (See Figure 5 and Paragraphs 35 and 38 [USB interface connected to the right of Number 331 must necessarily have an associated USB controller; when communicating with the server CPUs via PCIe, conversion must take place]); the two CPUs being two CPUs of a server (See Figure 5 Numbers 301 and 302, together). However, Hsu does not explicitly disclose the gating switch connected to the two CPUs of the server, the baseboard management control apparatus and the USB controller respectively, and configured for connecting, at the same time, a first set of the PCIe signals of a first designated CPU of the two CPUs to the baseboard management control apparatus and connecting a second set of the PCIe signals of a second CPU of the two CPUs to the USB controller; and the first USB interface connected to the baseboard management control apparatus and the USB controller respectively. Furthermore, such a feature would not have been obvious to one of ordinary skill in the art in view of the prior art.
In reference to Claim 1, Chen discloses server management system, comprising: a baseboard management control apparatus (See Figure 1 BMC) configured for receiving two sets of PCIe signals sent by two CPUs, respectively (See Figure 1 FT2000+ and Page 4 Paragraphs 3, 5, and 6), through a gating switch (See Figure 1 MUX and SWITCH); a USB controller connected to the baseboard management control apparatus and configured for performing mutual conversion between a USB signal and a PCIe signal of the two sets of PCIe signals (See Figure 1 uPD720201 and Page 4 Paragraph 6); the two CPUs being two CPUs of a server (See Page 2 Paragraph 2); the gating switch connected to the two CPUs of the server, the baseboard management control apparatus and the USB controller respectively (See Figure 1), and configured for connecting a first set of the PCIe signals of a first designated CPU of the two CPUs to the baseboard management control apparatus and connecting a second set of the PCIe signals of a second CPU of the two CPUs to the USB controller (See Page 6 Paragraphs 4-6); and the first USB interface connected to the baseboard management control apparatus and the USB controller respectively (See Figure 1). However, Chen does not explicitly disclose sending a keyboard and mouse instruction received through a first USB interface to one of the CPUs connected to the gating switch, and assisting the one of the CPUs connected to the gating switch in startup; and the gating switch configured for connecting, at the same time, a first set of the PCIe signals of a first designated CPU of the two CPUs to the baseboard management control apparatus and connecting a second set of the PCIe signals of a second CPU of the two CPUs to the USB controller. Furthermore, such a feature would not have been obvious to one of ordinary skill in the art in view of the prior art.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 21 June 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
The information disclosure statement (IDS) submitted on 19 August 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Conclusion
The art made of record and not relied upon is considered pertinent to applicant's disclosure.
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/THOMAS J. CLEARY/Primary Examiner, Art Unit 2175