DETAILED ACTION
This is the first office action on the merits for 18/723,069, filed 6/21/2024, which is a national stage entry of PCT/US2022/053972, filed 12/23/2022, which claims priority to provisional application 63/293,347, filed 12/23/2021.
Claims 1, 4, 7-13, 22, 25, 28, 29, 46, 49-51, and 54-56 are pending, Claims 1, 4, 7-13, 22, 25, 28, 29, and 55-56 are withdrawn, and Claims 46, 49-51, and 54 are examined herein.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of the invention of Group II, Claims 46, 49-51, and 54 in the reply filed on 2/2/2026 is acknowledged.
Claims 1, 4, 7-13, 22, 25, 28, 29, and 55-56 are withdrawn.
Additional Prior Art
The Examiner wishes to apprise the Applicant of the following references, which are not currently applied in a rejection.
Ciris, et al. (Materials Science in Semiconductor Processing 91 (2019) 90-96): This reference teaches CdCl2 treatment of a CdS/CdSe bilayer.
Patel, et al. (Vacuum 153 (2018) 43-47): This reference teaches annealing CdSe with NH4Cl.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 46 and 49-51 are rejected under 35 U.S.C. 103 as being unpatentable over Alivasatos, et al. (U.S. Patent Application Publication 2009/0217973 A1), in view of Ermlovich, et al. (Thin Solid Films, 22, (1974) 157-164), Woods, et al. (U.S. Patent Application Publication 2009/0020149 A1), and Compaan, et al. (U.S. Patent Application Publication 2019/0305166 A1).
In reference to Claim 46, Alivasatos teaches a method for forming an absorber layer of a photovoltaic device (paragraphs [0016]-[0018], Figs. 3 and 4A-B).
The method of Alivasatos comprises providing a layer stack comprising a p-type layer (corresponding to the deposition of the CdTe layer, described in paragraph [0016]).
The method of Alivasatos comprises depositing a polycrystalline film over the p-type layer, wherein the polycrystalline film consists essentially of CdSe (corresponding to the deposition of the CdSe layer on the CdTe layer, paragraph [0016], which is taught to be deposited from a solution of nanocrystals, paragraphs [0013]-[0014]).
The method of Alivasatos comprises contacting an exposed surface of the polycrystalline film with a halogen compound (CdCl2) and heating the polycrystalline film in a controlled environment to form the absorber layer (i.e. 4000 °C in oxygen, paragraph [0016]).
This disclosure teaches the limitations of Claim 49, wherein the halogen compound comprises CdCl2.
The method of Alivasatos does not comprise the use of an accelerant.
To solve the same problem of providing an annealed CdSe photoactive layer, Ermlovich teaches that annealing CdSe in the presence of LiCl provides the benefit of improving the film structure and increasing the photosensitivity of the CdSe film (Abstract, section 3.3).
Ermlovich further teaches that annealing CdSe with LiCl produces slightly different enhancements than are achieved by annealing CdSe with CdCl2 (section 3.2).
Further, to solve the same problem of providing a CdSe photoactive layer, Woods teaches that Group IA chlorides and CdCl2 can be used in combination as annealing agents applied to a CdSe layer prior to annealing (paragraph [0079]).
Therefore, absent a showing of persuasive secondary considerations, it would have been obvious to one of ordinary skill in the art at the time the instant invention was filed to have incorporated LiCl into the CdSe annealing process of Alivasatos, based on Ermlovich’s disclosure that annealing CdSe with LiCl provides the benefit of improving the film structure and increasing the photosensitivity of the CdSe film (Abstract, section 3.3), and Woods’s disclosure that CdCl-2 and Group IA chlorides can be used in conjunction for annealing CdSe layers.
Incorporating LiCl into the CdSe annealing process of Alivasatos teaches the limitations of Claim 46, wherein the method involves contacting an exposed surface of the polycrystalline (i.e. CdSe) film with an accelerant.
Incorporating LiCl into the CdSe annealing process of Alivasatos teaches the limitations of Claim 50, wherein the accelerant comprises Li.
Alivasatos teaches that the controlled environment comprises oxygen (paragraph [0016]).
Alivasatos does not teach that the controlled environment comprises selenium.
To solve the same problem of providing a CdSe photoactive layer, Woods teaches that annealing CdSe in a Se environment provides the benefit of preventing Se from evaporating from the CdSe layer (paragraph [0080]).
Therefore, absent a showing of persuasive secondary considerations, it would have been obvious to one of ordinary skill in the art at the time the instant invention was filed to have added Se into the annealing environment of the method of Alivasatos, based on Woods’s disclosure that annealing CdSe in a Se environment provides the benefit of preventing Se from evaporating from the CdSe layer (paragraph [0080]).
Adding Se into the annealing environment of the method of Alivasatos teaches the limitations of Claim 46, wherein the controlled environment comprises selenium.
Alivasatos teaches that the annealing process of his invention improves carrier transport, but not appear to result in significant doping (paragraph [0022]). He further teaches that there is minimum intermixing at the interface between the p-type CdTe and the n-type CdSe (paragraph [0016]).
Therefore, it is the Examiner’s position that this disclosure teaches that “the absorber layer has an n type carrier concentration of less than 1x1017 cm3,” because, since the CdTe layer is p-type, it contains no/minimal n-type carriers. Therefore, a portion of the absorber layer “has an n type carrier concentration of less than 1x1017 cm3.”
Modified Alivasatos is silent regarding the concentration of chlorine at the grain boundaries.
Therefore, he does not teach that the absorber layer includes chlorine in grain boundaries at a level equal to or greater than 1x1013 in the grain boundaries.
However, he teaches that recrystallization and grain growth do not occur in the absence of CdCl2 (paragraph [0017]).
To solve the same problem of providing a CdSe/CdTe photovoltaic device, Compaan teaches that exposing CdSe active layers to CdCl2 (as in Alivasatos) passivates grain boundaries, promotes interdiffusion, and improves free carrier concentrations (paragraph [0031]).
Therefore, absent a showing of persuasive secondary considerations, it would have been obvious to one of ordinary skill in the art at the time the instant invention was filed to have selected the amount of CdCl2 applied to the CdSe layer of modified Alivasatos (and therefore, the amount of chlorine at the grain boundaries of the CdSe/CdTe film), in order to tune the grain growth, grain boundary passivation, interdiffusion, and free carrier concentration in the film.
It is the Examiner’s position that this routine optimization would have led one of ordinary skill in the art at the time the instant invention was filed to have arrived at the claimed range of “chlorine in grain boundaries at a level equal to or greater than 1x1013 in the grain boundaries,” without undue experimentation.
“[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). The discovery of an optimum value of a known result effective variable, without producing any new or unexpected results, is within the ambit of a person of ordinary skill in the art. See In re Boesch, 205 USPQ 215 (CCPA 1980) (see MPEP § 2144.05, II.).
In reference to Claim 51, modified Alivasatos as applied to Claim 51 teaches that the accelerant is LiCl, as described fully above.
This disclosure does not teach that the accelerant comprises RbCl.
However, as described above, Woods teaches that any Group IA chloride and CdCl2 can be used in combination as annealing agents applied to a CdSe layer prior to annealing (paragraph [0079]).
Therefore, absent a showing of persuasive secondary considerations, it would have been obvious to one of ordinary skill in the art at the time the instant invention was filed to have incorporated any Group IA chloride into the CdSe annealing process of modified Alivasatos, including RbCl, because this would encompass merely a selection of a known material from a finite list.
Incorporating RbCl as the accelerant in the CdSe annealing process of Alivasatos teaches the limitations of Claim 51, wherein the accelerant comprises RbCl,
Claim 54 is rejected under 35 U.S.C. 103 as being unpatentable over Alivasatos, et al. (U.S. Patent Application Publication 2009/0217973 A1), in view of Ermlovich, et al. (Thin Solid Films, 22, (1974) 157-164), Woods, et al. (U.S. Patent Application Publication 2009/0020149 A1), and Compaan, et al. (U.S. Patent Application Publication 2019/0305166 A1), and further in view of Shimizu, et al. (U.S. Patent 3,793,069).
In reference to Claim 54, modified Alivasatos is silent regarding the average gain size of the polycrystalline film. Therefore, he does not teach that an average grain size of the polycrystalline film is in a range of 1.3 μm to 3.0 μm.
To solve the same problem of providing a CdSe film annealed in a mixed atmosphere of oxygen and selenium, Shimizu teaches that the relative amounts of oxygen and selenium in the annealing atmosphere can be controlled to produce a CdSe layer with a grain size of 1.5 microns and narrow size distribution (Fig. 1, column 2, lines 30-52).
Shimizu further teaches that this grain size and narrow size distribution result in good electrical performance and uniform properties over a large area (column 1, lines 10-30).
Therefore, absent a showing of persuasive secondary considerations, it would have been obvious to one of ordinary skill in the art at the time the instant invention was filed to have tuned the relative amounts of Se and O in the annealing atmosphere during the process of Alivasatos, in order to form a film with a near-uniform grain size of ~1.5 microns, based on the disclosure of Shimizu.
This modification teaches the limitations of Claim 54, wherein an average grain size of the polycrystalline film is in a range of 1.3 μm to 3.0 μm (i.e. ~1.5 microns).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SADIE WHITE whose telephone number is (571)272-3245. The examiner can normally be reached 6am-2:30pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Allison Bourke, can be reached at 303-297-4684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SADIE WHITE/Primary Examiner, Art Unit 1721