Prosecution Insights
Last updated: August 16, 2026
Application No. 18/725,287

Surface Mount Multilayer Ceramic Capacitor

Non-Final OA §103§112
Filed
Jun 28, 2024
Priority
Dec 30, 2021 — provisional 63/295,070 +1 more
Examiner
RAMASWAMY, ARUN
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kyocera Corporation
OA Round
2 (Non-Final)
85%
Grant Probability
Favorable
2-3
OA Rounds
5m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
680 granted / 804 resolved
+16.6% vs TC avg
Moderate +12% lift
Without
With
+12.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
21 currently pending
Career history
838
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
59.9%
+19.9% vs TC avg
§102
29.4%
-10.6% vs TC avg
§112
6.1%
-33.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 804 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) 1 and its depending claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the first air void positioned along the longitudinal direction between the two external terminals as required by claim 24 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 25 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 25 requires the air void to extend from the top surface to the bottom surface. However, claim 1 require the air void to be surrounded by dielectric material. The claim will be examined as best understood to be the air void extends in the direction the top surface and bottom surface face one another. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cain (US Publication 2020/0303127) in view Bultitude (US Publication 2018/0012706). In re claim 1, Cain discloses a multilayer coupling capacitor comprising: a main body (10 – Figure 1, ¶61) containing a first set of alternating dielectric layers (¶66) and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers (105, 115 – Figure 1, ¶64), each set of alternating dielectric layers and internal electrode layers containing a first internal electrode layer (105 – Figure 1) and a second internal electrode layer (115 – Figure 1), each internal electrode layer including a top edge, a bottom edge opposite the top edge, and two side edges extending between the top edge and the bottom edge that define a main body of the internal electrode layer (¶5, Figure 1C), external terminals (12, 14 – Figure 1, ¶61) electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the coupling capacitor and a bottom surface of the coupling capacitor opposing the top surface of the coupling capacitor (¶61). Cain does not disclose wherein the capacitor includes one or more dielectric regions including one or more air voids surrounded by dielectric material, the one or more dielectric regions free of material forming the internal electrode layers, and Wherein at least one dielectric region of the one or more dielectric regions is present between the first set and the second set such that at least one air void of the one or more air voids is defined between the first set and the second set. Bultitude discloses wherein the capacitor (20 – Figure 2, ¶33) includes one or more dielectric regions (30 – Figure 2, ¶33; Note that the dielectric region can include element 32 on the lateral surfaces of internal electrodes 22, 24 – Figure 2, ¶33) including one or more air voids (29 – Figure 2, ¶33) surrounded by dielectric material (32 – Figure 2), the one or more dielectric regions free of material forming the internal electrode layers (22, 24 – Figure 2, ¶33), and Wherein at least one dielectric region (30 – Figure 2) of the one or more dielectric regions is present between the first set (22, 24 in upper half of 20 – Figure 2) and the second set (22, 24 in lower half of 20 – Figure 2) such that at least one air void of the one or more air voids is defined between the first set and the second set (Figure 2). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Bultitude to provide for a capacitor element capable of withstanding higher electric fields without deleterious effects or excessive microphonic noise generation (¶10: Bultitude). In re claim 2, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein at least one of the first internal electrode layer or the second internal electrode layer (105 – Figure 1B) electrically contacts the external terminal on the top surface of the coupling capacitor (10 - Figure 1) and the other internal electrode layer (115 – Figure 1B) electrically contacts the external terminal on the bottom surface of the coupling capacitor (10 – Figure 1) opposing the top surface of the coupling capacitor (Claim 33). In re claim 3, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein at least one lateral edge of the first internal electrode (105 – Figure 1) layer is substantially aligned with at least one lateral edge of the second internal electrode layer (115 – Figure 1) (Figure 1C) (¶48, ¶64). In re claim 4, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein both lateral edges of the first internal electrode layer (105 – Figure 1) are substantially aligned with both lateral edges of the second internal electrode layer (115 – Figure 1) (¶48, ¶64, Claim 35). In re claim 6, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the respective one dielectric region of the one or more dielectric regions is present between a first internal electrode layer or a last internal electrode layer in a set and an adjacent side surface. Bultitude discloses wherein the respective dielectric region of the one or more dielectric regions (30 and 32 surrounding 22, 24 – Figure 2) is present between a first internal electrode layer or a last internal electrode layer (22, 24 closest to 28 – Figure 2) in a set and an adjacent side surface (Figure 2; Note that the term ‘dielectric region’ can be any region in between or surrounding the internal electrode.). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Bultitude to provide for a capacitor element capable of withstanding higher electric fields without deleterious effects or excessive microphonic noise generation (¶10: Bultitude). In re claim 7, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein a respective one dielectric region of the one or more dielectric regions is present between a lateral edge of an internal electrode layer and an adjacent side surface. Bultitude discloses wherein a respective one dielectric region of the one or more dielectric regions (30 and 32 surrounding 22, 24 – Figure 2) is present between a lateral edge of an internal electrode layer (22, 24 closest to 28 – Figure 2) and an adjacent side surface (Figure 2; Note that the term ‘dielectric region’ can be any region in between or surrounding the internal electrode.). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Bultitude to provide for a capacitor element capable of withstanding higher electric fields without deleterious effects or excessive microphonic noise generation (¶10: Bultitude). In re claim 8, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the one or more air voids comprises a via. Bultitude discloses wherein the one or more air voids (28 – Figure 2) comprises a via (See Figure 2; Note that [¶62] of the Instant Specification states that the via may extend varying distances.). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Bultitude to provide for a capacitor element capable of withstanding higher electric fields without deleterious effects or excessive microphonic noise generation (¶10: Bultitude). In re claim 9, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 8, as explained above. Cain does not disclose wherein the via extends through the thickness of the capacitor. Bultitude discloses wherein the via (28 – Figure 2) extends between a first set of internal electrodes (22, 24 in upper half of 20 – Figure 2) and a second set of internal electrodes (22, 24 in lower half of 20 – Figure 2). The combination of Cain and Bultitude discloses wherein the via extends through the thickness of the capacitor. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Bultitude to provide for a capacitor element capable of withstanding higher electric fields without deleterious effects or excessive microphonic noise generation (¶10: Bultitude). In re claim 10, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the one or more dielectric regions includes a respective one dielectric region present between two external terminals . Bultitude discloses wherein the one or more dielectric regions includes a respective one dielectric region (30 - Figure 2) present between two external terminals (25, 26 – Figure 2). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Bultitude to provide for a capacitor element capable of withstanding higher electric fields without deleterious effects or excessive microphonic noise generation (¶10: Bultitude). In re claim 12, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 8, as explained above. Cain further discloses wherein the dielectric layers comprise a ceramic (¶41). In re claim 13, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 12, as explained above. Cain further discloses wherein the ceramic comprises a titanate (¶70). In re claim 14, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein the internal electrode layers comprise a conductive metal (¶71). In re claim 15, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 14, as explained above. Cain further discloses wherein the conductive metal comprises nickel or an alloy thereof (¶71). In re claim 16, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein the external terminals are electroplated layers (Claim 40). In re claim 17, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein the external terminals are electroless plated layers (Claim 41). In re claim 18, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein the external terminals comprise a conductive metal (Claim 42). In re claim 19, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 18, as explained above. Cain further discloses wherein the conductive metal comprises silver, gold, palladium, platinum, tin, nickel, chrome, titanium, tungsten, or combinations or alloys thereof (Claim 43). In re claim 20, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 18, as explained above. Cain further discloses wherein the conductive metal comprises copper or an alloy thereof (Claim 44). In re claim 21, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses a circuit board containing a coupling capacitor (Claim 46). In re claim 22, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses a communications device containing a coupling capacitor (Claim 47). In re claim 23, Cain in view of Bultitude discloses the communications device of claim 22, as explained above. Cain further discloses wherein the device includes an Ethernet system, a wireless network router, a fiber optic communications system, or a storage device (Claim 48). In re claim 24, Cain in view of Bultitude discloses the communications device of claim 1, as explained above. Cain further discloses wherein the external terminals include two external terminals (12, 14 – Figure 1A) formed on the top surface and two external terminals formed on the bottom surface (¶61), wherein the two external terminals formed on the top surface are spaced apart from one another along a longitudinal direction (Figure 1A) and the two external terminals formed on the bottom surface are spaced apart from one another along the longitudinal direction (¶61, Figure 1A). Cain does not disclose wherein the one or more air voids comprises a first air void positioned along the longitudinal direction between the two external terminals on the top surface and the two external terminals on the bottom surface. Bultitude discloses wherein the air void (28 – Figure 2) extends between a first set of internal electrodes (22, 24 in upper half of 20 – Figure 2) and a second set of internal electrodes (22, 24 in lower half of 20 – Figure 2). The combination of Cain and Bultitude discloses wherein the one or more air voids comprises a first air void positioned along the longitudinal direction between the two external terminals on the top surface and the two external terminals on the bottom surface. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Bultitude to provide for a capacitor element capable of withstanding higher electric fields without deleterious effects or excessive microphonic noise generation (¶10: Bultitude). In re claim 25, Cain in view of Bultitude discloses the communications device of claim 1, as explained above. Cain does not disclose wherein the at least one air void extends from the top surface to the bottom surface. Bultitude discloses wherein the air void (28 – Figure 2) extends between a first set of internal electrodes (22, 24 in upper half of 20 – Figure 2) and a second set of internal electrodes (22, 24 in lower half of 20 – Figure 2). The combination of Cain and Bultitude discloses wherein the at least one air void extends from the top surface to the bottom surface. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Bultitude to provide for a capacitor element capable of withstanding higher electric fields without deleterious effects or excessive microphonic noise generation (¶10: Bultitude). Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cain (US Publication 2020/0303127) in view Bultitude (US Publication 2018/0012706) and in further view of Trinh et al. (US Publication 2019/0043669). In re claim 11, Cain in view of Bultitude discloses the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the one or more air voids constitute from 1 vol% to 15 vol.% of the capacitor. Trinh discloses adjusting the size of the air voids, and thus volume of the voids, is correlated to the capacitance of the device, electrical current movement, and the generation of an electrical field (¶83). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the volume of the air voids to create a desired balance between capacitance, electrical current movement, and electrical field generation, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Azuma et al. (US Publication 2018/0012702) Figure 2 Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARUN RAMASWAMY whose telephone number is (571)270-1962. The examiner can normally be reached Monday - Friday, 9:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ARUN RAMASWAMY/ Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Jun 28, 2024
Application Filed
Jan 16, 2026
Non-Final Rejection mailed — §103, §112
Apr 15, 2026
Response Filed
Jul 15, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Prosecution Projections

2-3
Expected OA Rounds
85%
Grant Probability
97%
With Interview (+12.4%)
2y 6m (~5m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 804 resolved cases by this examiner. Grant probability derived from career allowance rate.

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