DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cain (US Publication 2020/0303127) in view Trinh et al. (US Publication 2019/0043669).
In re claim 1, Cain discloses a multilayer coupling capacitor comprising:
a main body (10 – Figure 1, ¶61) containing a first set of alternating dielectric layers (¶66) and internal electrode layers and a second set of alternating dielectric layers and internal electrode layers (105, 115 – Figure 1, ¶64),
each set of alternating dielectric layers and internal electrode layers containing a first internal electrode layer (105 – Figure 1) and a second internal electrode layer (115 – Figure 1),
each internal electrode layer including a top edge, a bottom edge opposite the top edge, and two side edges extending between the top edge and the bottom edge that define a main body of the internal electrode layer (¶5, Figure 1C),
external terminals (12, 14 – Figure 1, ¶61) electrically connected to the internal electrode layers wherein the external terminals are formed on a top surface of the coupling capacitor and a bottom surface of the coupling capacitor opposing the top surface of the coupling capacitor (¶61).
Cain does not disclose wherein the capacitor includes one or more dielectric regions including one or more air voids.
Trinh discloses wherein the capacitor (80 - Figure 4A, ¶84) includes one or more dielectric regions (66 – Figure 4A, ¶82) including one or more air voids (72 – Figure 4A, ¶83, ¶9).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Cain to improve the high frequency performance of the capacitor (¶5-6: Trinh).
In re claim 2, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein at least one of the first internal electrode layer or the second internal electrode layer (105 – Figure 1B) electrically contacts the external terminal on the top surface of the coupling capacitor (10 - Figure 1) and the other internal electrode layer (115 – Figure 1B) electrically contacts the external terminal on the bottom surface of the coupling capacitor (10 – Figure 1) opposing the top surface of the coupling capacitor (Claim 33).
In re claim 3, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein at least one lateral edge of the first internal electrode (105 – Figure 1) layer is substantially aligned with at least one lateral edge of the second internal electrode layer (115 – Figure 1) (Figure 1C) (¶48, ¶64).
In re claim 4, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein both lateral edges of the first internal electrode layer (105 – Figure 1) are substantially aligned with both lateral edges of the second internal electrode layer (115 – Figure 1) (¶48, ¶64, Claim 35).
In re claim 5, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the one or more dielectric regions is present between each set of alternating dielectric layers and internal electrode layers containing a first internal electrode layer and a second internal electrode layer.
Trinh discloses wherein the one or more dielectric regions (72 – Figure 4A) is present between each set of alternating dielectric layers and internal electrode layers (82, 84 – Figure 4A, ¶84) containing a first internal electrode layer (54 – Figure 4A, ¶84) and a second internal electrode layer (56 – Figure 4A, ¶84).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Cain to improve the high frequency performance of the capacitor (¶5-6: Trinh).
In re claim 6, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the one or more dielectric regions is present between a first internal electrode layer or a last internal electrode layer in a set and an adjacent side surface.
Trinh discloses wherein the one or more dielectric regions (dielectric region including 72 – Figure 8D) is present between a first internal electrode layer or a last internal electrode layer (either 56, 132, 134, 156, 160 – Figure 8D, ¶82, ¶91) in a set and an adjacent side surface.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Cain to improve the high frequency performance of the capacitor (¶5-6: Trinh).
In re claim 7, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the one or more dielectric regions is present between a lateral edge of an internal electrode layer and an adjacent side surface.
Trinh discloses wherein the one or more dielectric regions (dielectric region including 72 – Figure 14D) is present between a lateral edge of an internal electrode layer (296 – Figure 14D, ¶98) and an adjacent side surface (See Figure 14D).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Cain to improve the high frequency performance of the capacitor (¶5-6: Trinh).
In re claim 8, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the one or more air voids comprises a via.
Trinh discloses wherein the one or more air voids (72 – Figure 4A) comprises a via (See Figure 4A, Figure 16A, Figure 16B).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Cain to improve the high frequency performance of the capacitor (¶5-6: Trinh).
In re claim 9, Cain in view of Trinh the multilayer coupling capacitor according to claim 8, as explained above. Cain does not disclose wherein the via extends through the thickness of the capacitor.
Trinh discloses wherein the via (72 – Figure 4A, Figure 16A, Figure 16B) extends through the thickness of the capacitor (Figure 4A, Figure 16A, Figure 16B).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Cain to improve the high frequency performance of the capacitor (¶5-6: Trinh).
In re claim 10, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the dielectric region is a region present between two external terminals.
Trinh discloses wherein the dielectric region (dielectric region including 72 – Figure 4A) is a region present between two external terminals (60, 62 – Figure 4A, ¶82).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the air voids of Cain to improve the high frequency performance of the capacitor (¶5-6: Trinh).
In re claim 11, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain does not disclose wherein the one or more air voids constitute from 1 vol% to 15 vol.% of the capacitor.
Trinh discloses adjusting the size of the air voids, and thus volume of the voids, is correlated to the capacitance of the device, electrical current movement, and the generation of an electrical field (¶83). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the volume of the air voids to create a desired balance between capacitance, electrical current movement, and electrical field generation, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
In re claim 12, Cain in view of Trinh the multilayer coupling capacitor according to claim 8, as explained above. Cain further discloses wherein the dielectric layers comprise a ceramic (¶41).
In re claim 13, Cain in view of Trinh the multilayer coupling capacitor according to claim 12, as explained above. Cain further discloses wherein the ceramic comprises a titanate (¶70).
In re claim 14, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein the internal electrode layers comprise a conductive metal (¶71).
In re claim 15, Cain in view of Trinh the multilayer coupling capacitor according to claim 14, as explained above. Cain further discloses wherein the conductive metal comprises nickel or an alloy thereof (¶71).
In re claim 16, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein the external terminals are electroplated layers (Claim 40).
In re claim 17, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein the external terminals are electroless plated layers (Claim 41).
In re claim 18, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses wherein the external terminals comprise a conductive metal (Claim 42).
In re claim 19, Cain in view of Trinh the multilayer coupling capacitor according to claim 18, as explained above. Cain further discloses wherein the conductive metal comprises silver, gold, palladium, platinum, tin, nickel, chrome, titanium, tungsten, or combinations or alloys thereof (Claim 43).
In re claim 20, Cain in view of Trinh the multilayer coupling capacitor according to claim 18, as explained above. Cain further discloses wherein the conductive metal comprises copper or an alloy thereof (Claim 44).
In re claim 21, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses a circuit board containing a coupling capacitor (Claim 46).
In re claim 22, Cain in view of Trinh the multilayer coupling capacitor according to claim 1, as explained above. Cain further discloses a communications device containing a coupling capacitor (Claim 47).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Prymak (US Patent 8,576,537) Figure 3, Figure 4, Figure 5
Bultitude (US Patent 10,410,794) Figure 3, Figure 4, Figure 5
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARUN RAMASWAMY whose telephone number is (571)270-1962. The examiner can normally be reached Monday - Friday, 9:00 am - 5:00 pm.
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/ARUN RAMASWAMY/ Primary Examiner, Art Unit 2848