Prosecution Insights
Last updated: October 02, 2026
Application No. 18/725,761

MULTILAYER CERAMIC CAPACITOR

Non-Final OA §102§103
Filed
Jun 29, 2024
Priority
Dec 29, 2021 — RE 10-2021-0190663 +2 more
Examiner
RAMASWAMY, ARUN
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Amotech Co., Ltd.
OA Round
3 (Non-Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
686 granted / 810 resolved
+16.7% vs TC avg
Moderate +12% lift
Without
With
+12.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
29 currently pending
Career history
842
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
60.0%
+20.0% vs TC avg
§102
29.3%
-10.7% vs TC avg
§112
5.9%
-34.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 810 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on September 8, 2026, has been entered. Response to Arguments Applicant's arguments filed September 8, 2026, have been fully considered but they are not persuasive. On pages 4-6 of Remarks, Applicant argues that the prior art fails to teach the amended limitations of claim 1. In particular, the Applicant argues that Jang et al. (US Publication 2019/0237252) fails to teach a hollow pipe-shaped electrode pole that comprises a metal layer that is formed on the inner surface of the electrode pole and a metal that fills the inside of the electrode pole. The Examiner respectfully disagrees with the above assertion. Jang discloses forming a trench (T1, T2 – Figure 4B) that is hollow in nature (¶58-59). Jang further discloses using an atomic layer deposition process to form the electrodes 120 (¶60-61). Such a process involves multiple iterations, and therefore, a metal layer is formed on the inner surface of the trench. The trench is further filled with metal until the electrode formation process is complete (Figure 4C, ¶61). Thus, Jang discloses the limitations of amended claim 1. Furthermore, the Applicant has not distinguished between the metal layer and the filling metal. As shown in the Instant Rejection, any portion of elements 121 and 122 that is adjacent to the walls of T1 and T2 can be considered a metal layer, and any portion within the metal layer can be considered a metal filling. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 and 3 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jang et al. (US Publication 2019/0237252). PNG media_image1.png 657 759 media_image1.png Greyscale Figure 2 of Jang with Examiner’s Comments (Figure 2EC) In re claim 1, Jang discloses a multilayer ceramic capacitor comprising: a ceramic body (110, 210 – Figure 2, Figure 3, ¶23) in which a plurality of dielectric layers (Figure 2, Figure 3; Note that the substrate can be divided into an arbitrary number of layers.) are stacked; a lower electrode (121, 122 on 110 – Figure 2, ¶23) formed on a lower surface of the ceramic body (Figure 2, Figure 3; Note that the Examiner is taking the top surface of 110 to be the ‘lower surface’.); and an electrode pole (121 in T1, 122 in T2 – Figure 2, ¶23) formed from the lower surface of the ceramic body (110 – Figure 2) toward an inner center of the ceramic body (Figure 2), wherein the lower electrode comprises a first lower electrode (121 – Figure 2) and a second lower electrode (122 – Figure 2) formed on both sides of the lower surface of the ceramic body (Figure 2), and wherein the electrode pole comprises: a first electrode pole (121 in T1 – Figure 2) formed on one side of the lower surface of the ceramic body (110 – Figure 2) and electrically connected to the first lower electrode (121 – Figure 2); and a second electrode pole (122 in T2 – Figure 2) formed on the other side of the lower surface of the ceramic body (110 – Figure 2) and electrically connected to the second lower electrode (122 – Figure 2), wherein the first electrode pole (121 in T1 – Figure 2) and the second electrode pole (122 in T2 – Figure 2) are disposed to be spaced apart from each other such that length directions thereof are parallel to a height direction of the ceramic body (Figure 2), and wherein no inner electrode is disposed inside the ceramic body (Figure 2), and the first electrode pole (121 in T1 – Figure 2) and the second electrode pole (122 in T2 – Figure 2) are configured to function as electrodes to form capacitance therebetween (¶31), wherein each of the first electrode pole and the second electrode pole has a hollow pipe shape (shape formed by T1 and T2, ¶59), wherein a metal layer (ML1, ML2 – Figure 2EC) is formed on an inner surface of each of the first electrode pole and the second electrode pole, and wherein an inside of each of the first electrode pole and the second electrode pole is filled with metal (MF1, MF2 – Figure 2EC). In re claim 3, Jang discloses the multilayer ceramic capacitor of claim 1, as explained above. Jang further discloses wherein the first electrode pole (121 in T1 – Figure 2) and the second electrode pole (122 in T2 – Figure 2) are formed to face each other at a location symmetrical to the lower surface of the ceramic body (top surface of 110 – Figure 2). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang et al. (US Publication 2019/0237252) in view of Fukudome et al. (US Publication 2008/0043400). In re claim 4, Jang discloses the multilayer ceramic capacitor of claim 1, as explained above. Jang further discloses the electrode poles (221 in 251, 222 in 252 – Figure 3, ¶52) can fully penetrate the ceramic substrate (210 – Figure 3, ¶51). Jang does not disclose wherein a diameter of a cross section that is vertical to the length direction of the electrode pole is reduced toward an inner center of the ceramic body. Fukudome discloses wherein a diameter of a cross section that is vertical to the length direction of the electrode pole (47 – Figure 2, Figure 5, ¶74) is reduced toward an inner center of the ceramic body (18 – Figure 2, ¶50, Abstract). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the tapered conductors to suppress the amount of ringing (¶94: Fukudome). Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang et al. (US Publication 2019/0237252) in view of Masuda et al. (US Publication 2009/0154054). In re claim 5, Jang discloses the multilayer ceramic capacitor of claim 3, as explained above. Jang does not disclose wherein a plurality of first electrode poles are disposed along a length direction of the first lower electrode, and wherein a plurality of second electrode poles are disposed along a length direction of the second lower electrode, and the second electrode poles maintain the same interval as the interval of the first electrode poles, respectively. Masuda discloses a plurality of first electrode poles (18 – Figure 1, ¶26) are disposed along a length direction of the first lower electrode (16 – Figure 1, ¶26), and wherein a plurality of second electrode poles (22 – Figure 1, ¶26) are disposed along a length direction of the second lower electrode (20 – Figure 1, ¶26), and the second electrode poles maintain the same interval as the interval of the first electrode poles, respectively (Figure 3; Note that the poles are evenly spaced.). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the plurality of electrode poles as described by Masuda to increase the capacitance of the device (¶26: Masuda). Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jang et al. (US Publication 2019/0237252). In re claim 7, Jang discloses the multilayer ceramic capacitor of claim 1, as explained above. Jang does not explicitly disclose the electrode pole is formed with a length that is equal to or smaller than a half of a height of the ceramic body. However, Jang discloses the depth of the trench, or electrode pole, is correlated to the capacitance of the device (¶31, ¶53, ¶67). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the length of the electrode pole to achieve a device having desired capacitance, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Shimabe et al. (US Publication 2015/0264815) [¶46] Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARUN RAMASWAMY whose telephone number is (571)270-1962. The examiner can normally be reached Monday - Friday, 9:00 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ARUN RAMASWAMY/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Jun 29, 2024
Application Filed
Jan 09, 2026
Non-Final Rejection mailed — §102, §103
Mar 27, 2026
Response Filed
Jun 17, 2026
Final Rejection mailed — §102, §103
Sep 08, 2026
Request for Continued Examination
Sep 09, 2026
Response after Non-Final Action
Sep 15, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12744163
CAPACITOR AND METHOD FOR MANUFACTURING SAME
1y 12m to grant Granted Sep 22, 2026
Patent 12738425
LAMINATE CAPACITOR AND SEMICONDUCTOR DEVICE
3y 4m to grant Granted Sep 15, 2026
Patent 12738419
MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME
2y 5m to grant Granted Sep 15, 2026
Patent 12738423
MULTI-LAYER CERAMIC ELECTRONIC COMPONENT
2y 5m to grant Granted Sep 15, 2026
Patent 12725739
MULTILAYERED CAPACITOR AND MANUFACTURING METHOD THEREOF
3y 0m to grant Granted Sep 01, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
97%
With Interview (+12.3%)
2y 6m (~3m remaining)
Median Time to Grant
High
PTA Risk
Based on 810 resolved cases by this examiner. Grant probability derived from career allowance rate.

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