DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6, 8, 14, 16, 17, and 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tomizawa et al. (US Publication 2019/0326061).
In re claim 1, Tomizawa discloses a multilayer ceramic capacitor comprising:
a ceramic body (11 – Figure 6, Figure 8, ¶59) in which a plurality of dielectric layers (¶65, Figure 8) are stacked (Figure 8);
a lower electrode (14b – Figure 6, Figure 8, ¶71) formed on a lower surface of the ceramic body (M1 – Figure 8, ¶71); and
a hollow groove (groove at entrance of 19 – Figure 6, Figure 8, ¶67) formed to be depressed from the lower surface of the ceramic body toward an inside of the ceramic body (11 – Figure 8).
In re claim 2, Tomizawa discloses the multilayer ceramic capacitor of claim 1, as explained above. Tomizawa further discloses further comprising an electrode pole (S – Figure 6, Figure 8, ¶98) formed in the hollow groove,
wherein the electrode pole includes:
a first electrode pole (S corresponding to 14b – Figure 6, Figure 8, Figure 9) formed on one side of the lower surface of the ceramic body (Figure 8); and
a second electrode pole (S corresponding to 15b – Figure 6, Figure 8, Figure 9, ¶72) formed on the other side of the lower surface of the ceramic body (11 – Figure 6, Figure 8), and
wherein the first electrode pole and the second electrode pole form an electrode (¶83).
In re claim 3, Tomizawa discloses the multilayer ceramic capacitor of claim 2, as explained above. Tomizawa further discloses wherein the lower electrode comprises a first lower electrode (14b – Figure 6, Figure 8) and a second lower electrode (15b – Figure 6, Figure 8) formed on both sides of the lower surface of the ceramic body (M1 – Figure 8), and
wherein the first electrode pole and the second electrode pole (S corresponding to 14b, S corresponding to 15b – Figure 6, Figure 8) are formed to face each other at a location symmetrical to the lower surface of the ceramic body (Figure 6, Figure 8, Figure 10).
In re claim 4, Tomizawa discloses the multilayer ceramic capacitor of claim 2, as explained above. Tomizawa further discloses wherein the electrode pole (S corresponding to 14b – Figure 6, Figure 8, Figure 9) is formed so that a length direction thereof is in parallel to a height direction of the ceramic body (‘Z’ direction – Figure 6, Figure 8, Figure 9),
and wherein a diameter of a cross section that is vertical to the length direction of the electrode pole (dimension in the ‘Y’ direction – Figure 9) is reduced toward an inner center of the ceramic body (11 – Figure 9).
In re claim 5, Tomizawa discloses the multilayer ceramic capacitor of claim 3, as explained above. Tomizawa further discloses wherein a plurality of first electrode poles (S corresponding to 19 – Figure 6, Figure 8, Figure 9, Figure 13, ¶67) are disposed along a length direction (‘X’ direction – Figure 13) of the first lower electrode (14b – Figure 6, Figure 8), and
wherein a plurality of second electrode poles (S corresponding to 20 – Figure 6, Figure 8, Figure 9, Figure 13, ¶67) are disposed along a length direction (‘X’ direction – Figure 13) of the second lower electrode (15b – Figure 6, Figure 8), and the second electrode poles maintain the same interval as the interval of the first electrode poles, respectively (See Figure 13, ¶114).
In re claim 6, Tomizawa discloses the multilayer ceramic capacitor of claim 2, as explained above. Tomizawa further discloses wherein the electrode pole (S corresponding to 19 – Figure 6, Figure 8, Figure 9) is provided with a metal layer (102 – Figure 9, ¶80) on a surface thereof (Figure 9).
In re claim 8, Tomizawa discloses the multilayer ceramic capacitor of claim 2, as explained above. Tomizawa further discloses a plurality of inner electrodes (12, 13 – Figure 6, Figure 8, ¶62) disposed to face each other inside the ceramic body (11 – Figure 8),
wherein the lower electrode (14b – Figure 8, Figure 9) includes a through-hole (19 in 14 – Figure 8, Figure 9) to penetrate the lower electrode in a height direction (‘Z’ direction – Figure 8, Figure 9), and wherein the ceramic body (11 – Figure 8, Figure 9) includes a hollow groove (19a – Figure 8, Figure 9, ¶70) formed inside the ceramic body to communicate with the through-hole (Figure 8, Figure 9).
In re claim 14, Tomizawa discloses the multilayer ceramic capacitor of claim 2, as explained above. Tomizawa further discloses wherein a plurality of through-holes are disposed at predetermined intervals along a length direction of the lower electrode (14b – Figure 5, Figure 6, Figure 8) (Figure 13), and wherein a plurality of hollow grooves (19a – Figure 5, Figure 6, Figure 8) are disposed to communicate with the through-holes (Figure 5, Figure 8) (¶115-116).
In re claim 16, Tomizawa discloses the multilayer ceramic capacitor of claim 8, as explained above. Tomizawa further discloses wherein a first metal layer is formed on an inner surface of the through-hole (any arbitrary metal portion on the side surface of the hole formed in 14b – Figure 6, Figure 8), and wherein a second metal layer (14a – Figure 6, Figure 8, ¶71) is formed on an inner surface of the hollow groove (19a – Figure 8).
In re claim 17, Tomizawa discloses the multilayer ceramic capacitor of claim 8, as explained above. Tomizawa further discloses wherein the lower electrode (14b – Figure 1, Figure 6, Figure 8) comprises a joining hole (any one of 19 penetrating 14b not in the center– Figure 1, Figure 5, Figure 6, Figure 8) formed to penetrate the lower electrode (14b – Figure 1, Figure 6) in a height direction (‘Z’ direction – Figure 1, Figure 5, Figure 6) and not to overlap the through-hole (center 19 penetrating 14b – Figure 1, Figure 5, Figure 6, Figure 8), and wherein the ceramic body includes a joining groove (any one of 19a not in the center – Figure 1, Figure 5, Figure 6) formed to be depressed on the lower surface of the ceramic body (M1 – Figure 1, Figure 5, Figure 6), to correspond to an outer periphery of the joining hole, and not to overlap the hollow groove (Figure 1, Figure 5, Figure 6; Note that any of the additional through-holes in the lower electrode can be considered the joining hole, and any of the additional through-holes in the ceramic body can be considered the joining groove.).
In re claim 19, Tomizawa discloses the multilayer ceramic capacitor of claim 8, as explained above. Tomizawa further discloses wherein the ceramic body comprises a via (any one of 14a, 15a that is not in the center – Figure 1, Figure 5, Figure 6) disposed to be spaced apart from the hollow groove (center 19a – Figure 1, Figure 5, Figure 6) on the lower surface of the ceramic body (M1 – Figure 1, Figure 5, Figure 6) and electrically connected to the lower electrode (electrically connected to 14b, 15b – Figure 1, Figure 5, Figure 6) , and wherein the via includes:
a first via (14a – Figure 1, Figure 5, Figure 6) electrically connected to a first lower electrode (14b – Figure 1, Figure 5, Figure 6); and
a second via (15a – Figure 1, Figure 5, Figure 6) electrically connected to a second lower electrode (15b – Figure 1, Figure 5, Figure 6).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 12 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tomizawa et al. (US Publication 2019/0326061).
In re claim 12, Tomizawa discloses the multilayer ceramic capacitor of claim 8, as explained above. Tomizawa does not explicitly disclose wherein the through-hole is formed with a diameter that is equal to or larger than two-thirds of a thickness of the lower electrode and equal to or smaller than a thickness of the lower electrode. However, it is well-known in the art that adjusting the contact area and thickness of an electrode is correlated to the ESR characteristics of the device. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the diameter of the through-hole and thickness of the lower electrode to achieve a device having desired ESR characteristics, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
In re claim 13, Tomizawa discloses the multilayer ceramic capacitor of claim 8, as explained above. Tomizawa does not explicitly disclose wherein the hollow groove is formed with a diameter that is equal to or larger than two-thirds of a thickness of the lower electrode and equal to or smaller than a thickness of the lower electrode. However, it is well-known in the art that adjusting the contact area and thickness of the electrode layer is correlated to the ESR characteristics of the device. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the hollow groove, and thus the through-hole area, and the thickness of the electrode layer to achieve a device having desired ESR characteristics, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Claim(s) 7, 9-11, and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tomizawa et al. (US Publication 2019/0326061) in view of Chong et al. (US Publication 2018/0130603).
In re claim 7, Tomizawa discloses the multilayer ceramic capacitor of claim 2, as explained above. Tomizawa further disclose the electrode pole (S corresponding to 19 – Figure 6C) is formed with a length (Figure 6C).
Tomizawa does not disclose wherein the electrode pole is formed with a length that is equal to or smaller than a half of a height of the ceramic body.
Chong discloses a plurality of electrode poles (141, 143 – Figure 2, ¶35, ¶37) in which an electrode poleis (143 – Figure 2) formed with a length that is equal to or smaller than a half of a height of the ceramic body (111, 112, 113 – Figure 2, ¶26, ¶28).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the multiple electrode pole structure as described by Chong to achieve a device having desired capacitance and lower ESL (¶57 – Chong).
In re claim 9, Tomizawa discloses the multilayer ceramic capacitor of claim 8, as explained above. Tomizawa further discloses wherein the lower electrode (14b, 15b – Figure 6, Figure 8) comprises a first lower electrode (14b – Figure 6, Figure 8) and a second lower electrode (15b – Figure 8) formed on both sides of the lower surface of the ceramic body (11 – Figure 8), and wherein the through-hole includes:
a first through-hole (19 in 14 – Figure 8) formed on the first lower electrode (14b – Figure 8); and
a second through-hole (20 in 15 – Figure 8, ¶83) formed on the second lower electrode (15b – Figure 8), and wherein the hollow groove includes:
a first hollow groove (19a – Figure 8) formed to correspond to the first through-hole (19 in 14 – Figure 8); and
a second hollow groove (20a – Figure 8, ¶84) formed to correspond to the second through-hole (20 in 15 – Figure 8)
Tomizawa does not disclose and the first hollow groove and the second hollow groove have different lengths.
Chong discloses multiple hollow grooves (through-holes corresponding to 141, 142, 143, 144 – Figure 2, ¶35-36), including a hollow groove (through-hole corresponding to 141 – Figure 2, ¶24) corresponding to a first lower electrode (121 – Figure 2, ¶35) and a hollow groove (through-hole corresponding to 145 – Figure 2) corresponding to a second lower electrode (122 – Figure 2, ¶25), wherein the first and second hollow grooves have different lengths (Figure 2).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the multiple electrode pole structure as described by Chong to achieve a device having desired capacitance and lower ESL (¶57 – Chong).
In re claim 10, Tomizawa in view of Chong discloses the multilayer ceramic capacitor of claim 9, as explained above. Tomizawa further discloses wherein the inner electrode comprises:
a first inner electrode (12 – Figure 8, ¶62) connected to the first hollow groove (19a – Figure 8); and
a second inner electrode (13 – Figure 8, ¶62) connected to the second hollow groove (20a – Figure 8), and wherein the first inner electrode is disposed to be biased toward one side surface of an inside of the ceramic body (left surface of 11 – Figure 8), and wherein the second inner electrode (13 – Figure 8) is disposed to be biased toward the other side surface of the inside of the ceramic body (right surface of 11 – Figure 8).
In re claim 11, Tomizawa in view of Chong discloses the multilayer ceramic capacitor of claim 10, as explained above. Tomizawa further discloses wherein the first inner electrode (12 – Figure 8) and the second inner electrode (13 – Figure 8) form an overlap area (Figure 8, Figure 12).
In re claim 15, Tomizawa discloses the multilayer ceramic capacitor of claim 8, as explained above. Tomizawa does not disclose wherein the hollow groove is formed with a length that is equal to or larger than one-fifth and equal to or smaller than one-third of a height of the ceramic body.
Chong discloses multiple hollow grooves (through-holes corresponding to 141, 142, 143, 144 – Figure 2, ¶35-36), including a hollow groove (through-hole corresponding to 141 – Figure 2, ¶24) corresponding to a first lower electrode (121 – Figure 2, ¶35) and a hollow groove (through-hole corresponding to 145 – Figure 2) corresponding to a second lower electrode (122 – Figure 2, ¶25). Chong further discloses adjusting the length of the hollow grooves, and thus the via conductors is correlated to the length of the current flow path, and thus ESL of the device (¶58). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the multiple hollow grooves with a desired length to achieve a device having desired ESL, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tomizawa et al. (US Publication 2019/0326061) in view of Tomaoki et al. (JPS6216142A).
In re claim 18, Tomizawa discloses the multilayer ceramic capacitor of claim 8, as explained above. Tomizawa does not disclose wherein the ceramic body comprises a discharge port formed to penetrate a side surface of the ceramic body and the hollow groove.
Tomaoki discloses the ceramic body (1 – Figure 1, Figure 4, Example ¶1-2, Summary of Invention) comprises a discharge port (2 – Figure 4, Example ¶3) formed to penetrate a side surface of the ceramic body and spanning the width of the component body (Figure 3, Figure 4) (Example ¶12).
The combination of Tomizawa and Tomaoki discloses a discharge port penetrating the hollow groove.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the porous dummy layer as described by Tomaoki to promote uniform oxidation during a firing step of the component (Example ¶9-10: Tomaoki).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lee et al. (US Patent 11,227,722) Figure 2
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARUN RAMASWAMY whose telephone number is (571)270-1962. The examiner can normally be reached Monday - Friday, 9:00 am - 5:00 pm.
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/ARUN RAMASWAMY/ Primary Examiner, Art Unit 2848