DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Email Communication
Applicant is encouraged to authorize the Examiner to communicate with applicant via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502.03, 502.05.
Election/Restrictions
Claim(s) 12-18 is/are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 02 March 2026.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4 & 7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tachibana (US 2018/0182536).
In regards to claim 1, Tachibana ‘536 discloses
A multilayer ceramic capacitor comprising:
a ceramic body (10 – fig. 3; [0045]) in which a plurality of dielectric layers (11 – fig. 2A; [0045]) are laminated;
a recessed part (16 – fig. 3; [0077]) formed to be depressed at a corner where a side surface of the ceramic body and a lower surface of the ceramic body come in contact with each other; and
a lower electrode (31 & 32 – fig. 3; [0078]) formed on the lower surface of the ceramic body.
In regards to claim 2, Tachibana ‘536 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part is formed to be depressed so that one side surface thereof is open (seen in fig. 3).
In regards to claim 3, Tachibana ‘536 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part is formed to be depressed so that a lower surface and one side surface thereof are open (fig. 3).
In regards to claim 4, Tachibana ‘536 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part is provided with a continuous curved surface that is formed to be depressed (fig. 3).
In regards to claim 7, Tachibana ‘536 discloses
The multilayer ceramic capacitor of claim 1, wherein the ceramic body comprises an inner electrode (23 – fig. 2B & 3; [0050]) disposed inside the ceramic body, and wherein the inner electrode includes a first inner electrode spaced apart from the side surface of the ceramic body and having both ends that overlap the lower electrode (fig. 3).
Claim(s) 1-8 & 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ahiko et al. (US 2002/0070442).
In regards to claim 1, Ahiko ‘442 discloses
A multilayer ceramic capacitor comprising:
a ceramic body (1 – fig. 14; [0096]) in which a plurality of dielectric layers are laminated ([0045]);
a recessed part (75 and/or 85 – fig. 13-16; [0121]) formed to be depressed at a corner where a side surface of the ceramic body and a lower surface of the ceramic body come in contact with each other; and
a lower electrode (portion of 44 on lower surface and/or portion of 55 on lower surface – fig. 13-16; [0096]) formed on the lower surface of the ceramic body.
In regards to claim 2, Ahiko ‘442 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part is formed to be depressed so that one side surface thereof is open (fig. 13-16).
In regards to claim 3, Ahiko ‘442 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part is formed to be depressed so that a lower surface and one side surface thereof are open (fig. 13-16).
In regards to claim 4, Ahiko ‘442 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part is provided with a continuous curved surface that is formed to be depressed (fig. 13-16).
In regards to claim 5, Ahiko ‘442 discloses
The multilayer ceramic capacitor of claim 3, wherein the lower electrode is formed in a shape that opens the lower surface of the recessed part (fig. 13-16).
In regards to claim 6, Ahiko ‘442 discloses
The multilayer ceramic capacitor of claim 5, wherein the lower electrode is formed to be depressed at a location that corresponds to the lower surface of the recessed part (fig. 13-16).
In regards to claim 7, Ahiko ‘442 discloses
The multilayer ceramic capacitor of claim 1, wherein the ceramic body comprises an inner electrode (3 – fig. 16; [0100]) disposed inside the ceramic body, and wherein the inner electrode includes a first inner electrode (3 – fig. 16; [0100]) spaced apart from the side surface of the ceramic body and having both ends that overlap the lower electrode.
In regards to claim 8, Ahiko ‘442 discloses
The multilayer ceramic capacitor of claim 7, wherein the inner electrode comprises a second inner electrode (2 – fig. 15; [0100]) disposed to be spaced apart from the first inner electrode and exposed to the recessed part.
In regards to claim 11, Ahiko ‘442 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part comprises a metal layer (443 and/or 553 – fig. 13-16; [0121]) formed on a surface of the recessed part and electrically connected to the lower electrode.
Claim(s) 1-3 & 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kang et al. (US 2020/0350115).
In regards to claim 1, Kang ‘115 discloses
A multilayer ceramic capacitor comprising:
a ceramic body (110 – fig. 1; [0034]) in which a plurality of dielectric layers are laminated ([0034]);
a recessed part (R1 and/or R2 – fig. 2; [0036]) formed to be depressed at a corner where a side surface of the ceramic body and a lower surface of the ceramic body come in contact with each other; and
a lower electrode (portion of 121 on lower surface and/or portion of 122 on lower surface – fig. 2; [0037]) formed on the lower surface of the ceramic body.
In regards to claim 2, Kang ‘115 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part is formed to be depressed so that one side surface thereof is open (fig. 1-4).
In regards to claim 3, Kang ‘115 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part is formed to be depressed so that a lower surface and one side surface thereof are open (fig. 1-4).
In regards to claim 11, Kang ‘115 discloses
The multilayer ceramic capacitor of claim 1, wherein the recessed part comprises a metal layer (portion of 121 and/or 122 formed in recess – fig. 4; [0040]) formed on a surface of the recessed part and electrically connected to the lower electrode.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang ‘115 in view of Tsutsumi et al. (US 2020/0066449).
In regards to claim 9,
Kang ‘115 fails to disclose wherein the ceramic body comprises a dummy electrode disposed inside the ceramic body and exposed to both side surfaces of the ceramic body.
Tsutsumi ‘449 discloses wherein the ceramic body (10 – fig. 1; [0026]) comprises a dummy electrode (11a and/or 11b – fig. 1; [0027]) disposed inside the ceramic body and exposed to both side surfaces of the ceramic body (fig. 1).
It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to from dummy electrodes as taught by Tsutsumi ‘449 in the ceramic body of Kang ‘115 so as to be exposed to surfaces parallel with the lower surface to obtain a device wherein a thin-film formed external electrode can be formed with good adhesion to the ceramic body.
In regards to claim 10,
Kang ‘115 as modified by Tsutsumi ‘449 further discloses wherein the dummy electrode is disposed inside the ceramic body and exposed through an upper surface of the recessed part (fig. 1 of Kang ‘115 and fig. 1 of Tsutsumi ‘449 – note the combination will have a dummy electrode formed at the lower surface of the body and at the upper surface of the recess to improved adhesion of plating layer formed thereon as an external electrode).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2018/0019064 – fig. 1 & 7-8 JP2001244136A – fig. 1-4
US 2018/0332715 – fig. 1 US 8,716,741 – fig. 2
JP2002280253A – fig. 1 JP06163305A – fig. 2
Communication
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID M SINCLAIR whose telephone number is (571)270-5068. The examiner can normally be reached M-TH from 8AM-4PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/David M Sinclair/Primary Examiner, Art Unit 2848