Prosecution Insights
Last updated: April 19, 2026
Application No. 18/725,861

BATTERY ABNORMALITY DETECTION SYSTEM, BATTERY ABNORMALITY DETECTION METHOD, AND BATTERY ABNORMALITY DETECTION PROGRAM

Non-Final OA §102§103
Filed
Jul 01, 2024
Examiner
LE, SON T
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Panasonic Intellectual Property Management Co., Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
97%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
544 granted / 662 resolved
+14.2% vs TC avg
Moderate +15% lift
Without
With
+14.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
16 currently pending
Career history
678
Total Applications
across all art units

Statute-Specific Performance

§101
4.9%
-35.1% vs TC avg
§103
48.6%
+8.6% vs TC avg
§102
27.3%
-12.7% vs TC avg
§112
13.5%
-26.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 662 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. JP2022-002945, filed on 1/12/22. Information Disclosure Statement The information disclosure statement (IDS) submitted on 9/10/24 and 5/28/25. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: a data acquirer in claim 1, dV/dQ estimator in claims 1-3, determiner in claims 1-4 and slope calculator in claim 4. According to the specification and drawings, the data acquirer as any well-known voltage sensing device and current voltage sensing device; the dV/dQ estimator as any well-known CPU, processor, controller; the determiner as any well-known CPU, processor, controller and the slope calculator as any well-known CPU, processor, controller. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3 and 5-7 is/are rejected under 35 U.S.C. 102(a1) as being anticipated by Tsujiko et al (US 20110012604, provided by applicant, hereinafter Tsujiko). Regarding to claim 1, Tsujiko discloses a battery abnormality detection system comprising: a data acquirer acquiring voltage data (fig. 2 shows voltage detection [50]) and current data (fig. 2 shows current detection [50]) of each of a plurality of cells in a battery pack including the plurality of cells connected in series (fig. 2 shows battery 10 with plurality cells 100 connected in series, paragraph 0098 discloses the voltage detector 40 detects battery voltage V (terminal voltage) of each secondary battery 100 constituting the assembled battery 10), or voltage data and current data of each of a plurality of parallel cell blocks connected in series in a battery pack including the plurality of parallel cell blocks each including a plurality of cells connected in parallel; a dV/dQ estimator estimating dV/dQ indicating a differential value of a voltage with respect to a capacity of each of the cells (paragraph 0098 discloses battery controller 30 further calculates a dV/dQ value that is a ratio of a change amount dV of the battery voltage V of each secondary battery 100 with respect to a change amount dQ of the storage amount Q of the same secondary battery 100 when the storage amount Q varies) or each of the parallel cell blocks, based on the voltage data and the current data of the each of the cells or the each of the parallel cell blocks; and a determiner determining whether or not a micro-short circuit has occurred in the battery pack based on a change in variation of characteristic points of dV/dQ between the plurality of cells or the plurality of parallel cell blocks (claim 10 discloses based on the dV/dQ value, whether or not the secondary battery has reached the state corresponding to the characteristic point appearing in the Q-dV/dQ curve, the abnormality detecting means includes micro-short circuit detecting means for detecting a micro-short circuit of the secondary battery). Regarding to claim 2, Tsujiko discloses the battery abnormality detection system according to claim 1, wherein: the dV/dQ estimator estimates dV/dQ of the cells (controller 30 to determine dV/dQ of cells 100) or the parallel cell blocks for a constant-current charging period of the battery pack (paragraph 0154 discloses the cells charged with a current value of 1/5C); the battery abnormality detection system further comprises a charged electricity quantity calculator calculating, at every constant-current charging period (paragraph 0139 discloses each value of the storage amounts QA1 to QA5 is divided by a theoretical electric capacity of the secondary batteries 100 and converted into a SOC value (%). A maximum value, a minimum value, and an average value of them are shown in a graph of FIG. 12), a charged electricity quantity for a period from a first appearing peak to a last appearing peak of a plurality of peaks of dV/dQ of the plurality of cells or the plurality of parallel cell blocks (fig, 13-14 shows charged electricity quantity for a period from a first appearing peak to a last appearing peak of a plurality of peaks of dV/dQ); and the determiner determines whether or not a micro-short circuit has occurred in the battery pack based on a change in the charged electricity quantity (paragraph 160 and claim 10 discloses based on the dV/dQ value, whether or not the secondary battery has reached the state corresponding to the characteristic point appearing in the Q-dV/dQ curve, the abnormality detecting means includes micro-short circuit detecting means for detecting a micro-short circuit of the secondary battery). Regarding to claim 3, Tsujiko discloses the battery abnormality detection system according to claim 1, wherein: the dV/dQ estimator estimates dV/dQ of the cells (controller 30 to determine dV/dQ of cells 100) or the parallel cell blocks for a constant-current charging period interval of the battery pack; the battery abnormality detection system further comprises a charged electricity quantity calculator calculating, at every constant-current charging period, a charged electricity quantity for a period from a mean value or a median value of a plurality of peaks of dV/dQ of the plurality of cells or the plurality of parallel cell blocks to a last appearing peak of the plurality of peaks of dV/dQ (paragraph 0139 discloses each value of the storage amounts QA1 to QA5 is divided by a theoretical electric capacity of the secondary batteries 100 and converted into a SOC value (%). A maximum value, a minimum value, and an average value of them are shown in a graph of FIG. 12); and the determiner determines whether or not a micro-short circuit has occurred in the battery pack based on a change in the charged electricity quantity (fig, 13-14 shows charged electricity quantity for a period from a first appearing peak to a last appearing peak of a plurality of peaks of dV/dQ). Regarding to claim 5, Tsujiko discloses the battery abnormality detection system according to claim 1, wherein each of the cells is a lithium-ion iron phosphate battery (paragraph 0010 discloses a lithium ion secondary battery). Regarding to claim 6, Tsujiko discloses a battery abnormality detection method (fig. 10) comprising: acquiring voltage data and current data (fig. 10[S2]) of each of a plurality of cells in a battery pack including the plurality of cells connected in series (fig. 2 shows battery 10 with plurality cells 100 connected in series, paragraph 0098 discloses the voltage detector 40 detects battery voltage V (terminal voltage) of each secondary battery 100 constituting the assembled battery 10), or voltage data and current data of each of a plurality of parallel cell blocks connected in series in a battery pack including the plurality of parallel cell blocks each including a plurality of cells connected in parallel; estimating dV/dQ indicating a differential value of a voltage with respect to a capacity of each of the cells or each of the parallel cell blocks (fig. 10[S3-S6]), based on the voltage data and the current data of the each of the cells or the each of the parallel cell blocks; and determining whether or not a micro-short circuit has occurred in the battery pack based on a change in variation of characteristic points of dV/dQ between the plurality of cells or the plurality of parallel cell blocks (claim 10 discloses based on the dV/dQ value, whether or not the secondary battery has reached the state corresponding to the characteristic point appearing in the Q-dV/dQ curve, the abnormality detecting means includes micro-short circuit detecting means for detecting a micro-short circuit of the secondary battery). Regarding to claim 7, Tsujiko discloses a non-transitory machine-readable recording medium that stores a battery abnormality detection program causing a computer (fig. 2 shows ROM 31 CPU 32 and RAM 33) to execute: a process of acquiring voltage data and current data (fig. 10[S2]) of each of a plurality of cells in a battery pack including the plurality of cells connected in series (fig. 2 shows battery 10 with plurality cells 100 connected in series, paragraph 0098 discloses the voltage detector 40 detects battery voltage V (terminal voltage) of each secondary battery 100 constituting the assembled battery 10), or voltage data and current data of each of a plurality of parallel cell blocks connected in series in a battery pack including the plurality of parallel cell blocks each including a plurality of cells connected in parallel; a process of estimating dV/dQ indicating a differential value of a voltage with respect to a capacity of each of the cells or each of the parallel cell blocks, based on the voltage data and the current data of the each of the cells or the each of the parallel cell blocks (paragraph 0098 discloses battery controller 30 further calculates a dV/dQ value that is a ratio of a change amount dV of the battery voltage V of each secondary battery 100 with respect to a change amount dQ of the storage amount Q of the same secondary battery 100 when the storage amount Q varies); and a process of determining whether or not a micro-short circuit has occurred in the battery pack based on a change in variation of characteristic points of dV/dQ between the plurality of cells or the plurality of parallel cell blocks (claim 10 discloses based on the dV/dQ value, whether or not the secondary battery has reached the state corresponding to the characteristic point appearing in the Q-dV/dQ curve, the abnormality detecting means includes micro-short circuit detecting means for detecting a micro-short circuit of the secondary battery). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsujiko as applied to claim 2 above, and further in view of LV et al. (CN 109663756 hereinafter LV). Regarding to claim 4, Tsujiko discloses the battery abnormality detection system according to claim 2, further comprising: Paragraph 0037 Tsujiko discloses the deterioration detecting means includes resistance increase detecting means for detecting an increase in internal resistance of the secondary battery, the resistance increase detecting means compares a reference difference value of the secondary battery in an initial state, the reference difference value being a difference value of the battery voltage V between the two characteristic points in the V-dV/dQ curve and being stored in advance in the secondary battery system with an actual difference value that is a difference value of the battery voltage V between the two characteristic points in the V-dV/dQ curve determined by the determining means, and determines that the internal resistance of the secondary battery has been increased when the actual difference value is larger than the reference difference value. However, Tsujiko does not disclose a slope calculator calculating a slope of a regression line obtained by linearly regressing a plurality of charged electricity quantities calculated for the every constant-current charging period; and wherein the determiner determines that a micro-short circuit has occurred in one of the cells or one of the parallel cell blocks showing the last appearing peak of dV/dQ when the slope of the regression line is greater than or equal to a predetermined value. LV discloses the obtained voltage, capacity data column into the ADS software, to capacity is the y-axis voltage is x-axis, then performing a analysis-mathematics-differentiate operation to generate a new column is the dQ/dV. finally in the dQ/dV is the y-axis voltage is x-axis mapping to obtain the differential coefficient difference curve (dQ/dV-V curve) can also be produced by Excel software differential difference curve, the voltage and capacity data column into the Excel software, executes the SLOPE function computed by capacity is the y-axis, the voltage is the x-axis of the linear regression fitted line slope value, the slope is a y-axis is x axis plotting the voltage to obtain the differential difference curve (dQ/dV-V curve). Therefore, at the time before the effective filing date, it would be obvious to a POSITA to use slope calculator calculating a slope of a regression line obtained by linearly regressing a plurality of charged electricity quantities to determine the abnormality of the battery as a matter of data manipulation since Tsujiko includes the structure and method to acquire the information to determine micro-short of battery cells. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SON T LE whose telephone number is (571)270-5818. The examiner can normally be reached M to F, 7AM - 4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eman Alkafawi can be reached at (571)272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SON T LE/ Primary Examiner, Art Unit 2863
Read full office action

Prosecution Timeline

Jul 01, 2024
Application Filed
Feb 13, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
97%
With Interview (+14.6%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 662 resolved cases by this examiner. Grant probability derived from career allow rate.

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