Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5, 19, 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yamaguchi et al. (USPN 2002/0057407).
With regard to claim 1,
Yamaguchi et al. disclose an array substrate, comprising: a first base substrate (14); an insulating layer group (18) arranged at a side of the first base substrate, wherein a surface of the insulating layer group away from the first base substrate is provided with a first protruding portion (corresponding to 17a); and a reflective layer group (19) arranged at a side of the insulating layer group away from the first base substrate, wherein the reflective layer group comprises a plurality of reflective portions (19), a first gap (corresponding to dotted lines, fig. 6B), is provided between two adjacent reflective portions (left, right 19), and the first protruding portion is arranged in the first gap (See fig. 6B).
With regard to claim 2,
Yamaguchi et al. disclose the array substrate according to claim 1, wherein a width of the first gap is less than or equal to a width of the first protruding portion, and a part of the first protruding portion extends to a side of the reflective portions close to the first base substrate (see fig. 6B).
With regard to claim 3,
Yamaguchi et al. disclose the array substrate according to claim 1, wherein the first protruding portion comprises: a plurality of first protruding strips (horizontal 17a, fig. 4) extending along a first direction; a plurality of second protruding strips (vertical 17a, fig. 4) extending along a second direction, wherein the plurality of first protruding strips are connected with the plurality of second protruding strips to form a plurality of grids; wherein first gap comprises: a plurality of first sub-gaps extending along the first direction, wherein the first protruding strips are arranged in the first sub-gaps; and a plurality of second sub-gaps extending along the second direction, wherein the second protruding strips are arranged in the second sub-gaps, and the plurality of first sub-gaps are connected with the plurality of second sub-gaps to form a plurality of grids (see figs. 4, 6B and paragraph 59, gaps correspond to protruding strips 17a); wherein the first direction and the second direction are parallel to a surface of the first base substrate close to the insulating layer group, and the first direction intersects the second direction (see figs. 4, 6B).
With regard to claim 5,
Yamaguchi et al. disclose the array substrate according to claim 3, further comprising: a switch layer group (15) arranged between the first base substrate and the insulating layer group, wherein the switch layer group comprises a plurality of switch units (15), a second gap is provided between two adjacent switch units, and an orthographic projection of the first protruding portion on the first base substrate is located within an orthographic projection of the second gap on the first base substrate (See fig. 3).
With regard to claim 19,
Yamaguchi et al. disclose the array substrate according to claim 1, wherein a height of a surface of the first protruding portion away from the first base substrate in a third direction is higher than a height of a surface of the reflective layer group away from the first base substrate in the third direction, and the third direction is perpendicular to a surface of the first base substrate close to the insulating layer group (see paragraph 84).
With regard to claim 20,
Yamaguchi et al. disclose the array substrate according to claim 1, wherein a plurality of second protruding portions (of 18, corresponding to 17b) are provided at a surface of the insulating layer group away from the first base substrate, a plurality of third protruding portions (of 19, corresponding to 17b) are provided at a surface of the reflective layer group away from the first base substrate, and orthographic projections of the second protruding portions on the first base substrate are located within orthographic projections of the third protruding portions on the first base substrate (See fig. 5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 6, 7, 18, 22, 25 are rejected under 35 U.S.C. 103 as being unpatentable over Yamaguchi et al. (as above).
With regard to claim 6,
Yamaguchi et al. disclose the array substrate according to claim 5, wherein the switch layer group further comprises: a plurality of data lines (16) extending along the second direction (vertical), wherein one of the data lines is correspondingly located between two adjacent switch units (See fig. 3), and orthographic projections of the second protruding strips (17a on the first base substrate overlap with orthographic projections of the data lines on the first base substrate (See figs. 3,4). While Yamaguchi et al. do not explicitly disclose a plurality of gate lines, the provision of gate lines between adjacent switch units and adjacent pixel units, perpendicular to the data lines (i.e. horizontal) was well known to and widely used by those of ordinary skill in the art at the time of the invention to address the switching units and would have been obvious to the same to incorporate into the substrate of Yamaguchi et al. in order to utilize switching elements 15, the incorporation of which resulting in orthographic projections of the first protruding strips (horizontal 17a) on the first base substrate overlap with orthographic projections of the gate lines (analogous to 16) on the first base substrate, as analogous to data lines 16 and vertical protrusions 17a).
With regard to claim 7,
Yamaguchi et al. disclose the array substrate according to claim 6, wherein the protruding strips have a width in the second direction greater than or equal to that of the lines (see fig. 6B). The obviousness of the incorporation of gate lines was addressed in the rejection of claim 6.
With regard to claim 18,
Yamaguchi et al. disclose the array substrate according to claim 1. While Yamaguchi et al. do not disclose the claimed reflective structure, an ITO/Ag/ITO reflective electrode was well known to and widely used by those of ordinary skill in the art at the time of the invention and would have been obvious to the same to incorporate into the substrate of Yamaguchi et al. in order to suit conductivity/reflectivity needs.
With regard to claim 22,
Yamaguchi et al. disclose the array substrate according to claim 20. While Yamaguchi et al. do not explicitly disclose a multilayer structure for insulating layer 18, such a structure was well known to and widely used by those of ordinary skill in the art at the time of the invention and would have been obvious to the same to incorporate into the substrate of Yamaguchi et al. in order to provide appropriate interaction with adjacent layers, the incorporation of which resulting in respective protruding portions for each layer in order to achieve the protrusion structure directed by Yamaguchi et al.
With regard to claim 25,
Yamaguchi et al. disclose a display panel, comprising: an array substrate, comprising: a first base substrate (14); an insulating layer group (18) arranged at a side of the first base substrate, wherein a surface of the insulating layer group away from the first base substrate is provided with a first protruding portion (corresponding to 17a); and a reflective layer group (19) arranged at a side of the insulating layer group away from the first base substrate, wherein the reflective layer group comprises a plurality of reflective portions (19), a first gap (between 19) is provided between two adjacent reflective portions (See fig. 3), and the first protruding portion is arranged in the first gap (See fig. 3); a color filter substrate (20) arranged at a side of the array substrate close to the reflective layer group; and a liquid crystal layer (3) arranged between the array substrate and the color filter substrate. While Yamaguchi et al. do not explicitly disclose a sealant frame between the substrates containing the liquid crystal layer, such a frame was well known to and widely used by those of ordinary skill in the art at the time of the invention and would have been obvious to the same to incorporate into the display of Yamaguchi et al. in order to protect and contain the liquid crystal layer.
Allowable Subject Matter
Claims 4, 8, 10-14,16,21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art does not disclose nor render obvious, in combination with the other limitations of the claims, a substrate where the width of the first and second parts differing nor the third and fourth parts differing, the claimed arrangement of the gate lines and sub-electrodes; nor the heights of the first and second protruding portions to be equal. Claims 4, 8, 21 would therefore be allowable if rewritten in independent form. Claims 10-14, 16 would be allowable due to their dependence upon the allowable subject matter of claim 8.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. USPN 2025/0013110, 2014/0036193, 5741821, 6765637.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher Raabe whose telephone number is (571)272-8434. The examiner can normally be reached M-F 0530-1430.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James R Greece can be reached at (571)272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHRISTOPHER M RAABE/Primary Examiner, Art Unit 2875