Prosecution Insights
Last updated: April 19, 2026
Application No. 18/728,931

CURRENT DISTURBANCE DETECTION SYSTEM

Non-Final OA §102§103§112
Filed
Jul 15, 2024
Examiner
SREEVATSA, SREEYA
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Signify Holding B V
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
88%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
219 granted / 255 resolved
+17.9% vs TC avg
Minimal +2% lift
Without
With
+2.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
39 currently pending
Career history
294
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
47.6%
+7.6% vs TC avg
§102
35.3%
-4.7% vs TC avg
§112
14.5%
-25.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 255 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-15 are pending in this application. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) were submitted on 07/15/2024 and 12/17/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification The disclosure is objected to because of the following informalities: Page 8, “L9 since” should be –L8 since--. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 lines 4-5 recites “adapted to connect to a load for providing the received power to the load”. It is unclear if “a load” of line 4, is different from “a load” of line 2. Referring to figs.1 and 3, it appears that they are the same load. For the purposes of examination, the above limitation is interpreted as -- adapted to connect to the load for providing the received power--. Claims 2-15 are rejected for the same reasons as stated above for claim 1. Regarding claim 4, the phrase "optionally" renders the claim indefinite because it is unclear whether the limitation(s) following the phrase are part of the claimed invention. See MPEP § 2173.05(d). Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-3, 5-6 and 8-9 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Mirafzal (US 20080080106 A1). Regarding claim 1, Mirafzal teaches a driving circuit (e.g. circuit comprising integrated DC link inductor and current sensor winding 12, fig.1) for providing power generated by a converter (e.g. power source 14 and rectifier 16, fig.1) to a load (e.g. load 20, fig.1), the driving circuit comprising: an input (e.g. inputs to 32 and 34, fig.1) adapted to receive power from the converter ([0020], inductors 32 and 34 may be coupled to the rectifier 16); output terminals (e.g. outputs from 32 and 34, fig.1) adapted to connect to the load for providing the received power (e.g. outputs are connected to load 20 via inverter 18, fig.1); a fault detection inductor (i.e. inductor 34, fig.1) electrically connected in series with the output terminals so that a current flow through the output terminals and the load passes through the fault detection inductor (e.g. current i.sub.Y, fig.1), such that a fault across the output terminals causes a change in the current flow through the fault detection inductor ([0029], A common mode current may occur during a ground fault, as some current i.sub.X flowing into the load 20 leaks to ground rather than flowing back out of the load as i.sub.Y); a first current sensing inductor (i.e. inductor 32, fig.1) through which a current provided by the converter passes ([0029], rectifier 16 rectifies and combines the currents on the three phase paths 26, 28, 30 to produce a DC current i.sub.X on current path 38); a feedback inductor (i.e. current sensor winding 36, fig.1) galvanically isolated from and magnetically coupled to the fault detection inductor ([0020], shares a magnetic core with the inductors 32 and 34) and configured to modify an electrical parameter through the feedback inductor responsive to the change in the current flow through the fault detection inductor ([0020], sensing a change in the difference between i.sub.X and i.sub.Y, may be performed by the current sensor winding 36), and also galvanically isolated from and magnetically coupled to the first current sensing inductor ([0020], shares a magnetic core with the inductors 32 and 34) and is configured to modify an electrical signal through the feedback inductor responsive to the current flow through the first current sensing inductor via the electrical signal ([0020], sensing a change in the difference between i.sub.X and i.sub.Y, may be performed by the current sensor winding 36); a detector (i.e. resistor R.sub.L, fig.1) configured to detect the modification in the electrical parameter through the feedback inductor and generate a fault feedback signal responsive to the detected modified electrical parameter ([0036], inner winding 36 (N.sub.2) and R.sub.L are selected such that N.sub.2i.sub.Z-N.sub.1|i.sub.X-i.sub.Y| is small); and a current sensing circuit (e.g. circuit comprising rectifier 48 and resistor R.sub.L, fig.1) to sense current flowing through the first current sensing inductor via the electrical signal ([0020], sensing a change in the difference between i.sub.X and i.sub.Y, may be performed by the current sensor winding 36) ([0036], current sensor winding 36 is loaded by the resistor R.sub.L through rectifier 48). Regarding claim 2, Mirafzal teaches the driving circuit of claim 1, further comprising an output capacitor (i.e. capacitor C, fig.1) connected in parallel with the output terminals (e.g. C is connected to outputs of 32 and 34, fig.1) and adapted to smooth the received power from the converter ([0030], capacitor C to form a low-pass filter, thereby potentially suppressing ripples or other rapid changes in the currents), wherein the fault detection inductor is electrically connected between the output capacitor and the output terminals (e.g. 34 is connected between output of 32 and C, fig.1). Regarding claim 3, Mirafzal teaches the driving circuit of claim 1, further comprising: a rectifier arrangement (e.g. rectifier 16, fig.1) configured to rectify power provided by the converter ([0018], power source 14 to the rectifier 16) and provide the rectified power to the output terminals ([0020], inductors 32 and 34 may be coupled to the rectifier 16), wherein the rectifier arrangement comprises a first rectifying path (e.g. current path 38, fig.1); and the first current sensing inductor is positioned in the first rectifying path(e.g. 32 is in the path of 38, fig.1); wherein the current sensing circuit further comprises a filter ([0024], a low pass filter to smooth output currents) configured to generate a filtered signal (e.g. current i.sub.Z after passing through rectifier 48, fig.1), being a filtered version of the current flow through the feedback inductor relating to the current flow through the first current sensing inductor (i.e. current i.sub.Z, fig.1) and in which a current component induced by the fault detection inductor is filtered or attenuated ([0030], outputting a current i.sub.Z indicative of a change in the difference between i.sub.X and i.sub.Y). Regarding claim 5, Mirafzal teaches the driving circuit of any of claim 1, wherein the fault comprises any one of: a short circuit ([0041], a short in a motor terminal). Regarding claim 6, Mirafzal teaches the driving circuit of claim 1, further comprising a signal processing circuit (i.e. controller 24, fig.1) configured to process the fault feedback signal to determine the presence or absence of the fault ([0026], controller 24 may be configured to terminate the delivery of power to the load 20 in response to on a signal indicative of a ground fault). Regarding claim 8, Mirafzal teaches the driving circuit of claim 1, wherein the detector comprises a resistive element (i.e. resistor R.sub.L, fig.1) connected between a positive terminal of the feedback inductor (e.g. output 56 is connected to output 52 which is positive side of 36, fig.1) and a ground or reference voltage (e.g. output 58, fig.1). Regarding claim 9, Mirafzal teaches a driving arrangement (e.g. exemplary AC drive system, fig.1) comprising: the driving circuit according to claim 1 (see rejection of claim 1 above); and the converter configured to provide power to the driving circuit ([0018], power source 14 may … the power source 14 to the rectifier 16). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Mirafzal (US 20080080106 A1), and further in view of Pelly (US 6636107 B2). Regarding claim 10, Mirafzal teaches the driving arrangement of claim 9. Mirafzal does not teach, wherein the converter is an isolated converter with a primary side winding and a secondary side winding galvanically isolated from and magnetically coupled to the primary side winding, wherein the driving circuit is connected to the secondary side winding. Pelly teaches in a similar field of endeavor of motor drive circuit, a converter (e.g. input windings 45 and 46 and rectifier 40, fig.4) is an isolated converter with a primary side winding and a secondary side winding (i.e. input windings 45 and 46, fig.4) galvanically isolated from and magnetically coupled to the primary side winding (column 2 lines 50-52, The winding polarities are designated by the conventional dot symbols), wherein the driving circuit is connected to the secondary side winding (e.g. output of 40 is connected to windings 45 and 46, fig.1). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the converter is an isolated converter with a primary side winding and a secondary side winding galvanically isolated from and magnetically coupled to the primary side winding, wherein the driving circuit is connected to the secondary side winding in Mirafzal, as taught by Pelly, as it provides the advantage of high current gain. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Mirafzal (US 20080080106 A1), and further in view of Cardu (US 20180131287 A1). Regarding claim 11, Mirafzal teaches the driving arrangement of claim 9. Mirafzal does not teach, wherein the converter comprises an LLC and/or an LCC converting arrangement. Cardu teaches in a similar field of endeavor of converts, a converter comprises an LLC ([0046], based upon LLC converters). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the converter comprises an LLC and/or an LCC converting arrangement in Mirafzal, as taught by Cardu, as it provides the advantage of lower EMI or switching losses. Allowable Subject Matter Claims 4, 7 and 12-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 4, Mirafzal (US 20080080106 A1) teaches the driving circuit of claim 3, wherein the filter may be any one of an averaging circuit; and a frequency selecting circuit ([0024], a low pass filter to smooth output currents); the rectifier arrangement comprises a second rectifying path (e.g. current path 40, fig.1). Mirafzal does not teach, the driving circuit further comprising: a second current sensing inductor positioned in the second rectifying path; the feedback inductor is galvanically isolated from and magnetically coupled to the second current sensing inductor and is configured to modify the electrical signal through the feedback inductor responsive to the current flow through the second current sensing inductor via the electrical signal, and the current sensing circuit is also adapted to sense the current flowing through the second current sensing inductor via the electrical signal, optionally the current sensing circuit comprises a rectifying circuit coupled between the feedback inductor and the filter. Prior art Brier (US 6898092 B2), Pelly (US 6636107 B2), Winterhalter (US 20110153234 A1) and Hachisuka (US 20040012381 A1) have been found to be the closest prior art. However, none of the prior art, taken singly or in combination, teach “the driving circuit further comprising: a second current sensing inductor positioned in the second rectifying path; the feedback inductor is galvanically isolated from and magnetically coupled to the second current sensing inductor and is configured to modify the electrical signal through the feedback inductor responsive to the current flow through the second current sensing inductor via the electrical signal, and the current sensing circuit is also adapted to sense the current flowing through the second current sensing inductor via the electrical signal, optionally the current sensing circuit comprises a rectifying circuit coupled between the feedback inductor and the filter.” Regarding claim 7, Mirafzal (US 20080080106 A1) teaches the driving circuit of claim 6. Mirafzal does not teach, wherein the feedback inductor is configured to modify the electrical parameter responsive to a current flow through the fault detection inductor greater than 150% of a rated normal output current of the driving circuit. Prior art Brier (US 6898092 B2), Pelly (US 6636107 B2), Winterhalter (US 20110153234 A1) and Hachisuka (US 20040012381 A1) have been found to be the closest prior art. However, none of the prior art, taken singly or in combination, teach “wherein the feedback inductor is configured to modify the electrical parameter responsive to a current flow through the fault detection inductor greater than 150% of a rated normal output current of the driving circuit.” Regarding claim 12, Mirafzal (US 20080080106 A1) teaches the driving arrangement of claim 9, wherein the converter comprises a controller (i.e. controller 24, fig.1). Mirafzal does not teach, the controller electrically connected to the primary side winding and the feedback winding, and configured to control the power provided to the driving circuit via the second winding responsive to at least the fault feedback signal. Prior art Brier (US 6898092 B2), Pelly (US 6636107 B2), Winterhalter (US 20110153234 A1) and Hachisuka (US 20040012381 A1) have been found to be the closest prior art. However, none of the prior art, taken singly or in combination, teach “controller electrically connected to the primary side winding and the feedback winding, and configured to control the power provided to the driving circuit via the second winding responsive to at least the fault feedback signal.” Claims 13-15 are indicated as allowable, as they depend on allowable claim 12. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SREEYA SREEVATSA whose telephone number is (571)272-8304. The examiner can normally be reached M-F 8am-5pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V Tran can be reached at (571) 270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SREEYA SREEVATSA/Primary Examiner, Art Unit 2838 02/27/2026
Read full office action

Prosecution Timeline

Jul 15, 2024
Application Filed
Feb 27, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
88%
With Interview (+2.5%)
2y 9m
Median Time to Grant
Low
PTA Risk
Based on 255 resolved cases by this examiner. Grant probability derived from career allow rate.

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