DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined
under the first inventor to file provisions of the AIA .
Claims 1-10 and 12-21 are pending and have been examined.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Notes: when present, hyphen separated fields within the hyphens (- -) represent, for example, as (30A - Fig 2B - [0128]) = (element 30A - Figure No. 2B - Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The same conventions apply to Column and Sentence, for example (19:14-20) = (column19:sentences 14-20). These conventions are used throughout this document.
Claims 1, 4, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao et al. (US 20230420625 A1 – hereinafter Zhao) in view of Koga et al. (US 20230261164 A1 – hereinafter Koga).
Regarding independent claim 1, Zhao teaches
(Original) A transparent display panel (000 – Fig. 24 – [0054] – “the
display panel 000”) comprising:
a substrate (10 – Fig. 24 – [0055] – “a substrate 10”);
a plurality of repeating units (20 – Fig. 24 – [0054] – “plurality of pad groups
20”) arranged in an array on the substrate (10), wherein a repeating unit (20) comprises a non-transmissive region (pad group 20 are next to the transmissive region and are interpreted to correspond to a non-transmissive region, hereinafter ‘NTA’) and a plurality of transmissive regions (TA – Fig. 24 – [0106] – “plurality of light-transmitting regions TA”), adjacent transmissive regions (TA) are spaced apart by the non-transmissive region (NTA – Fig. 24 shows this);
a transmissive region (TA) comprises a hollowed-out region (Fig. 25 annotated, see below – [0107] – “holes 02K in the plurality of light-transmitting regions TA” – hereinafter ‘HOR’) and a transition region (Fig. 25 annotated, see below – hereinafter ‘TR’ – this corresponds to the transition region), wherein the transition region (TR) is located between the non-transmissive region (NTA) and the hollowed-out region (HOR), and at least one insulation layer (02 – Fig. 25 – [0107] – “at least one insulating layer 02”) in the hollowed-out region (HOR) is provided in a hollowed-out structure (Fig. 25 annotated, see below – hereinafter ‘HOS’, Fig. 25 annotated, shows this); and
the non-transmissive region (NTA) comprises at least one pixel unit and N sets of first traces extending in a first direction and M sets of second traces extending in a second direction electrically connected to the at least one pixel unit, the first direction and the second direction intersect, and both N and M are positive integers.
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Zhao does not expressly disclose the other limitations of claim 1.
However, in an analogous art, Koga teaches
the non-transmissive region comprises at least one pixel unit (20 – Fig. 3 – [0086] – “a light-emitting part 20” – this corresponds to a pixel unit) and N sets of first traces (43 – Fig. 3 – [0112] – “row data line 43”) extending in a first direction (x – Fig. 3 – [0113] – “the row data line 43 is extended in the x-axis direction”) and M sets of second traces (40 – Fig. 3 – [0068] – “the wiring 40 extended in the y-axis direction”) extending in a second direction (y – Fig. 3 – [0068] – “the y-axis direction”) electrically connected to the at least one pixel unit (20), the first direction (x) and the second direction (y) intersect, and both N and M are positive integers (it is obvious that the traces of Koga are complete, this is interpreted as consisting of a positive integer number of traces).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the pixel unit and trace structure as taught by Koga into Zhao.
An ordinary artisan would have been motivated to use the known technique of Koga in the manner set forth above to produce the predictable results of [0028] – “a transparent electronic device with superior yield can be provided.”
Regarding claim 4, Zhao, as modified by Koga, teaches claim 1 from which claim 4 depends. Zhao further teaches
(Original) The transparent display panel according to claim 1,
wherein the transparent display panel (000) comprises at least one conductive layer (60 – Fig. 20 – [0087] – “third metal layer 60”) and at least one insulation layer (02) disposed on the substrate (10), and one or more insulation layers (02) located in the hollowed-out region (HOR) are provided in hollowed-out structure (HOS).
Regarding claim 21, Zhao, as modified by Koga, teaches claim 1 from which claim 21 depends. Zhao further teaches
(Currently amended) A display apparatus (111 – Fig. 42 – [0157] –
“display device 111 may include a display panel 000”), comprising the transparent
display panel (000) according to claim 1.
Claims 2 and 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Koga and Liu et al. (US 20230307426 A1 – hereinafter Liu).
Regarding claim 2, Zhao, as modified by Koga, teaches claim 1 from which claim 2 depends. Zhao further teaches
(Original) The transparent display panel according to claim 1,
wherein the transition region (TR) has a size of 0 microns to 10 microns in a direction from the non-transmissive region (NTA) to an adjacent hollowed-out region (HOR).
Zhao and Koga do not expressly disclose the other limitations of claim 2.
However, in an analogous art, Liu teaches
a size of 0 microns to 10 microns (801 – Fig. 28 – [0152] – “size d2 of the second gap 801 may be 0.5 μm≤d2≤15 μm. In this manner, it is possible to ensure that the light-shielding structure 400 has a sufficiently large light-shielding capability at the second gap 801, and that the light-shielding structure 400 does not occupy a large size of the light-transmissive hole region 80” – this is interpreted as a transition region).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the transition region structure as taught by Liu into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Liu in the manner set forth above to produce the predictable results of [0152] – “In this manner, it is possible to ensure that the light-shielding structure 400 has a sufficiently large light-shielding capability at the second gap 801, and that the light-shielding structure 400 does not occupy a large size of the light-transmissive hole region 80”.
Regarding claim 5, Zhao, as modified by Koga, teaches claim 4 from which claim 5 depends. Zhao and Koga do not expressly disclose the other limitations of claim 5.
However, in an analogous art, Liu teaches
(Original) The transparent display panel according to claim 4, further
comprising a semiconductor layer (101 – Fig. 2 – [0056] – “semiconductor layer 101”) disposed on the substrate (100 – Fig. 2- [0056] – “substrate 100”), the conductive layer (Fig. 2 – [0063] – “multiple conductive layers (102, 103, 104, and 105) located on one side of the substrate 100”) comprises a first conductive layer (102 – Fig. 2 – [0063] – “multiple conductive layers (102, 103, 104, and 105) to a fourth conductive layer (105 – Fig. 2 – [0063] – “multiple conductive layers (102, 103, 104, and 105), and the at least one insulation layer (111 – Fig. 2 – [0063] – “insulation layers (111, 112, 113, 114, and 115)”) comprises a first insulation layer (111) to a seventh insulation layer (it is be design choice to designate 7 layers instead of 5 with two layers broken into two layers instead of one layer);
in a direction perpendicular ([0057] – “In the direction perpendicular to the plane in which the substrate 100 is located,” – hereinafter ‘Z’) to the substrate (100), the first conductive layer (102) to the fourth conductive layer (105) are sequentially arranged on a side of the semiconductor layer (101) away from the substrate (100), the first insulation layer (111) is located between the semiconductor layer (101) and the first conductive layer (102), a second insulation layer (112 – Fig. 2 – [0063] – “insulation layers (111, 112, 113, 114, and 115)”) is located between the first conductive layer (102) and a second conductive layer (103 – Fig. 2 – [0063] – “multiple conductive layers (102, 103, 104, and 105), a third insulation layer (114 – Fig. 2 – [0063] – “insulation layers (111, 112, 113, 114, and 115)”) is located between the second conductive layer (103) and a third conductive layer (104 – Fig. 2 – [0063] – “multiple conductive layers (102, 103, 104, and 105), a fourth insulation layer (115 – Fig. 2 – [0063] – “insulation layers (111, 112, 113, 114, and 115)”) and a fifth insulation layer (it is be design choice to designate 7 layers instead of 5 with two layers broken into two layers instead of one layer) are located between the third conductive layer (104) and the fourth conductive layer (105 – Fig. 2 – [0063] – “multiple conductive layers (102, 103, 104, and 105), and a sixth insulation layer (it is be design choice to designate 7 layers instead of 5 with two layers broken into two layers instead of one layer) and the seventh insulation layer (400 – Fig. 2 – [0061] – “light-shielding structure 400 may include a black photoresist material.” – this is interpreted as an insulating layer) are sequentially arranged on a side of the fourth conductive layer (104) away from the substrate (100); and
at least one of the first insulation layer (111) to the seventh insulation layer (400) located in the hollowed-out region (80 – Fig. 28 – [0144] – “light-transmissive hole region 80”) is provided in a hollowed-out structure (81 – Fig. 28 – [0144] – “light-transmissive holes 81” – Fig. 28 shows this).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the conducting and insulation layer structure as taught by Liu into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Liu in the manner set forth above to produce the predictable results of [0063] – “The metal material generally has a reflective effect. In the embodiments of the present invention, the light-shielding structure 400 is disposed at least between the thin-film transistor 201 and the light-emitting element 300. Thus, the light-shielding structure 400 can block at least part of the light from reaching corresponding conductive layers, thereby reducing reflection of the light by the structure in the conductive layers. Moreover, the case in which the display contrast of the display panel 10 is affected by the presence of more reflected light is improved, thereby effectively improving the display brightness and the display contrast of the display panel.”
Regarding claim 6, Zhao, as modified by Koga and Liu, teaches claim 5 from which claim 6 depends. Zhao and Koga do not expressly disclose the other limitations of claim 6.
However, in an analogous art, Liu teaches
(Original) The transparent display panel according to claim 5, wherein a
buffer layer (110 – Fig. 4 – [0064] – “in an optional embodiment, as shown in FIG. 4, the display panel 10 may also include a buffer layer 110 located between the substrate 100 and the semiconductor layer”) is further provided between the substrate (100) and the semiconductor layer (101) in the direction perpendicular (Z) to the substrate (100), and the buffer layer (110) located in the hollowed-out region may be provided in a hollowed-out structure (Liu doesn’t show this but it would equate to Fig. 28).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the conducting and insulation layer structure as taught by Liu into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Liu in the manner set forth above to produce the predictable results of [0064] – “The buffer layer 110 may include a stacked structure of an inorganic layer and an organic layer to block oxygen and moisture and prevent diffusion of moisture or impurities through the substrate.”
Regarding claim 7, Zhao, as modified by Koga and Liu, teaches claim 5 from which claim 7 depends. Zhao further teaches
(Currently amended) The transparent display panel according to
claim 5 (TR) is
b
a
E
0
e
i
(
k
r
-
φ
1
-
φ
2
)
, a transmittance of hollowed-out region (HOR) is
E
0
e
i
k
r
, a value of k is
2
π
/
λ
, λ is a wave length of light wave, r is a size of the insulation layer located in the transition region (TR) in the direction perpendicular (Z – [0061] – “the direction Z perpendicular to the plane of the substrate 10”) to the substrate (100),
E
0
is an amplitude of light wave,
φ
1
is an optical delay of the transition region (TR),
φ
2
is the optical delay of the hollowed-out region (HOR), a is a first transmittance reference value, and b is a second transmittance reference value (this is the equation for a complex electromagnetic wave with a scaling factor containing Euler’s formula, it applies to electromagnetic waves traveling through a medium thus it applies to the prior related art).
Regarding claim 8, Zhao, as modified by Koga and Liu, teaches claim 7 from which claim 8 depends. Zhao further teaches
(Original) The transparent display panel according to claim 7,
wherein the optical delay
φ
1
of the transition region (TR) is a product of a size and a refractive index of a film layer (01 – Fig. 20 – [0087] – “driving circuit layer 01”) located in the transition region (TR) in the direction perpendicular (Z) to the substrate (100).
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Koga, Liu, Kim et al. (US 20210193765 A1 – hereinafter Kim), and Park et al. (US 11963403 B2 – hereinafter Park).
Regarding claim 9, Zhao, as modified by Koga and Liu, teaches claim 8 from which claim 9 depends. Zhao further teaches
(Currently amended) The transparent display panel according to
claim 8, wherein a refractive index of the transition region (TR) has a value range of 1.2 to 1.6, a value of r of the transition region (TR) has a value range of 3 microns to 7 microns, and a wavelength of light has a value range of 500 nanometers to 560 nanometers; or
wherein a refractive index of the hollowed-out region (HOR) is 1 and a value of r of the hollowed-out region (HOR) is 0 micron (the hollowed-out region of Zhao does not contain any insulating layers, as Fig. 25 shows therefore the value of r is 0 and making the refractive index 1 because there isn’t a change in wavelength occurring due to the region).
Zhao does not expressly disclose the other limitations of claim 9.
However, in an analogous art, Koga teaches
a wavelength of light has a value range of 500 nanometers to 560 nanometers (22 – Fig. – [0091] – “each light-emitting part 20 includes a red-colored LED element 21, a green-colored LED element 22, and a blue-colored LED element 23” – green light corresponds to the limiting wavelength).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the green light wavelength structure as taught by Koga into Zhao.
An ordinary artisan would have been motivated to use the known technique of Koga in the manner set forth above to produce the predictable results of a display device transmitting green light.
To do so would have merely been to apply a known technique to a known device ready for improvement to yield predictable results, KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007), MPEP 2143 I. D.
Zhao, Koga, and Liu do not expressly disclose the other limitations of claim 9.
However, in an analogous art, Kim teaches
wherein a refractive index of the transition region has a value range of 1.2 to 1.6 (ILD1 and ILD2 – Fig. 6 – [0076] – “the first inter-layer insulating layer ILD1 and the second inter-layer insulating layer ILD2 may be made of an inorganic layer such as a silicon oxide (SiOx) layer having a refractive index of 1.4 to 1.5” – these layers are in a transition area between the transmission area TA and the emission area EA2 that is shown but not labeled on Fig. 6).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the refractive structure as taught by Kim into Zhao, Koga, and Liu.
An ordinary artisan would have been motivated to use the known technique of Kim in the manner set forth above to produce the predictable results [0006] – “the transparent display device having a high light transmittance in the transmissive area and also ensuring a maximum light emission area in the non-transmissive area.”
Zhao, Koga, Liu, and Kim do not expressly disclose the other limitations of claim 9.
However, in an analogous art, Park teaches
a value of r of the transition region has a value range of 3 microns to 7 microns ([5:20-24] – “The thickness of the first insulating layer 181 may be within a range of 2 μm to 4 μm. The thickness of the second insulating layer 182 may be within a range of 2 μm to 4 μm. Therefore, the thickness of the insulating layer 180 may be within a range of 4 μm to 8 μm” – this describes the value of r as being the thickness of the insulating layers).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the insulation thickness structure as taught by Park into Zhao, Koga, Liu, and Kim.
An ordinary artisan would have been motivated to use the known technique of Park in the manner set forth above to produce the predictable results [5:25-30] – “If the thickness of the insulating layer formed through the coating is increased, it may be difficult to uniformly coat the insulating layer. Therefore, it is difficult to form the insulating layer over a predetermined thickness. Generally, the thickness of the insulating layer as a single layer is about 3 μm.”
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Koga, Liu, and Kitabayashi (US 20220238060 A1).
Regarding claim 12, Zhao, as modified by Koga and Liu, teaches claim 7 from which claim 12 depends. Zhao, Koga, and Liu do not expressly disclose the limitations of claim 12.
However, in an analogous art, Kitabayashi teaches
(Original) The transparent display panel according to claim 7, wherein a
transmittance of the non-transmissive region is 0 ([0279] – “The transmittance of the transmissive region v161 is 100%. The transmittance of the non-transmissive region v162 is 0%”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the transmittance structure as taught by Kitabayashi into Zhao, Koga, and Liu.
An ordinary artisan would have been motivated to use the known technique of Kitabayashi in the manner set forth above to produce the predictable results [0003] – “to thereby simulate the brightness of the projection image.”
Claims 13-17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Koga and Lee et al. (US 20240260381 A1 – hereinafter Lee).
Regarding claim 13, Zhao, as modified by Koga, teaches claim 1 from which claim 13 depends. Zhao does not expressly disclose the limitations of claim 13.
However, in an analogous art, Koga teaches
at least one set of first traces (43).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the trace structure as taught by Koga into Zhao.
An ordinary artisan would have been motivated to use the known technique of Koga in the manner set forth above to produce the predictable results as stated above in claim 1.
Zhao and Koga do not expressly disclose the other limitations of claim 13.
However, in an analogous art, Lee teaches
(Original) The transparent display panel according to claim 1, wherein at
least one set of first traces comprises: a plurality of first signal lines (SL2 – Fig. 3 – [0047] – “second signal line SL2”); at least one set of second traces (SL1 – Fig. 3 – [0047] – “first signal line SL1”) comprises a plurality of third signal lines (TL – Fig. 3 – [0058] – “touch lines TL”)”) and at least one fourth signal line (SDL – Fig. 3 – [0095] – “shielding layer SDL” – this is interpreted as a signal line wince it also supplies power), an orthographic projection of the at least one fourth signal line (SDL) on the substrate (111 – [0080] – “substrate 111”) covers ([0188] – “first shielding layer SDL1 can be provided over two first touch lines TL”) an orthographic projection of at least two third signal lines (TL) on the substrate (111 – Fig. 3 shows this).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the trace structure as taught by Lee into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable results of correcting issues as [005] – “light transmittance can be reduced and impaired due to the plurality of touch sensors and the plurality of touch lines. In addition, in the transparent display device, electrodes for image display, a plurality of driving lines, a plurality of touch sensors for touch, and a plurality of touch lines can be disposed in a narrow area can affect each other with noise, interference and parasitic capacitance, which can impair image quality and reduce touch sensing accuracy.”
Regarding claim 14, Zhao, as modified by Koga, and Lee, teaches claim 13 from which claim 14 depends. Zhao and Koga do not expressly disclose the limitations of claim 14.
However, in an analogous art, Lee teaches
(Original) The transparent display panel according to claim 13, wherein a
size of the at least one fourth signal line (SDL) in the first direction (X – Fig. 3 – [0042] – “a second direction (e.g., X-axis direction)”) is larger than ([0188] – “first shielding layer SDL1 can be provided over two first touch lines TL” – this is interpreted as larger than due to covering) a size of the at least two third signal lines (TL) in the first direction (X).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the trace structure as taught by Lee into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable results as stated above in claim 13.
Regarding claim 15, Zhao, as modified by Koga, and Lee, teaches claim 13 from which claim 15 depends. Zhao and Koga do not expressly disclose the limitations of claim 15.
However, in an analogous art, Lee teaches
(Original) The transparent display panel according to claim 13, wherein N
and M are both 1, a set of first traces (SL2) comprises a plurality of first signal lines (TBL1 – Fig. 3 – [0124] – “first touch bridge line TBL1”), and a set of second traces (SL1) comprises a plurality of third signal lines (TL) and at least one fourth signal line (SDL); the at least one fourth signal line (SDL) comprises a first power supply line (VDDL – Fig. 3 – [0051] – “pixel power line VDDL”) and a second power supply line (VSSL – Fig. 3 – [0051] – “common power line VSSL”); an orthographic projection of at least one of the first power supply line (VDDL) and the second power supply line (VSSL) on the substrate (111) covers an orthographic projection of the plurality of third signal lines (TL) on the substrate (111 – Fig. 3 shows this).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the trace structure as taught by Lee into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable results as stated above in claim 13.
Regarding claim 16, Zhao, as modified by Koga, and Lee, teaches claim 13 from which claim 16 depends. Zhao and Koga do not expressly disclose the limitations of claim 16.
However, in an analogous art, Lee teaches
(Original) The transparent display panel according to claim 13, wherein N is
1 and M is 2, a set of first traces (SL2) comprises a plurality of first signal lines (TBL1), two sets of second traces (SL1) comprise a plurality of third signal lines (TL) and at least two fourth signal lines (SDL1 and SDL2 – Fig. 3 – [0098] – “shielding layer SDL can include a first shielding layer SDL1 and a second shielding layer SDL2”), and one set of second traces (SL1) comprises some of the third signal lines (TL) and at least one of the fourth signal lines (SDL); the at least two fourth signal lines (VDDL) comprise a first power supply line (VDDL) and a second power supply line (VSSL); an orthographic projection of at least one of the first power supply line (VDDL) and the second power supply line (VSSL) on the substrate (111) covers an orthographic projection of the plurality of third signal lines (TL) on the substrate (111).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the trace structure as taught by Lee into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable results as stated above in claim 13.
Regarding claim 17, Zhao, as modified by Koga, and Lee, teaches claim 13 from which claim 17 depends. Zhao and Koga do not expressly disclose the limitations of claim 17.
However, in an analogous art, Lee teaches
(Original) The transparent display panel according to claim 16, wherein the
at least one pixel unit (P – [0061] – “pixel P”) comprises: a plurality of sub-pixels emitting light of different colors (SP1, SP2, SP3, SP4 – [0048] – “pixels P, as shown in FIG. 2, can include at least one of a first subpixel SP1, a second subpixel SP2, a third subpixel SP3 and a fourth subpixel SP4. The first subpixel SP1 can include a first light emission area EA1 emitting light of a first color. The second subpixel SP2 can include a second light emission area EA2 emitting light of a second color. The third subpixel SP3 can include a third light emission area EA3 emitting light of a third color. The fourth subpixel SP4 can include a fourth light emission area EA4 emitting light of a fourth color”), a plurality of sub-pixels (SP1, SP2, SP3, SP4) in a same pixel unit (P) are located at two sides of one of the fourth signal lines (SDL) in the first direction (lee (X), and at least some of the sub-pixels (SP1, SP2, SP3, SP4) are located between two fourth signal lines (SDL1 and SDL2 – Fig. 3 shows this, it is interpreted that circuit areas CA1-4 are aligned with sub-pixels SP1-4, Fig. 4 supports this as it shows the sub-pixel if over the circuit area).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the pixel structure as taught by Lee into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable results as stated above in claim 13.
Regarding claim 19, Zhao, as modified by Koga, and Lee, teaches claim 15 from which claim 19 depends. Zhao and Lee do not expressly disclose the limitations of claim 19.
However, in an analogous art, Koga teaches
(Currently amended) The transparent display panel according to
claim 15, wherein the plurality of third signal lines (44 – Fig. – [0162] – “column data line 44”) comprises at least a plurality of data lines electrically connected to the at least one pixel unit (30 – Fig. – [0088] – “each pixel PIX includes the light-emitting part 20 and the IC chip 30”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the pixel structure as taught by Koga into Zhao and Lee.
An ordinary artisan would have been motivated to use the known technique of Koga in the manner set forth above to produce the predictable results of [0091] – “In this manner, since each light-emitting part 20 has the LED elements 21 to 23 which emit light in the colors of red, green, and blue being the three primary colors of light, the transparent display device according to the present embodiment can display a full-color image.”
Regarding claim 19, Zhao, as modified by Koga, and Lee, teaches claim 15 from which claim 19 depends. Zhao and Lee do not expressly disclose the limitations of claim 19.
However, in an analogous art, Koga teaches
(Currently amended) The transparent display panel according to
wherein the at least one pixel unit (20 – Fig. 3 – [0091] – “each light-emitting
part 20 includes a red-colored LED element 21, a green-colored LED element 22, and a blue-colored LED element 23. The LED elements 21 to 23 correspond to sub-pixels which constitute a single pixel”) comprises a plurality of sub-pixels, and the transmissive region comprises a spacing region between the plurality
of sub-pixels and between the sub-pixels and the first trace or the second trace in a same pixel unit (Fig. 3 shows this).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the pixel structure as taught by Koga into Zhao and Lee.
An ordinary artisan would have been motivated to use the known technique of Koga in the manner set forth above to produce the predictable results as stated above in claim 19.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Zhao in view of Koga, Lee, and Hong et al. (US 20220165836 A1 – hererinafter Hong).
Regarding claim 18, Zhao, as modified by Koga, and Lee, teaches claim 15 from which claim 18 depends. Zhao and Koga do not expressly disclose the limitations of claim 18.
However, in an analogous art, Lee teaches
(Currently amended) The transparent display panel according to claim 15
(SL1 – Fig. 4 – [0039] – “first signal line portions SL1”) of the set of first traces comprise a scan line (SSL1 – [0050] – “first signal line portion SL1 may include first and second sensing scan lines SSL1 and SSL2”), a light emitting control line ([0051] – “when the first signal line portion SL1 includes first and second sensing scan lines SSL1 and SSL2, an initialization line, and a light emission control line, the first signal line portion SL1 may refer to a signal line group including first and second sensing scan lines SSL1 and SSL2, an initialization line, and a light emission control line”), a first power connection line (VCL – [0054] – “power connection line VCL”), and a second power connection line, the first power connection line is electrically connected to the first power supply line, and the second power connection line is electrically connected to the second power supply line ([0054] – “the cathode electrode can be electrically connected to the common power line VSSL through the power connection line VCL and the cathode contact electrode CCT” – it is interpreted there is a second power connection line connecting VSSL to the anode – [0152] – “anode electrode 120 can be connected to the source electrode SE of the driving transistor DTR, and the cathode electrode CE can be connected to the common power line VSSL”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the line structure as taught by Lee into Zhao and Koga.
An ordinary artisan would have been motivated to use the known technique of Lee in the manner set forth above to produce the predictable results as stated above in claim 13.
Zhao, Koga, and Lee do not expressly disclose the limitations of claim 18.
However, in an analogous art, Hong teaches
(Currently amended) The transparent display panel according to claim 15
(SL1 – Fig. 4 – [0039] – “first signal line portions SL1”) of the set of first traces comprise a scan line (SSL1 – [0050] – “first signal line portion SL1 may include first and second sensing scan lines SSL1 and SSL2”), a light emitting control line ([0051] – “when the first signal line portion SL1 includes first and second sensing scan lines SSL1 and SSL2, an initialization line, and a light emission control line, the first signal line portion SL1 may refer to a signal line group including first and second sensing scan lines SSL1 and SSL2, an initialization line, and a light emission control line”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the pixel structure as taught by Hong into Zhao, Koga, and Lee.
An ordinary artisan would have been motivated to use the known technique of Hong in the manner set forth above to produce the predictable results of [0006] – “a transparent display device that may improve transmittance and at the same time embody high resolution.”
Pertinent Art
For the benefits of the Applicant, CN 111653591 A is cited on the record as being pertinent to significant disclosure through some but not all claimed features of the defined invention. These references fail to disclose the combination of limitations including the transition area.
Conclusion
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/GRA/
Examiner, Art Unit 2897
/CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
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