DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Email Communication
Applicant is encouraged to authorize the Examiner to communicate with applicant via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502.03, 502.05.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-10, 12-16, & 18 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Cho (US 2022/0139626).
In regards to claim 1, Cho ‘626 discloses
A ceramic capacitor comprising:
a ceramic body (110 – fig. 1; [0050] & [0054]) formed in a hexahedron shape (fig. 1; [0051]), including a plurality of dielectric layers (111 – fig. 3; [0050]) and at least a pair of internal electrodes (121 & 1211 – fig. 3; [0059]) disposed to face each other with the dielectric layers interposed therebetween, and including both end surfaces from which the internal electrodes are exposed (fig. 3), a lower surface that is a mount surface ([0053]) mounted on a substrate (210 – fig. 9; [0119]), an upper surface facing the lower surface, and a front surface and a rear surface connecting the upper surface and the lower surface together and facing each other (fig. 1; [0052]); and
external electrodes (130 & 140 – fig. 1 & 3; [0049]) disposed on the both end surfaces of the ceramic body so as to be electrically connected to the internal electrodes,
wherein the external electrode includes:
a metal layer (131 & 141 – fig. 3 & 7; [0075]) formed throughout the end surfaces of the ceramic body so as to be connected to the internal electrode; and
a conductive resin layer (132 & 142 – fig. 3 & 7-8; [0112-0114]) formed at both-side corners of the end surfaces of the ceramic body.
In regards to claim 2, Cho ‘626 discloses
The ceramic capacitor of claim 1, wherein the metal layer is formed to extend from the end surfaces of the ceramic body to the upper and lower surfaces and the front and rear surfaces of the ceramic body (seen in fig. 7-8).
In regards to claim 3, Cho ‘626 discloses
The ceramic capacitor of claim 1, wherein the metal layer has a center part between the both-side corners on the end surfaces of the ceramic body, which is exposed without being covered by the conductive resin layer (seen in fig. 7-8; [0008-0016]).
In regards to claim 4, Cho ‘626 discloses
The ceramic capacitor of claim 2, wherein the conductive resin layer is formed on the metal layer (seen in fig. 7-8).
In regards to claim 5, Cho ‘626 discloses
The ceramic capacitor of claim 1, wherein the conductive resin layer is in a shape that covers the entire top and bottom of the both-side corners of the end surfaces of the ceramic body ([0008-0016]).
In regards to claim 6, Cho ‘626 discloses
The ceramic capacitor of claim 1, wherein the conductive resin layer is in a shape that covers up to some areas of the upper surface and the lower surface connected to the respective corners ([0008-0016]).
In regards to claim 7, Cho ‘626 discloses
The ceramic capacitor of claim 1, wherein the external electrode further comprises a plating layer (133 & 143 – fig. 3; [0068]).
In regards to claim 8, Cho ‘626 discloses
The ceramic capacitor of claim 7, wherein the plating layer comes in direct contact with the metal layer all over the top and bottom on the end surfaces of the ceramic body (fig. 3).
In regards to claim 9, Cho ‘626 discloses
The ceramic capacitor of claim 7, wherein the plating layer is in a shape that completely covers the conductive resin layer (fig. 3).
In regards to claim 10, Cho ‘626 discloses
The ceramic capacitor of claim 7, wherein the plating layer comprises a first area that comes in contact with the conductive resin layer and a second area that comes in contact with the metal layer on the upper and lower surfaces and the front and rear surfaces of the ceramic body (fig. 3).
In regards to claim 12, Cho ‘626 discloses
The ceramic capacitor of claim 7, wherein the plating layer comprises a first area that comes in contact with the conductive resin layer, a second area that comes in contact with the metal layer, and a third area that comes in contact with the ceramic body on the upper and lower surfaces and the front and rear surfaces of the ceramic body (fig. 3).
In regards to claim 13, Cho ‘626 discloses
The ceramic capacitor of claim 7, wherein the plating layer has a one-layer structure of an Ni plating layer or a two-layer structure of a Ni plating layer and a Sn plating layer ([0019]).
In regards to claim 14, Cho ‘626 discloses
The ceramic capacitor of claim 1, wherein the metal layer comprises Cu ([0075]), and the conductive resin layer is made of Ag epoxy resin ([0081-0082]).
In regards to claim 15, Cho ‘626 discloses
A method for manufacturing a ceramic capacitor comprising:
a step of forming a ceramic body (110 – fig. 1; [0050] & [0054]) provided with front and rear surfaces facing each other, upper and lower surfaces facing each other, and both end surfaces facing each other (fig. 1; [0052]), and exposing internal electrodes (121 & 1211 – fig. 3; [0059]) onto the both end surfaces;
a step of forming a metal layer (131 & 141 – fig. 3 & 7; [0075]) on the entire both end surfaces of the ceramic body so as to be connected to the internal electrodes; and
a step of forming a conductive resin layer (132 & 142 – fig. 3 & 7-8; [0112-0114]) at both-side corners of the both end surfaces of the ceramic body.
In regards to claim 16, Cho ‘626 discloses
The method of claim 15, wherein the step of forming the metal layer forms the metal layer by applying a paste including a conductive metal or dipping and sintering in a dipping solution including the conductive metal onto the both end surfaces of the ceramic body and from the both end surfaces to a portion of the upper and lower surfaces and a portion of the front and rear surfaces ([0075]).
In regards to claim 18, Cho ‘626 discloses
The method of claim 15, further comprising a step of forming a plating layer (133 & 143 – fig. 3; [0068]) which comes in direct contact with the metal layer over the entire top and bottom on the both end surfaces of the ceramic body, and which completely covers the conductive resin layer after the step of forming the conductive resin layer.
Claim(s) 1, 7, & 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kwag et al. (US 2015/0162132).
In regards to claim 1, Kwag ‘132 discloses
A ceramic capacitor comprising:
a ceramic body (110 – fig. 1; [0034]) formed in a hexahedron shape, including a plurality of dielectric layers (111 – fig. 2; [0034]) and at least a pair of internal electrodes (121 & 122 – fig. 2; [0034]) disposed to face each other with the dielectric layers interposed therebetween, and including both end surfaces from which the internal electrodes are exposed, a lower surface that is a mount surface mounted on a substrate (210 – fig. 5; [0110]), an upper surface facing the lower surface, and a front surface and a rear surface connecting the upper surface and the lower surface together and facing each other (fig. 1-2 & 5); and
external electrodes (131 & 132 – fig. 1-2; [0034]) disposed on the both end surfaces of the ceramic body so as to be electrically connected to the internal electrodes,
wherein the external electrode includes:
a metal layer (131a & 132a – fig. 2; [0052]) formed throughout the end surfaces of the ceramic body so as to be connected to the internal electrode; and
a conductive resin layer (131b & 132b – fig. 2; [0072]) formed at both-side corners of the end surfaces of the ceramic body.
In regards to claim 7, Kwag ‘132 discloses
The ceramic capacitor of claim 1, wherein the external electrode further comprises a plating layer (131c & 132c – fig. 2; [0075]).
In regards to claim 11, Kwag ‘132 discloses
The ceramic capacitor of claim 7, wherein the plating layer is formed on the conductive resin layer and the metal layer on the upper and lower surfaces and the front and rear surfaces of the ceramic body, and exposes a part of the metal layer to outside (seen in fig. 2).
Claim(s) 15 & 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JP2010226017A hereafter referred to as Togashi.
In regards to claim 15, Togashi discloses
A method for manufacturing a ceramic capacitor comprising:
a step of forming a ceramic body (1 – fig. 1-3; [0020]) provided with front and rear surfaces facing each other, upper and lower surfaces facing each other, and both end surfaces facing each other (seen in fig. 1-3), and exposing internal electrodes (20 – fig. 2-3; [0020]) onto the both end surfaces;
a step of forming a metal layer (12 – fig. 3; [0025]) on the entire both end surfaces of the ceramic body so as to be connected to the internal electrodes; and
a step of forming a conductive resin layer (14 – fig. 3; [0026]) at both-side corners of the both end surfaces of the ceramic body.
In regards to claim 17, Togashi discloses
The method of claim 15, wherein the step of forming the conductive resin layer forms the conductive resin layer that covers respective corners of the ceramic body and some areas of the upper surface and the lower surface connected to the corners by dipping the corners of the ceramic body on which the metal layer is formed in Ag epoxy resin solution ([0040-0045]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2018/0174753 – fig. 1-2 US 2018/0151296 – [0092]
US 2016/0351332 – fig. 2 US 2015/0243439 – fig. 1-2
Communication
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID M SINCLAIR whose telephone number is (571)270-5068. The examiner can normally be reached M-TH from 8AM-4PM.
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/David M Sinclair/Primary Examiner, Art Unit 2848