DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species III (claims 1-2, 4-12, 14-19) in the reply filed on 09/15/2026 is acknowledged.
Claims 3, 13, 20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 9/15/26.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 8-9, 11-12, 14, 17-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al (KR 20220126320 A).
Regarding claim 1: Kim teaches in Fig. 11-1d about a semiconductor package, comprising:
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a lower redistribution wiring layer 100 that comprises first redistribution wirings 120, a protective layer 113 that defines openings (where 140 &143 resides), and bonding pads (140+143) that are on the protective layer 113 and are electrically connected to the first redistribution wirings through the openings (through 121, 122);
conductive bumps 251 that are on first bonding pads (1440_143 pad under 251) of the bonding pads; and
a semiconductor chip 201 on the first bonding pads, wherein each of the bonding pads comprises:
a conductive pillar 143 in a respective opening of the openings of the protective layer, wherein the conductive pillar comprises a first diameter (as marked); and
a pad pattern 140 that is on the protective layer and an upper surface of the conductive pillar 143, wherein the pad pattern comprises a second diameter (As marked) that is greater than the first diameter (as shown).
Regarding claims 2, 12: Kim teaches in Fig. 1c wherein the conductive pillar extends from the respective opening, and wherein the pad pattern at least partially surrounds an upper portion of the conductive pillar.
Regarding claims 11, 14, 17: As explained in claim 1, Kim teaches all the limitations including a lower redistribution wiring layer that comprises: a first region and a second region that at least partially surrounds the first region (as marked as R1 and R2).
Regarding claims 8, 18: Kim teaches in Fig. 1b about a molding member 400 that is on the semiconductor chip and the lower redistribution wiring layer; and
a plurality of vertical conductive structures 300 that extend into the molding member and at least partially surround the semiconductor chip.
Regarding claim 9: Kin teaches in Fig. 1b wherein the plurality of vertical conductive structures 300 are on respective second bonding pads of the bonding pads.
Regarding claim 19: Kim teaches in Fig. 1b further comprising an upper redistribution wiring layer 600 that is on the molding member 400 and comprises second redistribution wirings that are electrically connected to the plurality of vertical conductive structures 300.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4-5 are rejected under 35 U.S.C. 103 as being obvious over Kim et al (KR 20220126320 A)
Regarding claim 4: Kim doesn’t explicitly talk about wherein the first diameter is in a range of about 5 μm to 50 μm, and the second diameter is in a range of about 10 μm to 80 μm.
However Kim teaches the width W of the conductive structures 300 may be 50 μm to 250 μm, the conductive structures 300 have a pitch P1 of 350 μm or less and a width W of 250 μm or less.
Thus, it would have been obvious to one of the ordinary skill in the art at the time the application was filed to have the claimed ranges with routine experiment and optimization since the width is critical in order to have densely conductive structures, reduced area and miniaturized semiconductor package according to the teaching of Kim (page 3). In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious).
Regarding claim 5: Kim teaches in page 2 wherein the conductive pillar comprises copper.
Claims 6, 15 are rejected under 35 U.S.C. 103 as being obvious over Kim et al (KR 20220126320 A) in view of Chuang et al. (US PGPUB 20180047690 A1)
Regarding claims 6, 15: Kim does not teach wherein the bonding pad further comprises a seed layer pattern that is on the conductive pillar, and wherein the pad pattern is on the seed layer pattern.
Chuang teaches in Fig. 6 about wherein the bonding pad further comprises a seed layer pattern 22 that is on the conductive pillar 20, and wherein the pad pattern 16 (Fig. 2) is on the seed layer pattern.
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Thus, it would have been obvious to one of the ordinary skill in the art at the time the application was filed to have the feature as claimed to function as a diffusion barrier or a glue layer (Chuang, [0021]).
Allowable Subject Matter
Claims 7, 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The limitation allowable is “wherein the pad pattern further comprises a first plating pattern on the seed layer pattern and a second plating pattern on the first plating pattern” in combination with other limitations as a whole.
Conclusion
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/Mohammed Shamsuzzaman/Primary Examiner, Art Unit 2897
