DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1 and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653), and further in view of Ossart (US 2003/0070942).
Regarding claim 1, Szopko teaches a noise elimination circuit connected between a first transmission line and a second transmission line to eliminate noise between the first and second transmission lines (Paragraph [0031]…… a first transmitter 400 and a second transmitter 402 are coupled through an interference canceling apparatus 404 to an antenna combining network 406 by, respectively, a first transmission line 408 and a second transmission line 410……Paragraph [0033]…… The interference canceling apparatus 404 is comprised of a first circuit 414 coupled from the first transmission line 408 to the second transmission line 410 and a second circuit 416 coupled from the second transmission line 410 to the first transmission line 408), the noise elimination circuit comprising:
a coupling line connected to the first transmission line and the second transmission line (Paragraph [0033]……… The first circuit 414 comprises a directional coupler 418, for coupling a portion of the signal from the first transmitter to a phase shifter 420 and to a level shifter 422. After phase shifting and level shifting, the resultant signal is coupled to the second transmission line by a second directional coupler 424. The second circuit 416 comprises a directional coupler 426, for coupling a portion of the signal from the second transmitter 402 to a phase shifter 428 and from there to a level shifter 430. After phase shifting and level shifting, the resultant signal is coupled to the first transmission line 408 by a second directional coupler 432), but does not specifically teach a resonance unit including a plurality of resonance circuits connected in parallel to the coupling line; wherein a band pass filter includes the coupling line and the resonance unit; and a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit.
However, in related art, Beaudin teaches a resonance unit including a plurality of resonance circuits connected in parallel to the coupling line (See Fig. 12, resonator circuits R1’, R2’, and R3’ connected in parallel to the coupling line. Further, paragraph [0088] teaches the resonators R1', R2' and R3' are implemented using resonators electrically coupled in parallel using electrical coupling lines 54). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Beaudin’s teaching about a resonance unit including a plurality of resonance circuits connected in parallel to the coupling line with Szopko’s invention in order to cancel the inductive coupling.
The combination of Szopko and Beaudin fail to teach wherein a band pass filter includes the coupling line and the resonance unit; and a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit.
However, in related art, Yamada teaches wherein a band pass filter includes the coupling line and the resonance unit (Col 2, lines 16-35, Col 3, lines 48-55; Claim 1……a band-pass filter which comprises a plurality of a parallel resonance circuit element means, a coupling line). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Yamada’s teaching about wherein a band pass filter includes the coupling line and the resonance unit with Szopko’s and Beaudin’s invention in order to obtain an output signal corresponding to the resonance frequency.
The combination of Szopko, Beaudin, and Yamada fail to teach a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit.
However, in related art, Ossart teaches a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit (paragraph [0042]…… the measurement of the resistance and of the capacity of the medium is determined by a null method, on the basis of the action that it is necessary to carry out in order to cancel out the real part and the imaginary part of the representation of the current passing through the biomass). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Ossart’s teaching about a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit with Szopko’s, Beaudin’s, and Yamada’s invention in order to optimized frequency spectrum represents the characteristics of the time domain signal.
Regarding claim 15, Szopko teaches a communication device comprising:
a first antenna connected to a first transmission line (See Fig. 4, first antenna 400 connected to a first transmission line 408);
a second antenna connected to a second transmission line (See Fig. 4, second antenna 402 connected to a second transmission line 410); and
a noise elimination circuit connected between the first transmission line and the second transmission line to eliminate noise between the transmission lines (Paragraph [0031]…… a first transmitter 400 and a second transmitter 402 are coupled through an interference canceling apparatus 404 to an antenna combining network 406 by, respectively, a first transmission line 408 and a second transmission line 410……Paragraph [0033]…… The interference canceling apparatus 404 is comprised of a first circuit 414 coupled from the first transmission line 408 to the second transmission line 410 and a second circuit 416 coupled from the second transmission line 410 to the first transmission line 408);
wherein the noise elimination circuit includes: a coupling line connected to the first transmission line and the second transmission line (Paragraph [0033]……… The first circuit 414 comprises a directional coupler 418, for coupling a portion of the signal from the first transmitter to a phase shifter 420 and to a level shifter 422. After phase shifting and level shifting, the resultant signal is coupled to the second transmission line by a second directional coupler 424. The second circuit 416 comprises a directional coupler 426, for coupling a portion of the signal from the second transmitter 402 to a phase shifter 428 and from there to a level shifter 430. After phase shifting and level shifting, the resultant signal is coupled to the first transmission line 408 by a second directional coupler 432), but does not specifically teach a resonance unit including a plurality of resonance circuits connected in parallel to the coupling line; a band pass filter includes the coupling line and the resonance unit; and a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit.
However, in related art, Beaudin teaches a resonance unit including a plurality of resonance circuits connected in parallel to the coupling line (See Fig. 12, resonator circuits R1’, R2’, and R3’ connected in parallel to the coupling line. Further, paragraph [0088] teaches the resonators R1', R2' and R3' are implemented using resonators electrically coupled in parallel using electrical coupling lines 54). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Beaudin’s teaching about a resonance unit including a plurality of resonance circuits connected in parallel to the coupling line with Szopko’s invention in order to cancel the inductive coupling.
The combination of Szopko and Beaudin fail to teach a band pass filter includes the coupling line and the resonance unit; and a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit.
However, in related art, Yamada teaches a band pass filter includes the coupling line and the resonance unit (Col 2, lines 16-35, Col 3, lines 48-55; Claim 1……a band-pass filter which comprises a plurality of a parallel resonance circuit element means, a coupling line). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Yamada’s teaching about a band pass filter includes the coupling line and the resonance with Szopko’s and Beaudin’s invention in order to obtain an output signal corresponding to the resonance frequency.
The combination of Szopko, Beaudin, and Yamada fail to teach a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit.
However, in related art, Ossart teaches a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit (paragraph [0042]…… the measurement of the resistance and of the capacity of the medium is determined by a null method, on the basis of the action that it is necessary to carry out in order to cancel out the real part and the imaginary part of the representation of the current passing through the biomass). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Ossart’s teaching about a real part and an imaginary part of an admittance between the transmission lines are canceled out by the noise elimination circuit with Szopko’s, Beaudin’s, and Yamada’s invention in order to optimized frequency spectrum represents the characteristics of the time domain signal.
Regarding claim 16, the combination of Szopko, Beaudin, Yamada, and Ossart teach all the claimed elements in claim 15. In addition, Szopko teaches the communication device according to claim 15, wherein the first antenna is a transmitting antenna, and the second antenna is a receiving antenna (See abstract; Paragraph [0018]).
Regarding claim 17, the combination of Szopko, Beaudin, Yamada, and Ossart teach all the claimed elements in claim 15. In addition, Szopko teaches the communication device according to claim 15, wherein the first antenna and the second antenna are transmitting antennas (Paragraph [0033]…The interference canceling apparatus 404 is comprised of a first circuit 414 coupled from the first transmission line 408 to the second transmission line 410 and a second circuit 416 coupled from the second transmission line 410 to the first transmission line 408. The first and second circuits may be identical assuming the transmitters 400, 402, etc. are identical).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942), and further in view of Ishigaki et al. (US Patent #4,758,922).
Regarding claim 2, the combination of Szopko, Beaudin, Yamada, and Ossart fail to teach the noise elimination circuit according to claim 1, further comprising a dielectric layer, wherein the resonance unit includes a circuit pattern and a via within the dielectric layer.
However, in related art, Ishigaki teaches the noise elimination circuit according to claim 1, further comprising a dielectric layer, wherein the resonance unit includes a circuit pattern and a via within the dielectric layer (Col 4, lines 49-59…….. It would be equally possible to utilize only three dielectric layers, with two of the dielectric layers (with respective ground plane layers formed thereon) sandwiching a strip line to form a microstrip resonance element, and with the third dielectric layer having a circuit pattern formed thereon). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Ishigaki’s teaching about the noise elimination circuit according to claim 1, further comprising a dielectric layer, wherein the resonance unit includes a circuit pattern and a via within the dielectric layer with Szopko’s, Beaudin’s, Yamada’s, and Ossart’s invention in order to effectively shielded by the ground plane layers which also effectively mutually isolate the two circuit sections.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942) in view of Ishigaki et al. (US Patent #4,758,922), and further in view of Nakamura et al. (US 2006/0097811).
Regarding claim 3, the combination of Szopko, Beaudin, Yamada, Ossart, and Ishigaki fail to teach the noise elimination circuit according to claim 2, wherein each of the plurality of resonance circuits includes a resonator including a capacitor and an inductor connected in parallel; and a resonance frequency of the resonator is set to generate an attenuation pole in a frequency band of the noise to be eliminated between the first and second transmission lines.
However, in related art, Nakamura teaches the noise elimination circuit according to claim 2, wherein each of the plurality of resonance circuits includes a resonator including a capacitor and an inductor connected in parallel; and a resonance frequency of the resonator is set to generate an attenuation pole in a frequency band of the noise to be eliminated between the first and second transmission lines (Paragraph [0014]….. an oscillator comprising a resonator including an inductor and a capacitor connected in parallel, and a negative conductance generator for generating negative conductance, the negative conductance generator being connected to the resonator, wherein the oscillator outputs a signal whose frequency is substantially determined by a resonance frequency of the resonator, wherein the inductor is a variable inductor whose inductance varies, wherein the resonance frequency of the resonator varies as a result of the variation in the inductance, and wherein the variable inductor described as above is the variable inductor according to the invention. By use of the variable inductor according to the invention, high in quality factor, it is possible to obtain an oscillator low in phase noise. Further, if a variable capacitor is adopted as the capacitor, an oscillator having a wide frequency-tuning range can be obtained). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Nakamura’s teaching about wherein each of the plurality of resonance circuits includes a resonator including a capacitor and an inductor connected in parallel; and a resonance frequency of the resonator is set to generate an attenuation pole in a frequency band of the noise to be eliminated between the first and second transmission lines with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, and Ishigaki’s invention in order to enable the use of wireless communication with optimal quality.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942) in view of Ishigaki et al. (US Patent #4,758,922) in view of Nakamura et al. (US 2006/0097811), and further in view of Imamura (US 2015/0318593).
Regarding claim 4, the combination of Szopko, Beaudin, Yamada, Ossart, Ishigaki, and Nakamura fail to teach the noise elimination circuit according to claim 3, further comprising a first ground electrode with a flat plate shape and provided in the dielectric layer, wherein the first ground electrode is one electrode of the capacitor included in the resonator.
However, in related art, Imamura teaches the noise elimination circuit according to claim 3, further comprising a first ground electrode with a flat plate shape and provided in the dielectric layer, wherein the first ground electrode is one electrode of the capacitor included in the resonator (Paragraph 0007….. A resonator according to a first aspect of various preferred embodiments of the present invention includes a multilayer body including a plurality of dielectric layers, an electrode being disposed on each of the plurality of dielectric layers; a ground electrode disposed on one of the dielectric layers; a capacitor electrode disposed on one of the dielectric layers; and an inductor electrode provided in a portion which starts from a node between the inductor electrode and the capacitor electrode as a start point, passes through a line electrode disposed on a dielectric layer different from the dielectric layer on which the capacitor electrode is disposed and the dielectric layer on which the ground electrode is disposed, and reaches a node between the inductor electrode and the ground electrode as an end point. The line electrode preferably has a ring-shaped configuration, as viewed in a stacking direction of the dielectric layers). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Imamura’s teaching about a first ground electrode with a flat plate shape and provided in the dielectric layer, wherein the first ground electrode is one electrode of the capacitor included in the resonator with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, Ishigaki’s, and Nakamura’s invention in order to reduce the driving voltage to be applied to the electrode.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942), and further in view of Liu (US Patent #10,763,567).
Regarding claim 7, the combination of Szopko, Beaudin, Yamada, and Ossart fail to teach the noise elimination circuit according to claim 2, wherein the coupling line is within the dielectric layer.
However, in related art, Liu teaches the noise elimination circuit according to claim 2, wherein the coupling line is within the dielectric layer (Claim 12). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Liu’s teaching about wherein the coupling line is within the dielectric layer with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, Ishigaki’s, and Nakamura’s invention in order to control the signal of first and second transmission lines and achieve a high data transfer rate.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942) in view of Ishigaki et al. (US Patent #4,758,922) in view of Onaka (US 2020/0274241) in view of Kawata (US 2017/0127510).
Regarding claim 8, the combination of Szopko, Beaudin, Yamada, Ossart, and Ishigaki teach all the claimed elements in claim 2. In addition, Beaudin teaches on the dielectric substrate, the coupling line is separated from the resonance unit (See Fig. 12, resonator circuits R1’, R2’, and R3’ connected in parallel to the coupling line. Further, paragraph [0088] teaches the resonators R1', R2' and R3' are implemented using resonators electrically coupled in parallel using electrical coupling lines 54), but does not specifically teach the noise elimination circuit according to claim 2, wherein the first transmission line, the second transmission line, and the noise elimination circuit are on a dielectric substrate.
However, in related art, Onaka teaches the noise elimination circuit according to claim 2, wherein the first transmission line, the second transmission line (Paragraphs [0018-0019]). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Onaka’s teaching about wherein the first transmission line, the second transmission line on a dielectric substrate with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, and Ishigaki’s invention in order to counteract the capacitive effect.
The combination of Szopko, Beaudin, Yamada, Ossart, Ishigaki, and Onaka fail to teaches the noise elimination circuit is on a dielectric substrate.
However, in related art, Kawata teaches the noise elimination circuit is on a dielectric substrate (Paragraph [0016] and claim 8). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Kawata’s teaching about the noise elimination circuit is on a dielectric substrate with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, and Ishigaki’s Onaka’s invention in order to mitigate interference and enable successful data transmission.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942) in view of Ishigaki et al. (US Patent #4,758,922), and further in view of Arashi et al. (US 2009/0011921).
Regarding claim 9, the combination of Szopko, Beaudin, Yamada, Ossart, and Ishigaki fail to teach the noise elimination circuit according to claim 2, wherein a dielectric constant temperature coefficient of the dielectric layer is within a range of more than about −100 ppm/K and less than about +100 ppm/K.
However, in related art, Arashi teaches the noise elimination circuit according to claim 2, wherein a dielectric constant temperature coefficient of the dielectric layer is within a range of more than about −100 ppm/K and less than about +100 ppm/K (Paragraph [0080]). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Arashi’s teaching about wherein a dielectric constant temperature coefficient of the dielectric layer is within a range of more than about −100 ppm/K and less than about +100 ppm/K with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, and Ishigaki’s invention in order to allow optimum functioning of the dielectric the breakdown voltage.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942) in view of Ishigaki et al. (US Patent #4,758,922), and further in view of Imamura (US 2013/0229241).
Regarding claim 10, the combination of Szopko, Beaudin, Yamada, Ossart, and Ishigaki fail to teach the noise elimination circuit according to claim 2, wherein the dielectric layer is made of a low temperature co-fired ceramic including more than or equal to about 50% by weight and less than or equal to about 80% by weight of a glass component.
However, in related art, Imamura teaches the noise elimination circuit according to claim 2, wherein the dielectric layer is made of a low temperature co-fired ceramic including more than or equal to about 50% by weight and less than or equal to about 80% by weight of a glass component (Paragraph [0065]). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Imamura’s teaching about wherein the dielectric layer is made of a low temperature co-fired ceramic including more than or equal to about 50% by weight and less than or equal to about 80% by weight of a glass component with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, and Ishigaki’s invention in order to miniaturize capacitors and accomplish large-capacitance designs.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942) in view of Ishigaki et al. (US Patent #4,758,922), and further in view of Ford (US 2013/0294485).
Regarding claim 11, the combination of Szopko, Beaudin, Yamada, Ossart, and Ishigaki fail to teach the noise elimination circuit according to claim 2, wherein the dielectric layer includes a material mainly including SiO.sub.2, SiN, a fluororesin, a liquid crystal polymer, poly phenylene ether (PPE), LiNbO.sub.3, or LiTaO.sub.3.
However, in related art, Ford teaches the noise elimination circuit according to claim 2, wherein the dielectric layer includes a material mainly including SiO.sub.2, SiN, a fluororesin, a liquid crystal polymer (Paragraph 0017), poly phenylene ether (PPE), LiNbO.sub.3, or LiTaO.sub.3. Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Ford’s teaching about wherein the dielectric layer includes a material mainly including SiO.sub.2, SiN, a fluororesin, a liquid crystal polymer, poly phenylene ether (PPE), LiNbO.sub.3, or LiTaO.sub.3 with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, and Ishigaki’s invention in order to reduce the transmission loss of a substrate.
Claims 12 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942) in view of Ishigaki et al. (US Patent #4,758,922), and further in view of Tsunoda et al. (US 2003/0184407).
Regarding claim 12, the combination of Szopko, Beaudin, Yamada, Ossart, and Ishigaki fail to teach the noise elimination circuit according to claim 2, further comprising a first circuit provided to the coupling line and including a reactance element.
However, in related art, Tsunoda teaches the noise elimination circuit according to claim 2, further comprising a first circuit provided to the coupling line and including a reactance element (Paragraph 0055 and claim 11). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Tsunoda’s teaching about a first circuit provided to the coupling line and including a reactance element with Szopko’s, Beaudin’s, Yamada’s, Ossart’s, and Ishigaki’s invention in order to match the impedance of the dielectric resonator.
Regarding claim 13, the combination of Szopko, Beaudin, Yamada, Ossart, Ishigaki, and Tsunoda teach all the claimed elements in claim 12. In addition, Ishigaki teaches the noise elimination circuit according to claim 12, wherein the first circuit is on the dielectric layer (Col 4, lines 49-59…….. It would be equally possible to utilize only three dielectric layers, with two of the dielectric layers (with respective ground plane layers formed thereon) sandwiching a strip line to form a microstrip resonance element, and with the third dielectric layer having a circuit pattern formed thereon).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942), and further in view of Akuzawa et al. (US 2017/0163169).
Regarding claim 14, the combination of Szopko, Beaudin, Yamada, and Ossart fail to teach the noise elimination circuit according to claim 1, wherein the resonance unit includes a capacitor and an inductor including discrete elements.
However, in related art, Akuzawa teaches the noise elimination circuit according to claim 1, wherein the resonance unit includes a capacitor and an inductor including discrete elements (Paragraph [0024]). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Akuzawa’s teaching about a wherein the resonance unit includes a capacitor and an inductor including discrete elements with Szopko’s, Beaudin’s, Yamada’s, and Ossart’s invention in order to adjust the resonance frequency.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942), and further in view of Lavedas et al. (US 2018/0145404).
Regarding claim 18, the combination of Szopko, Beaudin, Yamada, and Ossart fail to teach the communication device according to claim 15, wherein the first antenna and the second antenna are receiving antennas.
However, in related art, Lavedas teaches the communication device according to claim 15, wherein the first antenna and the second antenna are receiving antennas (Claims 4 and 11). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Laveda’s teaching about wherein the first antenna and the second antenna are receiving antennas with Szopko’s, Beaudin’s, Yamada’s, and Ossart’s invention in order to obtain signal from other communication terminals.
Claims 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Szopko et al. (US 2004/0192232) in view of Beaudin et al. (US 2004/0130411) in view of Yamada et al. (US Patent #5,202,653) in view of Ossart (US 2003/0070942), and further in view of Yoshizawa et al. (US 2016/0036418).
Regarding claim 19, the combination of Szopko, Beaudin, Yamada, and Ossart fail to teach the communication device according to claim 15, further comprising a front end circuit that includes the noise elimination circuit.
However, in related art, Yoshizawa teaches the communication device according to claim 15, further comprising a front end circuit that includes the noise elimination circuit (Paragraph [0036]). Therefore, it would have been obvious to one of ordinary skill in the art, at the time the invention was made to use (pre-AIA ) or before the effective filing date of the claimed invention (AIA ) to use Yoshizawa’s teaching about a front end circuit that includes the noise elimination circuit with Szopko’s, Beaudin’s, Yamada’s, and Ossart’s invention in order to reduce interference and increase or maximize system capacity.
Regarding claim 20, the combination of Szopko, Beaudin, Yamada, Ossart, and Yoshizawa teach all the all the claimed elements in claim 19. In addition, Yoshizawa teaches the communication device according to claim 19, wherein the front end circuit further includes a signal processing circuit (Paragraph [0036]).
Allowable Subject Matter
Claims 5-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 5, the prior art of record fails to teach the noise elimination circuit according to claim 4, further comprising a second ground electrode provided in the dielectric layer to face the first ground electrode, and electrically connected with the first ground electrode; wherein the coupling line and the resonance unit are between the first ground electrode and the second ground electrode in the dielectric layer
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Marquant et al. (US Patent #11,782,009), Colby (US Patent #11,128,253), Wu et al. (US 2021/0144030), Noh et al. (US Patent #10,959,121), Liu (US Patent #10,763,567), Moallem (US 2020/0259240), Raghavan et al. (US 2020/0228159), Valvano et al. (US Patent #10,376,177), Asada (US 2018/0013395), Yunoki et al. (US Patent #9,722,567), Imamura (US 2017/0093358), Melloni et al. (US 2016/0359074), Fukamachi et al. (US Patent #9,287,845), Yamatogi et al. (US 2015/0311577), Wada (US Patent #8,494,008), Hong et al. (US 2012/0256703), and Lo Hiine et al. (US 2012/0028576).
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/DOMINIC E REGO/Primary Examiner, Art Unit 2648 Tel 571-272-8132
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