DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Foreign priority papers submitted under 35 U.S.C. § 119(a)-(d) or 35 U.S.C. § 365(a)-(c) are acknowledged.
Information Disclosure Statement
The Information Disclosure Statement(s) submitted by applicant on 06/05/2024 and 12/30/2024 has/have been considered. The submission(s) is/are in compliance with the provisions of 37 CFR § 1.97.
Claim Rejections - 35 U.S.C. § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
1. Claim(s) 1-8, 12, 13 and 16 is/are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by U.S. Patent Publication No. 20190001680 to Miura et al. (hereinafter “Miura”).
With respect to claim 1, Miura discloses a printing element board (Board 100/114 FIG.s 1-6D) comprising: a plurality of printing elements configured to eject a liquid, the plurality of printing elements being arrayed in a first direction to form a printing element array (108/101 FIG.s 2A-6D); a heat generating element configured to heat the liquid; a driver configured to drive the heat generating element (heating resistor element 101 FIG.s 2A-6D); a data processing circuit configured to control the driver (driving circuit 203 FIG.s 2A-6D); and a plurality of PADs configured such that a signal to be sent to the data processing circuit is inputted to the plurality of PADs from outside, the plurality of PADs being arrayed in the first direction to form a PAD array (Pads 201 FIG.s 3-6D), wherein the data processing circuit is provided in at least two or more systems between the printing element array and the PAD array in a second direction orthogonal to the first direction (203 FIG.s 4A-6D and FIG. 8).
With respect to claim 2, Miura discloses a plurality of supply ports configured to be supplied with the liquid directed to the printing element, the plurality of supply ports being arrayed in the first direction to form a supply port array (supply ports 300 (300a and 300b) FIG. 4B).
With respect to claim 3, Miura discloses wherein two of the supply port arrays are provided for each one of the printing element array, and the two supply port arrays are provided respectively at different positions with the printing element array interposed between the two supply port arrays in the second direction (supply ports 300 (300a and 300b) FIG. 4B).
With respect to claim 4, Miura discloses wherein the heat generating element is provided between the printing element array and the supply port array in the second direction (101 FIG. 4B).
With respect to claim 5, Miura discloses wherein a plurality of the heat generating elements are provided, a heating area is determined for each of the plurality of heat generating elements, and a plurality of the heating areas have substantially the same layout (101 FIG. 4B).
With respect to claim 6, Miura discloses wherein the numbers of the printing elements contained respectively in the plurality of heating areas are equal (101 FIG. 4B).
With respect to claim 7, Miura discloses wherein the driver is provided in a one-to-one correspondence with each of the plurality of heating area (driving circuit 203 FIG.s 2A-6D).
With respect to claim 8, Miura discloses wherein a plurality of the drivers are provided, and a wiring between each of the plurality of drivers and the data processing circuit is an individual wiring (wiring, driving circuit 203 FIG.s 2A-6D).
With respect to claim 12, Miura discloses wherein the driver is disposed in a region on an opposite side from the printing element array with respect to the supply port array in the second direction (driving circuit 203 FIG.s 2A-6D and FIG. 8).
With respect to claim 13, Miura discloses wherein the data processing circuit includes a first data processing circuit and a second data processing circuit (driving circuit 203 FIG.s 2A-6D and FIG. 8).
With respect to claim 16, Miura discloses a plurality of the printing element arrays, wherein the plurality of printing element arrays are provided respectively at different positions in the second direction (100, 101, 114 FIG.s 1-6D and FIG. 8).
Claim Rejections - 35 U.S.C. § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
1. Claim(s) 9, 10 , 11 is/are rejected under 35 U.S.C. § 103 as being unpatentable over U.S. Patent Publication No. 20190001680 to Miura et al. (hereinafter “Miura”) in view of U.S. Patent Publication No. 20220153023 to Hirohara et al. (hereinafter “Hirohara”).
With respect to claim 9, Miura discloses the heat generating element
However, Miura fails to specifically disclose:
polysilicon.
Hirohara discloses:
polysilicon (element 101 [0027]-[0029] and [0029]-[0033] of Hirohara).
At the time of the invention, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the polysilicon as disclosed by Hirohara with the method/apparatus of Miura. The motivation for doing so would have been to improve the heating element. ([0029]-[0033] of Hirohara). Additionally, using polysilicon was very common at the time of the invention.
With respect to claim 10, Miura in view of Hirohara discloses wherein the heat generating element includes a heat generating unit formed of polysilicon, a bypass unit formed of aluminum, and a plug connecting the heat generating unit and the bypass unit (FIG.s 2-6D, [0027]-[0029]of Miura and Fig’s 4-7[, 0029]-[0033] of Hirohara).
With respect to claim 11, Miura in view of Hirohara discloses wherein the plug is formed of tungsten (tungsten plug [0031] of Hirohara).
2. Claim(s) 14, 15, and 17-20 is/are rejected under 35 U.S.C. § 103 as being unpatentable over U.S. Patent Publication No. 20190001680 to Miura et al. (hereinafter “Miura”) in view of U.S. Patent Publication No. 20180333954 to Yamato (hereinafter “Yamato”).
With respect to claim 14, Miura discloses the printing element board.
However, Miura fails to specifically disclose:
a first data analysis unit configured to analyze data inputted from a first PAD which is one of the plurality of PADs and send data to the first data processing circuit based on the analysis; and a second data analysis unit configured to analyze data inputted from a second PAD which is different from the first PAD and send data to the second data processing circuit based on the analysis (Pads 201 FIG.s 3-7B of Miura).
Yamato discloses:
a first data analysis unit configured to analyze data inputted from a first PAD which is one of the plurality of PADs and send data to the first data processing circuit based on the analysis; and a second data analysis unit configured to analyze data inputted from a second PAD which is different from the first PAD and send data to the second data processing circuit based on the analysis (Pads 201 FIG.s 3-7B of Miura and 600/601, shift register 203/205, reset [0075]-[0103] FIG.s 3-9 of Yamato).
At the time of the invention, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the data analysis unit disclosed by Yamato with the method/apparatus of Miura. The motivation for doing so would have been to improve the control of the printing element board. ([0075]-[0103] of Yamato).
With respect to claim 15, Miura in view of Yamato discloses further comprising: a third PAD which is one of the plurality of PADs, the third PAD being configured such that a reset signal is inputted to the third PAD, wherein in a case where the reset signal is inputted to the first data processing circuit, a value held in a shift register of the first data processing circuit is reset, and in a case where the reset signal is inputted to the second data processing circuit, a value held in a shift register of the second data processing circuit is reset (shift register 203/205, reset [0075] FIG.s 3-9 of Yamato).
With respect to claim 17, Miura in view of Yamato discloses A printing element board (Board 100/114 FIG.s 1-6D) comprising: a printing element configured to eject a liquid (108/101 FIG.s 2A-6D); a heat generating element configured to heat the liquid (heating resistor element 101 FIG.s 2A-6D); a driver configured to drive the heat generating element (driving circuit 203 FIG.s 2A-6D); a data processing circuit configured to control the driver (driving circuit 203 FIG.s 2A-6D); and an analysis unit configured to determine whether a first signal for driving the heat generating element is transferred to the heat generating element and cause a shift register of the data processing circuit to store the first signal based on a result of the determination, wherein a signal for driving the printing element is transferred at a constant cycle, the analysis unit determines whether the first signal is transferred, at the constant cycle, and the first signal and a second signal for driving the printing element are transferred by using at least two or more communication passages (Pads 201 FIG.s 3-7B of Miura and 600/601, shift register 203/205, reset [0075]-[0103] FIG.s 3-9 of Yamato).
With respect to claim 18, Miura in view of Yamato discloses further comprising: a PAD configured such that a signal is inputted to the PAD from outside (Pads 201 FIG.s 3-7B of Miura).
With respect to claim 19, Miura in view of Yamato discloses wherein the number of the analysis units is equal to the number of communication passages, and the number of the PADs is equal to or larger than the number of communication passages (Pads 201 FIG.s 3-7B of Miura and 600/601, shift register 203/205, reset [0075]-[0103] FIG.s 3-9 of Yamato).
With respect to claim 20, Miura in view of Yamato discloses wherein the data processing circuit includes a first data processing circuit and a second data processing circuit, the analysis unit includes a first analysis unit connected to the first data processing circuit and a second analysis unit connected to the second data processing circuit, and a plurality of the PADs include a first PAD connected to the first analysis unit, a second PAD connected to the second analysis unit, and a third PAD configured such that a reset signal is inputted to the third PAD (Pads 201 FIG.s 3-7B of Miura and 600/601, shift register 203/205, reset [0075]-[0103] FIG.s 3-9 of Yamato).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Bradley W Thies whose telephone number is (571)270-5667. The examiner can normally be reached on M-F 9:30 am -6:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor Ricardo Magallanes can be reached at (571) 272-5960. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BRADLEY W THIES/Primary Examiner, Art Unit 2853