DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed 03/28/2026 has been entered. Claims 1, 8 have been amended. Claims 2 and 9 are canceled.
Response to Arguments
Applicant’s arguments/amendments with respect to the rejection of claims under 35 USC § 103 have been considered but are not persuasive.
Applicant’s arguments:
Ma does not teach or suggest a hardware process that is performed "completely... without memory access".
The Examiner’s Response
Applicant asserts “…Ma does not teach or suggest a hardware process that is performed "completely... without memory access". However, the Examiner respectfully disagrees. Ma p24 teaches Layer 2 processing in an in-line manner using Layer 2 circuits . Further in p44 explained "Layer 2 .. consist of the PDCP layer, the RLC layer, and the MAC layer" that mean each “each layer in the Layer 2” (e.g PDCP , RLC, and MAC ) are not “access data in system memory” .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1, 5-8, and 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Ma (US20220368782A1), hereinafter Ma in view of Kim (US 20240306037 A1), hereinafter Kim .
Regarding to claim 1,
Ma teaches a method for speeding up packet processing, wherein the method is implemented by a hardware acceleration circuitry of a computing device, comprising (fig. 2, and fig. 5A) ...
performing a packet data convergence protocol (PDCP) process on PDCP service data units (SDUs) corresponding to uplink packets from an upper layer to obtain PDCP protocol data units (PDUs); performing a radio link control (RLC) process on RLC SDUs corresponding to the PDCP PDUs to obtain RLC PDUs (fig. 2, and fig. 5A and [0051] implementing Layer 2 downlink data processing using Layer 2 circuits 508 ... Layer 2 circuits 508 include an a PDCP circuit 522, an RLC circuit 524, and a MAC circuit 526. ....[0052]Baseband chip 502 can work in an interactive mode in which one or more dedicated ICs (e.g., SDAP circuit 520, PDCP circuit 522, RLC circuit 524, and/or MAC circuit 526) are controlled by MCU 510, or work in an automated mode in which MCU 510 may not be involved in controlling the dedicated ICs). further teaches wherein the PDCP process, the RLC process, and the MAC process are performed completely based on hardware without memory access ([0024] implementing Layer 2 downlink data processing in an in-line manner using dedicated Layer 2 circuits, such as application-specific integrated circuits (ASICs), thereby achieving high performance, low cost, and low power Layer 2 downlink data processing and transmission).
Ma does not explicitly teach receiving an uplink grant configuration from a network ;... performing a medium access control (MAC) process on MAC SDUs corresponding to the RLC PDUs to obtain a transport blocks (TB); and transmitting the TB to a physical (PHY) layer.
Kim teaches receiving an uplink grant configuration from a network (Fig. 1GA, [0190] terminal receives an uplink transmission resource (UL grant 1 1i-25) from the base station) ...
performing a medium access control (MAC) process on MAC SDUs corresponding to the RLC PDUs to obtain a transport blocks (TB); and transmitting the TB to a physical (PHY) layer (The MAC 1b-15 or 1b-30 is connected to several RLC layer devices configured in a single terminal, and perform an operation of multiplexing RLC PDUs to a MAC PDU, and demultiplexing a MAC PDU to RLC PDUs. Main functions of the MAC 1b-15 or 1b-30 are summarized as follows. [0080] Mapping (Mapping between logical channels and transport channels) [0081] Multiplexing and demultiplexing (Multiplexing/demultiplexing of MAC SDUs belonging to one or different logical channels into/from transport blocks (TB) delivered to/from the physical layer on transport channels)).
It would have been obvious to one having ordinary skill in the art before the effective filing date to add the teaching of Kim to the teaching of Ma. The motivation for such an addition would be to improve a data processing speed of a reception node ([0223] Kim).
Regarding to claim 5
Ma and Kim teach the method for speeding up packet processing as claimed in claim 1,
Ma does not explicitly teach wherein the RLC process comprises: assembling the RLC SDUs into the RLC PDUs; and transmitting the RLC PDUs; wherein each RLC PDU includes an RLC header and an RLC payload, and the RLC payload is used to carry one or more RLC SDUs or a segment of a PDCP SDU.
Kim further teaches wherein the RLC process comprises assembling the RLC SDUs into the RLC PDUs; and transmitting the RLC PDUs; wherein each RLC PDU includes an RLC header and an RLC payload, and the RLC payload is used to carry one or more RLC SDUs or a segment of a PDCP SDU (Fig. 1GA).
It would have been obvious to one having ordinary skill in the art before the effective filing date to add the teaching of Kim to the teaching of Ma. The motivation for such an addition would be to improve a data processing speed of a reception node ([0223] Kim).
Regarding to claim 6
Ma and Kim teach the method for speeding up packet processing as claimed in claim 1,
Ma does not explicitly teach wherein the MAC process comprises: assembling the MAC SDUs into MAC PDUs; and multiplexing the MAC PDUs into the TB; wherein each MAC PDU includes a MAC header and a MAC payload, and the MAC payload is used to carry one MAC SDU.
Kim teaches wherein the MAC process comprises: assembling the MAC SDUs into MAC PDUs; and (Fig. 1GA) multiplexing the MAC PDUs into the TB ([0081] Multiplexing and demultiplexing (Multiplexing/demultiplexing of MAC SDUs belonging to one or different logical channels into/from transport blocks (TB) delivered to/from the physical layer on transport channels))
wherein each MAC PDU includes a MAC header and a MAC payload, and the MAC payload is used to carry one MAC SDU (Fig. 1GA).
It would have been obvious to one having ordinary skill in the art before the effective filing date to add the teaching of Kim to the teaching of Ma. The motivation for such an addition would be to improve a data processing speed of a reception node ([0223] Kim).
Regarding to claim 7
Ma and Kim teach the method for speeding up packet processing as claimed in claim 1,
Ma does not explicitly teach wherein the uplink packets are Internet protocol (IP) packets.
Kim teaches wherein the uplink packets are Internet protocol (IP) packets ([0190] IP packet (PDCP SDU) arrives at a PDCP layer).
It would have been obvious to one having ordinary skill in the art before the effective filing date to add the teaching of Kim to the teaching of Ma. The motivation for such an addition would be to improve a data processing speed of a reception node ([0223] Kim).
Claims [8 and 12-14] (apparatus) are rejected under the same reasoning as claims [1 and 5-7] (method), where Ma teaches both device and method (Ma [0002]).
Claims 3-4 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Ma in view of Kim and further in view of Ho (US 9554417 B2), herein after Ho.
Regarding to claim 3 ,
Ma and Kim teach the method for speeding up packet processing as claimed in claim 1,
Ma does not explicitly teach wherein the PDCP process comprises: assembling the PDCP SDUs into the PDCP PDUs, wherein each PDCP PDU includes a PDCP payload; and transmitting the PDCP PDUs; wherein the PDCP PDU further includes a PDCP header when the PDCP payload is a complete PDCP SDU, a first segment of a PDCP SDU or a middle segment of the PDCP SDU; and wherein the PDCP PDU does not include a PDCP header when the PDCP payload is a last segment of the PDCP SDU.
Kim further teaches wherein the PDCP process comprises assembling the PDCP SDUs into the PDCP PDUs, wherein each PDCP PDU includes a PDCP payload; and transmitting the PDCP PDUs (Fig. 1GA).
It would have been obvious to one having ordinary skill in the art before the effective filing date to add the teaching of Kim to the teaching of Ma. The motivation for such an addition would be to improve a data processing speed of a reception node ([0223] Kim).
Ma and Kim do not explicitly teach wherein the PDCP PDU further includes a PDCP header when the PDCP payload is a complete PDCP SDU, a first segment of a PDCP SDU or a middle segment of the PDCP SDU; and wherein the PDCP PDU does not include a PDCP header when the PDCP payload is a last segment of the PDCP SDU.
Ho teaches wherein the PDCP PDU further includes a PDCP header when the PDCP payload is a complete PDCP SDU, a first segment of a PDCP SDU or a middle segment of the PDCP SDU; and wherein the PDCP PDU does not include a PDCP header when the PDCP payload is a last segment of the PDCP SDU (fig. 6, and (column 8 row 60 to column 9 row 12: FIG. 6 is a conceptual diagram illustrating an example of a PDCP PDU. In the example, a PDCP PDU 600 includes a PDCP header 602 and a PDCP payload 604. The PDCP payload 604 includes three PDCP SDUs 606. ... The header 602 also includes a serial number (SN) field 612 which indicates the SN for the first PDCP SDU 606 in the payload 604 ... If the E field 610 is set, then an LI indicator 614 is present for the corresponding PDCP SDU 606. If the E field 610 is not set, then the corresponding PDCP SDU 606 is the last SDU in the payload 604).
It would have been obvious to one having ordinary skill in the art before the effective filing date to add the teaching of Ho to the teaching of Ma and Kim. The motivation for such an addition would be
to optimize headers for efficient processing of data packets (column 1 row 15-20, Ho).
Regarding to claim 4,
Ma and Kim and Ho teach the method for speeding up packet processing as claimed in claim 3, Ma does not explicitly teach wherein the PDCP process further comprises:
encrypting the PDCP payload when the PDCP payload is a complete PDCP SDU, a first segment of a PDCP SDU or a middle segment of the PDCP SDU.
Kim teaches wherein the PDCP process further comprises: encrypting the PDCP payload when the PDCP payload is a complete PDCP SDU, a first segment of a PDCP SDU or a middle segment of the PDCP SDU (FIG 1GA).
It would have been obvious to one having ordinary skill in the art before the effective filing date to add the teaching of Kim to the teaching of Ma and Ho. The motivation for such an addition would be
to improve a data processing speed of a reception node ([0223] Kim).
Claims [10-11] (apparatus) are rejected under the same reasoning as claims [3-4] (method), where Ma teaches both device and method (Ma [0002]).
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VAN T NGUYEN whose telephone number is (571)272-6178. The examiner can normally be reached 8:00 AM - 5:00 PM (EST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ayman A Abaza can be reached at (571) 270-0422. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VAN TA NGUYEN/Examiner, Art Unit 2465
/YEE F LAM/Primary Examiner, Art Unit 2465
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