Prosecution Insights
Last updated: July 17, 2026
Application No. 18/736,226

TECHNIQUES FOR ACCELERATING QUERIES USING MULTIPLE GRAPHICS PROCESSING UNITS

Final Rejection §103
Filed
Jun 06, 2024
Examiner
ELLIS, MATTHEW J
Art Unit
2152
Tech Center
2100 — Computer Architecture & Software
Assignee
Microsoft Technology Licensing, LLC
OA Round
3 (Final)
69%
Grant Probability
Favorable
4-5
OA Rounds
1y 4m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allowance Rate
222 granted / 322 resolved
+13.9% vs TC avg
Strong +31% interview lift
Without
With
+31.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
12 currently pending
Career history
346
Total Applications
across all art units

Statute-Specific Performance

§101
3.9%
-36.1% vs TC avg
§103
88.5%
+48.5% vs TC avg
§102
5.4%
-34.6% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 322 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA and is in response to communications filed on 3/27/2026 in which claims 1, 3-10, 12-16, and 18-25 are presented for examination. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3-10, 12-16, and 18-24 are rejected under 35 U.S.C. 103 as being unpatentable over Chowdhury et al. US 20060218123 A1 (hereinafter referred to as “Chowdhury”) in view of Kim et al. US 10089705 B2 (hereinafter referred to as “Kim”) and further in view of Kalamkar et al. US 20180293492 A1 (hereinafter referred to as “Kalamkar”). As per claim 1, Chowdhury teaches: A device for utilizing multiple graphics processing units (GPUs) to accelerate a database query, comprising: one or more memories storing instructions; and one or more processors coupled to the one or more memories and configured to execute the instructions to: receive a database query requesting data operations on a database (Chowdhury, [0018] – Receiving a query specifying a join of two or more database tables); … … Although Chowdhry teaches parallel processing using processors, Chowdhury doesn’t go into detail about loading data from the database into multiple GPUs load, based on the database query, data from the database into memories of multiple GPUs for parallel processing by the multiple GPUs (Kim, column 2, lines 18-25 – A large-scale graph processing method using GPUs according to another aspect of the present invention includes: a system Initialization step of loading graph data, generating a GPU stream for processing the loaded graph data. Column 10, lines 45-49 – In a multi-GPU environment, different GPUs process different pieces of page data using a hash function); execute, via parallel processing on the multiple GPUs, a compute process for the database query to perform data processing related to the database query (Kim, column 8, lines 33-42 – According to the embodiment of the present invention, a cache manager 130 that confirms whether there is the topology page requiring search in the device memory through caching at the time of executing a targeted query algorithm is included). It would have been obvious for one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Chowdhury’s invention in view of Kim in order to include GPUs; this is a simple substation of general computing components and advantageous because processing can be performed at a higher speed due to the high throughput of the GPU, unlike the CPU (Kim, column 1, lines 36-38). Although Chowdhury as modified with Kim teaches parallel processing with multiple GPUs, Chowdhury as modified doesn’t explicitly teach that a library is used for the primitive operations and that the GPUs can communicate amongst themselves by loading data into one another, however, Kalamkar teaches: move, from one of the multiple GPUs and, using a primitive operation of a library for communicating among the multiple GPUs (Kalamkar, [0142] – The machine learning framework 604 can provide a library of machine learning primitives), at least a portion of the data loaded into a memory for one of the multiple GPUs into a memory for a different one of the multiple GPUs (Kalamkar, fig. 4A – Shows GPUs communicating amongst themselves. [0085] – GPUs 410-413 are interconnected over high-speed links 444-445); and It would have been obvious for one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Chowdhury’s invention as modified in view of Kalamkar in order to include a library of machine learning primitives; this is advantageous because the machine learning application can be configured to perform the necessary computations using the primitives provided by the machine learning framework rather than be required to create and optimize the main computational logic associated with the machine learning algorithm, then re-optimize the computational logic as new parallel processors are developed (Kalamkar, [0142]). As per claim 3, Chowdhury as modified teaches: The device of claim 2, wherein the primitive operation includes a broadcast operation to copy data from a memory of one of the multiple GPUs to the memories of all of the multiple GPUs (Kalamkar, [0211] – NCCL provides communication routines such as all-gather, reduce, and broadcast to accelerate multi-GPU machine learning training across multiple GPGPUs). As per claim 4, Chowdhury as modified teaches: The device of claim 2, wherein the primitive operation includes an all-gather operation to copy data from each memory of each of the multiple GPUs to the memories of all of the multiple GPUs (Kalamkar, [0199] – The back propagation 1428 can also include Allgather 1413 and Alltoall 1414 communication operations. For the Allgather operation 1413 data is gathered from all tasks and the combined data is distributed to all tasks). As per claim 5, Chowdhury as modified teaches: The device of claim 2, wherein the primitive operation includes an all-to-all operation to move data from a first memory of first one of the multiple GPUs to a second memory of a second one of the multiple GPUs, wherein the primitive operation is operated based on a partition key (Kalamkar, [0197] – Hybrid parallelism can be performed in which a partitioning is performed across activations and weights to minimize skewed matrices. For a layer of a neural network, the input data 1402, weight data 1404, and/or activation data 1406 is partitioned and distributed across multiple compute nodes (e.g., Node 0-Node 3). [0199] – For the Alltoall operation 1414 data from all processes is transferred to all processes.). As per claim 6, Chowdhury as modified teaches: The device of claim 1, wherein the compute process is one of a join operation, an existence operation, or a groupby operation of the database query (Chowdhury, [0051] – Existence scan. [0127] – Join and groupby operations). As per claim 7, Chowdhury as modified teaches: The device of claim 1, wherein the one or more processors are configured to execute the instructions to output, based on executing the compute process, a query output including data processed by the multiple GPUs (Chowdhury, [0157] – The output from the parallel scheduler 620 is a best operator tree with its schedule that is used by the code generator 604 as the basis for generating the query execution plan). As per claim 8, Chowdhury as modified teaches: The device of claim 1, further comprising the multiple GPUs interconnected using a high-bandwidth link (Kalamkar, [0179] – The parallel processors and GPGPUs described herein can each implement various techniques to reduce the overhead of distributed training, including techniques to enable high bandwidth GPU-to-GPU data transfer and accelerated remote data synchronization). As per claim 9, Chowdhury as modified teaches: The device of claim 1, further comprising at least one GPU, wherein the multiple GPUs include the at least one GPU interconnected with at least another GPU of at least one other device using a high-bandwidth network link (Kalamkar, [0179] – The parallel processors and GPGPUs described herein can each implement various techniques to reduce the overhead of distributed training, including techniques to enable high bandwidth GPU-to-GPU data transfer and accelerated remote data synchronization). As per claim 24, Chowdhury as modified teaches: The device of claim 1, wherein the database is a relational database, and wherein data is row and column data from the relational database (Chowdhury, [0082] – A relational database is a collection of data items organized as a set of formally-described tables from which data can be accessed or reassembled in many different ways without having to reorganize the database tables. Each table (which is sometimes called a relation) contains one or more data categories in columns. [0108] – Each table itself comprises one or more "rows" or "records"). Claims 10, 15, and 21 are directed to a computer-implemented method performing steps recited in claims 1, 6-7 with substantially the same limitations. Therefore, the rejections made to claims 1, 6-7 are applied to claims 10, 15, and 21. Claims 16, 20, and 23 are directed to a non-transitory computer-readable medium performing steps recited in claims 1, 6-7 with substantially the same limitations. Therefore, the rejections made to claims 1, 6-7 are applied to claims 16, 20, and 23. Claims 12-14, 22 are directed to a computer-implemented method performing steps recited in claims 3-5 with substantially the same limitations. Therefore, the rejections made to claims 3-5 are applied to claims 12-14, 22. Claims 18-19 are directed to a computer-implemented method performing steps recited in claims 3 and 5 with substantially the same limitations. Therefore, the rejections made to claims 3 and 5 are applied to claims 18-19. Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Chowdhury in view of Kim in view of Kalamkar and further in view of Furlan et al. US 20230116106 A1 (hereinafter referred to as “Furlan”). As per claim 25, Chowdhury as modified doesn’t explicitly teach a graph database with specific data, however, Vemuri teaches: The device of claim 1, wherein the database is a graph database (Furlan, [0032] – Variety of graph databases to identify and facility asset interchanges), and wherein data is vector and edge data from the graph database (Furlan, [0032] – A graph database of first users and second users can be generated, with the users represented by nodes and edges in the graph database indicating potential interchanges of assets between a user in the first group and a user in the second group). It would have been obvious for one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify Chowdhury’s invention as modified in view of Furlan in order to include a graph database with vector and edge data; this is advantageous because it allows the system to identify and facility asset interchanges (Furlan, [0032]). Response to Arguments Applicant’s arguments filed 3/27/2026 have been fully considered but they are not persuasive. Applicant’s arguments begin on page 6 of Remarks where there is one specific argument which is addressed below. Argument: Applicant argues in Remarks on page 7, Kalamkar fails to disclose or suggest at least "move, from one of the multiple GPUs and using a primitive operation of a library for communicating among the multiple GPUs, at least a portion of the data loaded into a memory for one of the multiple GPUs into a memory for a different one of the multiple GPUs," as recited in independent claim 1, where the data is "data from the database" that is "load[ed], based on the database query." In Response: one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Kalamkar is used for one portion of the claimed limitations, and Kim is used to teach the other part. Taking the rejection in full context reveals that the reasoning for combining these references addresses the shortcomings of the individual references, but the references are combined to fill in the gaps. This will be described below: Kim teaches in column 2, lines 18-25 – A large-scale graph processing method using GPUs according to another aspect of the present invention includes: a system Initialization step of loading graph data, generating a GPU stream for processing the loaded graph data. Column 10, lines 45-49 – In a multi-GPU environment, different GPUs process different pieces of page data using a hash function. Although Chowdhury as modified with Kim teaches parallel processing with multiple GPUs, Chowdhury as modified doesn’t explicitly teach that a library is used for the primitive operations and that the GPUs can communicate amongst themselves by loading data into one another, however, Kalamkar is brought in to teach the library as well as communication among multiple GPUs explicitly. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: De Castro et al. US 20160085810 A1 teaches in [0069], Map-Reduce, which is a framework for processing parallelizable problems involving huge datasets using a large number of computing machines (nodes). Kamath et al. US 9971808 B2 teaches column 5, lines 5-15, aggregate query processing in columnar databases by utilizing the parallel processing abilities of a GPU to process group by/aggregate queries. Becerra et al. US 9189519 B2 teaches in Abstract, efficiently executing database queries using a computing device that includes a central processing unit (CPU) and a processing unit based on single instruction multiple thread (SIMT) architecture, for example, a GPU Ren et al. US 11294931 B1 teaches in column 18, lines 1-12 – A graphics processor may implement a number of graphics primitive operations in a way that makes executing them much faster than drawing directly to the screen with a host central processing unit (CPU). Graphics rendering may, at least in part, be implemented by program instructions for execution on one of, or parallel execution on two or more of, such GPUs. The GPU(s) may implement one or more application programmer interfaces (APIs) that permit programmers to invoke the functionality of the GPU(s) DeWitt, David J., et al. Practical skew handling in parallel joins. University of Wisconsin-Madison Department of Computer Sciences, 1992. https://minds.wisconsin.edu/bitstream/handle/1793/59626/TR1098.pdf?sequence=1 THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to Matthew J. Ellis whose telephone number is (571)270-3443. The examiner can normally be reached on Monday-Friday 8AM-5PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kavita Stanley can be reached at (571) 272-8352. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. May 21, 2026 /MATTHEW J ELLIS/Primary Examiner, Art Unit 2152
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Prosecution Timeline

Show 4 earlier events
Sep 09, 2025
Response Filed
Dec 04, 2025
Non-Final Rejection mailed — §103
Feb 23, 2026
Interview Requested
Mar 12, 2026
Applicant Interview (Telephonic)
Mar 13, 2026
Examiner Interview Summary
Mar 27, 2026
Response Filed
May 27, 2026
Final Rejection mailed — §103
Jul 13, 2026
Interview Requested

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Prosecution Projections

4-5
Expected OA Rounds
69%
Grant Probability
99%
With Interview (+31.3%)
3y 5m (~1y 4m remaining)
Median Time to Grant
High
PTA Risk
Based on 322 resolved cases by this examiner. Grant probability derived from career allowance rate.

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