DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. Claims 1–20 are presented for examination in the non-provisional application filed on Jun. 7, 2024.
Drawings
3. The drawings were received on 06/07/2024 (in the filings). These drawings are acceptable.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
4. Claims 1–20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
5. As to independent claim 1, the claim recites:
“recursively processing the graph representation of the quantum algorithm to determine a resource count associated with the quantum algorithm, the resource count indicative of occurrence of one or more quantum resources in the quantum algorithm..”
As to independent claims 12 and 19, they recite similar language of commensurate scope as claim 1.
These limitations, as currently drafted and within their respective claim, represent processes that, under a broadest reasonable interpretation, covers performance in the mind (including observation, evaluation, judgment, opinion, etc.) but for the recitation of generic computer components.
That is, other than reciting the use of
“one or more classical processors; one or more qubits; and one or more non-transitory, computer-readable media” (claim 1), and
“one or more non-transitory, computer-readable media storing instructions” (claim 19),
to perform these steps, nothing in the claim element precludes the step from practically being performed in the mind or using pencil and paper (see MPEP 2106.04(a)(2) – Examples of Concepts The Courts Have Identified As Abstract Ideas, discussing abstract ideas or concepts relating to organizing or analyzing information in a way that can be performed mentally or is analogous to human mental work).
For example, but for the use of generic computers,
the performance of these steps in the context of the claims reasonably encompasses the user mentally and/or manually performing the steps of mentally
1) mentally processing the graph representation of the quantum algorithm to determine a resource count.
If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application (under Prong Two of Step 2A)
(I) Generic Computing Device
For instance, claim 1 recites the additional element of
“one or more classical processors; one or more qubits; and one or more non-transitory, computer-readable media,” and
claim 19 recites the additional element of
“one or more non-transitory, computer-readable media storing instructions”
that perform these steps.
These computer components, functionalities, and/or services are all recited at a high-level of generality (i.e., as a generic computing device performing a generic computer function of processing and outputting data) such that it amounts no more than mere instructions to apply the exception using a generic computer components such as processors, basic processor instructions and/or software components or programs.
Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
(II) Data Collection
As presented, the claims also include the additional element of:
(a) “obtaining a graph representation of a quantum algorithm to be executed at least in part using the one or more qubits of the quantum computing system, the graph representation comprising a graph data structure comprising a plurality of nodes and one or more edges between the plurality of nodes.”
However, merely obtaining or receiving data or input for processing (or other uses) simply does not “integrate” the abstract idea into a practical application which improves the functioning of a computer or other technology or technological field.
Moreover, the courts have also held that limitations which merely adds insignificant extra-solution activity to the judicial exception does not integrate a judicial exception into a practical application.
As discussed below and set forth in MPEP § 2106.05(g), the mere collection and receiving of information for processing essentially amounts to data gathering and storing (using processors, basic processor instructions and/or software components or programs) and therefore is consider an “insignificant extra-solution activity.”
Accordingly, the additional elements of the claims, viewed individually and as an ordered combination, added nothing to the implementation of a mental process on an unspecified, “generic” computer and therefore failed to transform the abstract idea nature of the claims into a patent-eligible application.
(III) Particular Technological Environment or Field Of Use
As shown above, the claims also include the elements of:
(1) “a graph representation of a quantum algorithm to be executed at least in part using the one or more qubits of the quantum computing system,”
(2) “a resource count associated with the quantum algorithm … indicative of occurrence of one or more quantum resources in the quantum algorithm.”
These exemplary elements however merely describes the general technical or computing environment (within which the claimed steps or processes operate) and restrict the processed information or data to a particular type or category (without imposing any functional claim limitations, activities, or steps).
Limitations that generally link the use of the judicial exception to a particular technological environment or field of use, neither meaningfully limit the claim nor transform (the abstract idea nature of) the claim to a particular useful application to improve the functioning of a computer or any other technology.
Under Step 2B of the 101 analysis:
The claims do not include additional elements, alone or in combination, that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements amount to no more than generic computing components and field of use/technological environment which do not amount to significantly more than the abstract idea.
As claimed, the “one or more classical processors; one or more qubits; and one or more non-transitory, computer-readable media” and “one or more non-transitory, computer-readable media storing instructions” performing these steps merely encompasses generic computing components (e.g. processors) recited at a high-level of generality, executing one or more steps of the claims.
Moreover, the activity of “mere data gathering” have also been found by the courts to be “insignificant extra-solution activity” as set forth in MPEP 2106.05(g)(3) Insignificant Extra-Solution Activity, describing that in determining whether an additional element is insignificant extra-solution activity, one may factoring into consideration whether the limitation amounts to necessary data gathering and outputting, (i.e., all uses of the recited judicial exception require such data gathering or data output).
As recited, the steps of
(a) “obtaining a graph representation of a quantum algorithm to be executed at least in part using the one or more qubits of the quantum computing system, the graph representation comprising a graph data structure comprising a plurality of nodes and one or more edges between the plurality of nodes”
is/are mere data gathering activities for additional processing (to obtaining or receiving inputs for processing).
Accordingly, the additional step(s) or element(s) of the claims, viewed individually and as an ordered combination, added nothing to the implementation of a mental process on an unspecified, “generic” computer and therefore failed to transform the abstract idea nature of the claims into a patent-eligible application.
6. As to dependent claims 2–11, 13–18 and 20, each of these claims either (1) recites additional step(s) that covers performance in the mind; or (2) merely restricts or links the process step, information or data to a particular type, technological environment, or field of use; (3) amounts to insignificant extra-solution activity to the judicial exception such as data input and output/transmission; or (4) recites a function which amounts to no more than a recitation of the words “apply it” (or an equivalent) and is no more than mere instructions to implement an abstract idea or other exception on a computer; and thus as a whole is also directed and confined to the same process set forth in claims 1, 12, and 19. Therefore, these claims do not individually or collectively add an inventive concept or additional element(s) amounting to significantly more than the abstract idea itself. These claims are therefore not drawn to eligible subject matter as they are directed to an abstract idea without significantly more.
For instance, dependent claim 2, reciting “wherein recursively processing the graph representation of the quantum algorithm to determine the resource count associated with the quantum algorithm comprises, for each node of the plurality of nodes:
obtaining an intermediate resource count associated with one or more child nodes of the node;
determining that the node comprises a quantum resource of the resource count;
in response to determining that the node comprises the quantum resource of the resource count, incrementing the intermediate resource count; and
providing the intermediate resource count as the resource count,” merely recites additional step(s) that covers performance in the mind and further includes additional step(s) amounting to insignificant extra-solution activity to the judicial exception such as data input
Dependent claim 3, reciting “wherein the node is a leaf node, and wherein obtaining an intermediate resource count associated with one or more child nodes of the node comprises:
determining that the node is a leaf node; and
in response to determining that the node is a leaf node, obtaining an intermediate resource count of zero,” also merely recites additional step(s) that covers performance in the mind and further restricts or links the process step, information or data to a particular type, technological environment, or field of use.
Dependent claim 4, reciting “wherein the node is a root node,” merely restricts or links the process step, information or data to a particular type, technological environment, or field of use.
Dependent claim 5, reciting “wherein the node is an internal node” merely restricts or links the process step, information or data to a particular type, technological environment, or field of use.
Dependent claim 6, reciting “wherein the node is selected as an initial node for recursive processing,” merely recites additional step(s) that covers performance in the mind and further restricts or links the process step, information or data to a particular type, technological environment, or field of use.
Dependent claim 7, reciting “wherein the plurality of nodes comprise quantum operations and wherein the one or more edges between the plurality of nodes comprise data dependencies between the quantum operations,” merely restricts or links the process step, information or data to a particular type, technological environment, or field of use.
Dependent claim 8, reciting “wherein each quantum operation in the quantum algorithm is immutable and hashable,” merely restricts or links the process step, information or data to a particular type, technological environment, or field of use.
Dependent claim 9, reciting “wherein one or more attributes are associated with each of the plurality of nodes; and wherein the one or more quantum resources comprises the one or more attributes,” merely restricts or links the process step, information or data to a particular type, technological environment, or field of use.
Dependent claim 10, reciting “wherein the one or more attributes associated with a node comprise one or more of: symbolic attributes; tensor representation of an action associated with the node; a resource count; an input type; an output type; or a user-defined property,” merely restricts or links the process step, information or data to a particular type, technological environment, or field of use.
Dependent claim 11, reciting “wherein the resource count comprises at least one of a T count, a Clifford count, or a qubit count,” merely restricts or links the process step, information or data to a particular type, technological environment, or field of use.
As to dependent claims 13–18, and 20, they are the corresponding method and computer program product claims correspond to at least one of claims 2–11. Therefore, these claims do not individually or collectively 1) integrated the abstract idea into a practical application, nor do they 2) include additional element(s) amounting to significantly more than the abstract idea itself.
Examiner’s Remarks
7. Examiner refers to and explicitly cites particular pages, sections, figures, paragraphs or columns and lines in the references as applied to Applicant’s claims to the extent practicable to streamline prosecution.
Although the cited portions of the references are representative of the best teachings in the art and are applied to meet the specific limitations of the claims, other uncited but related teachings of the references may be equally applicable as well. It is respectfully requested that, in preparing responses to the rejections, the Applicant fully considers not only the cited portions of the references, but also the references in their entirety, as potentially teaching, suggesting or rendering obvious all or one or more aspects of the claimed invention.
Abbreviations
8. Where appropriate, the following abbreviations will be used when referencing Applicant’s submissions and specific teachings of the reference(s):
i. figure / figures: Fig. / Figs.
ii. column / columns: Col. / Cols.
iii. page / pages: p. / pp.
References Cited
9. (A) Naveh et al., US 2023/0196153 A1 (“Naveh”).
(B) Wehrmeister et al., US 2009/0132488 A1 (“Wehrmeister”).
(C) Dalzell et al., US 2024/0144066 A1 (“Dalzell”).
Notice re prior art available under both pre-AIA and AIA
10. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
A.
11. Claims 1–20 are rejected under 35 U.S.C. 103 as being unpatentable over (A) Naveh in view of (B) Wehrmeister.
See “References Cited” section, above, for full citations of references.
12. Regarding claim 1, (A) Naveh teaches/suggests the invention substantially as claimed, including:
“A quantum computing system, comprising:
one or more classical processors;
one or more qubits; and
one or more non-transitory, computer-readable media storing instructions that, when implemented, cause the one or more classical processors to perform operations, the operations comprising”
(¶ 117: Processor 202 may be a Central Processing Unit (CPU), a microprocessor, an electronic circuit, an Integrated Circuit (IC) or the like. Processor 202 may be utilized to perform computations required by Apparatus 200;
¶ 147: computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable storage medium having instructions
stored therein comprises an article of manufacture including instructions which implement aspects of the function/act;
¶ 26: a circuit over n qubits may be a unitary operator Un);
“obtaining a graph representation of a quantum algorithm to be executed at least in part using the one or more qubits of the quantum computing system, the graph representation comprising a graph data structure comprising a plurality of nodes and one or more edges between the plurality of nodes”
(¶ 35: the model of the QC may be based on a directed cycle graph (DAG) representation of the QC. Vertices in the DAG may represent gates and directed edges may represent qubit dependencies;
¶ 109: determination of additional constraints may be made depending on the algorithm implemented by the quantum circuit;
Claim 1: creating a Constraint Satisfaction Problem (CSP) model of a directed cycle graph (DAG) representation of a quantum circuit, the quantum circuit having up to N gates, the DAG representation comprises vertices and edges, the vertices representing gates in the quantum circuit, edges representing qubit dependencies, the CSP model comprises decision variables, domains thereof and constraint on the values of the decision variables).
Naveh do not teach “recursively processing the graph representation of the quantum algorithm to determine a resource count associated with the quantum algorithm, the resource count indicative of occurrence of one or more quantum resources in the quantum algorithm.”
(B) Wehrmeister, in the context of Naveh’s teachings, however teaches or suggests implementing:
“recursively processing the graph representation of the quantum algorithm to determine a resource count associated with the quantum algorithm, the resource count indicative of occurrence of one or more quantum resources in the quantum algorithm.”
(¶ 34: a procedure 300 for computing estimated memory resources required for a query …. Once the initial query plan has been formed, the query plan is traversed by accessing 302 each of the tree nodes, computing 304 the potential memory consumption for the logical operator corresponding to the tree node, and accumulating 306 the potential memory consumption for the nodes. Once the entire query plan tree has been traversed 308, then the accumulated total of potential memory consumptions may be output 310 as the estimated memory resource (EMR) required for the query plan;
¶ 35: the query plan is traversed by accessing 3 22 each of the tree nodes, computing 324 the estimated work for the logical operator corresponding to the tree node, and accumulating 3 26 the estimated work for the nodes. Once the entire query plan tree has been traversed 328, then the accumulated total of estimated work may be output 330 as the estimated CPU resource (ECR) required for the query plan.)
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of (B) Wehrmeister with those of (A) Naveh to traverse the directed cycle graph (DAG) representation of the quantum circuit to obtain estimates of resource required to execute the circuit. The motivation or advantage to do so is optimize the use of available resources of the Quantum Execution Platform.
13. Regarding claim 2, Naveh and Wehrmeister, in combination, teach or suggest:
“wherein recursively processing the graph representation of the quantum algorithm to determine the resource count associated with the quantum algorithm comprises, for each node of the plurality of nodes:
obtaining an intermediate resource count associated with one or more child nodes of the node;
determining that the node comprises a quantum resource of the resource count;
in response to determining that the node comprises the quantum resource of the resource count, incrementing the intermediate resource count; and
providing the intermediate resource count as the resource count”
(Naveh, ¶ 35: the model of the QC may be based on a directed cycle graph (DAG) representation of the QC. Vertices in the DAG may represent gates and directed edges may represent qubit dependencies;
¶ 109: determination of additional constraints may be made depending on the algorithm implemented by the quantum circuit;
Claim 1: creating a Constraint Satisfaction Problem (CSP) model of a directed cycle graph (DAG) representation of a quantum circuit, the quantum circuit having up to N gates, the DAG representation comprises vertices and edges, the vertices representing gates in the quantum circuit, edges representing qubit dependencies, the CSP model comprises decision variables, domains thereof and constraint on the values of the decision variables;
Wehrmeister, ¶ 34: a procedure 300 for computing estimated memory resources required for a query …. Once the initial query plan has been formed, the query plan is traversed by accessing 302 each of the tree nodes, computing 304 the potential memory consumption for the logical operator corresponding to the tree node, and accumulating 306 the potential memory consumption for the nodes. Once the entire query plan tree has been traversed 308, then the accumulated total of potential memory consumptions may be output 310 as the estimated memory resource (EMR) required for the query plan;
¶ 35: the query plan is traversed by accessing 3 22 each of the tree nodes, computing 324 the estimated work for the logical operator corresponding to the tree node, and accumulating 3 26 the estimated work for the nodes. Once the entire query plan tree has been traversed 328, then the accumulated total of estimated work may be output 330 as the estimated CPU resource (ECR) required for the query plan).
14. Regarding claim 3, Wehrmeister teaches or suggests:
“… determining that the node is a leaf node; and in response to determining that the node is a leaf node, obtaining an intermediate resource count of zero”
(¶¶ 34 and 35, as applied in rejecting claim 1 above;
Fig. 3A and 3B, illustrating the steps of “Compute estimated work for logical operator corresponding to tree node” and “Add estimated work to accumulated total” is executed following the step of “Access next tree node” (which would not occur if the tree node is a leaf node)).
15. Regarding claim 4, Wehrmeister teaches or suggests:
“wherein the node is a root node”
(¶ 34: a procedure 300 for computing estimated memory resources required for a query …. Once the initial query plan has been formed, the query plan is traversed by accessing 302 EACH OF THE TREE NODES, computing 304 the potential memory consumption for the logical operator corresponding to the tree node, and accumulating 306 the potential memory consumption for the nodes. Once the entire query plan tree has been traversed 308, then the accumulated total of potential memory consumptions may be output 310 as the estimated memory resource (EMR) required for the query plan;
¶ 35: the query plan is traversed by accessing 3 22 each of the tree nodes, computing 324 the estimated work for the logical operator corresponding to the tree node, and accumulating 3 26 the estimated work for the nodes. Once the entire query plan tree has been traversed 328, then the accumulated total of estimated work may be output 330 as the estimated CPU resource (ECR) required for the query plan).
16. Regarding claim 5, Wehrmeister teaches or suggests:
“wherein the node is an internal node”
(¶ 34: a procedure 300 for computing estimated memory resources required for a query …. Once the initial query plan has been formed, the query plan is traversed by accessing 302 EACH OF THE TREE NODES, computing 304 the potential memory consumption for the logical operator corresponding to the tree node, and accumulating 306 the potential memory consumption for the nodes. Once the entire query plan tree has been traversed 308, then the accumulated total of potential memory consumptions may be output 310 as the estimated memory resource (EMR) required for the query plan;
¶ 35: the query plan is traversed by accessing 3 22 each of the tree nodes, computing 324 the estimated work for the logical operator corresponding to the tree node, and accumulating 3 26 the estimated work for the nodes. Once the entire query plan tree has been traversed 328, then the accumulated total of estimated work may be output 330 as the estimated CPU resource (ECR) required for the query plan).
17. Regarding claim 6, Wehrmeister teaches or suggests:
“wherein the node is selected as an initial node for recursive processing”
(¶ 34: a procedure 300 for computing estimated memory resources required for a query …. Once the initial query plan has been formed, the query plan is traversed by accessing 302 EACH OF THE TREE NODES, computing 304 the potential memory consumption for the logical operator corresponding to the tree node, and accumulating 306 the potential memory consumption for the nodes. Once the entire query plan tree has been traversed 308, then the accumulated total of potential memory consumptions may be output 310 as the estimated memory resource (EMR) required for the query plan;
¶ 35: the query plan is traversed by accessing 3 22 each of the tree nodes, computing 324 the estimated work for the logical operator corresponding to the tree node, and accumulating 3 26 the estimated work for the nodes. Once the entire query plan tree has been traversed 328, then the accumulated total of estimated work may be output 330 as the estimated CPU resource (ECR) required for the query plan;
The Examiner notes that initial node is the top-level node of the tree or the first vertex of the DAG).
18. Regarding claim 7, Naveh teaches or suggests:
“wherein the plurality of nodes comprise quantum operations and wherein the one or more edges between the plurality of nodes comprise data dependencies between the quantum operations”
(¶ 35: the model of the QC may be based on a directed cycle graph (DAG) representation of the QC. Vertices in the DAG may represent gates and directed edges may represent qubit dependencies;
¶ 34: the quantum circuit may comprise a list of gates or unitary ‘operation’ done in sequential order. Each decision variable in the model may correspond to an operation to be executed in order;
¶ 109: determination of additional constraints may be made depending on the algorithm implemented by the quantum circuit;
Claim 1: creating a Constraint Satisfaction Problem (CSP) model of a directed cycle graph (DAG) representation of a quantum circuit, the quantum circuit having up to N gates, the DAG representation comprises vertices and edges, the vertices representing gates in the quantum circuit, edges representing qubit dependencies, the CSP model comprises decision variables, domains thereof and constraint on the values of the decision variables).
19. Regarding claim 9, Naveh and Wehrmeister, in combination, teach or suggest:
“wherein one or more attributes are associated with each of the plurality of nodes; and wherein the one or more quantum resources comprises the one or more attributes”
(Naveh, ¶ 35: the model of the QC may be based on a directed cycle graph (DAG) representation of the QC. Vertices in the DAG may represent gates and directed edges may represent qubit dependencies;
¶ 109: determination of additional constraints may be made depending on the algorithm implemented by the quantum circuit;
Claim 1: creating a Constraint Satisfaction Problem (CSP) model of a directed cycle graph (DAG) representation of a quantum circuit, the quantum circuit having up to N gates, the DAG representation comprises vertices and edges, the vertices representing gates in the quantum circuit, edges representing qubit dependencies, the CSP model comprises decision variables, domains thereof and constraint on the values of the decision variables;
Wehrmeister, ¶ 34: a procedure 300 for computing estimated memory resources required for a query …. Once the initial query plan has been formed, the query plan is traversed by accessing 302 each of the tree nodes, computing 304 the potential memory consumption for the logical operator corresponding to the tree node, and accumulating 306 the potential memory consumption for the nodes. Once the entire query plan tree has been traversed 308, then the accumulated total of potential memory consumptions may be output 310 as the estimated memory resource (EMR) required for the query plan;
¶ 35: the query plan is traversed by accessing 3 22 each of the tree nodes, computing 324 the estimated work for the logical operator corresponding to the tree node, and accumulating 3 26 the estimated work for the nodes. Once the entire query plan tree has been traversed 328, then the accumulated total of estimated work may be output 330 as the estimated CPU resource (ECR) required for the query plan).
20. Regarding claim 10, Wehrmeister teaches or suggests:
“wherein the one or more attributes associated with a node comprise one or more of: symbolic attributes; tensor representation of an action associated with the node; a resource count; an input type; an output type; or a user-defined property”
(¶ 34: a procedure 300 for computing estimated memory resources required for a query …. Once the initial query plan has been formed, the query plan is traversed by accessing 302 each of the tree nodes, computing 304 the potential memory consumption for the logical operator corresponding to the tree node, and accumulating 306 the potential memory consumption for the nodes. Once the entire query plan tree has been traversed 308, then the accumulated total of potential memory consumptions may be output 310 as the estimated memory resource (EMR) required for the query plan;
¶ 35: the query plan is traversed by accessing 3 22 each of the tree nodes, computing 324 the estimated work for the logical operator corresponding to the tree node, and accumulating 3 26 the estimated work for the nodes. Once the entire query plan tree has been traversed 328, then the accumulated total of estimated work may be output 330 as the estimated CPU resource (ECR) required for the query plan.)
21. Regarding claims 12–17, they are the corresponding method claims reciting similar limitations of commensurate scope as the system of claims 1–3, 6–7 and 9, respectively. Therefore, they are rejected on the same basis as claims 1–3, 6–7 and 9 above.
22. Regarding claims 19–20, they are the corresponding computer program product claims reciting similar limitations of commensurate scope as the system of claims 1–2, respectively. Therefore, they are rejected on the same basis as claims 1–2 above.
B.
23. Claims 11 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over (A) Naveh in view of (B) Wehrmeister, as applied to claims 1 and 12 above, and further in view of (C) Dalzell.
24. Regarding claim 11, Naveh and Wehrmeister do not teach “wherein the resource count comprises at least one of a T count, a Clifford count, or a qubit count.”
(C) Dalzell, in the context of Naveh and Wehrmeister’s teachings, however teaches or suggests:
“wherein the resource count comprises at least one of a T count, a Clifford count, or a qubit count”
(¶ 35: resource analysis focuses on three central quantities that determine the overall cost of algorithms implemented on fault-tolerant quantum computers: the number of logical qubits, the total number of T gates (“T-count”), and the number of parallel layers of T gates (“T-depth”) used to construct quantum circuits for solving the problem. The T-depth acts as a proxy for the overall runtime of the algorithm, whereas the T-count and number of logical qubits are helpful for determining how many physical qubits may be used for a full, fault-tolerant implementation. We justify the focus on T gates by pointing out that, in many prominent approaches to fault-tolerant quantum computation, quantum circuits are decomposed into Clifford gates and T gates, and the cost of implementing the circuit is dominated by the number and depth of the T gates).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of (C) Dalzell with those of (A) Naveh and B) Wehrmeister to track the number of T and/or Clifford gates in the quantum circuit/algorithm. The motivation or advantage to do so is to better estimate the overall runtime and (resource) cost of executing the circuit for problem solving.
25. Regarding claim 18, it is the corresponding method claim reciting similar limitations of commensurate scope as the system of claim 11. Therefore, it is rejected on the same basis as claim 11 above.
Allowable Subject Matter
26. Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if 1) rewritten in independent form including all of the limitations of the base claim and any intervening claims, and 2) rewritten to overcome the applied 101 rejections.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
(a) Pinho et al., US 2023/0229514 A1, teaching intelligent orchestration of
classic-quantum computational graphs.
(b) Dou et al., US 2024/0338213 A1, teaching adapting a quantum program to quantum computing platform based on its topological structure..
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN C WU whose telephone number is (571)270-5906. The examiner can normally be reached Monday through Friday, 8:30 A.M. to 5:00 P.M..
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/BENJAMIN C WU/Primary Examiner, Art Unit 2195
September 4, 2026
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