Prosecution Insights
Last updated: April 19, 2026
Application No. 18/736,814

Current Measurement Circuit and Method

Non-Final OA §103§112
Filed
Jun 07, 2024
Examiner
NASIR, TAQI R
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Aptiv Technologies AG
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
99%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
426 granted / 489 resolved
+19.1% vs TC avg
Moderate +13% lift
Without
With
+13.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
49 currently pending
Career history
538
Total Applications
across all art units

Statute-Specific Performance

§101
4.7%
-35.3% vs TC avg
§103
47.2%
+7.2% vs TC avg
§102
26.0%
-14.0% vs TC avg
§112
12.7%
-27.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 489 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Information Disclosure Statement The information disclosure statement (IDS) submitted on 06/07/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 112 3. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding clam 1, lines 9-11 recites “the gain control sub-circuit is configured to select a gain across the operational amplifier based on a ratio between the input connector and the selected current path”. The phrase “ratio between the input connector and the selected current path” is unclear, as it does not specify what quantities are being compared in the ratio. It is ambiguous weather the claimed ratio refers to a resistance, voltage, current ratio or another electrical parameter associated with the input connector and the selected current path. Further, the term “input connector” does not itself have a clearly defined measurable quantity, making it unclear how “a ratio” involving the input connector is determined. As a result, the metes and bounds of claimed “ratio” is unclear. Claim 2-15 stands rejected as being dependent on rejected base claim. Claim Rejections - 35 USC § 103 4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-7, 11-15 are rejected under 35 U.S.C. 103 as being unpatentable over Nakagaki (U.S. Publication 20220268811) in view of Mikuteit (U.S. Publication 20150137820). Regarding claim 1, Nakagaki teaches a current measurement circuit (fig. 2 (7)) comprising: an operational amplifier including two inputs and an output (fig. 2 (23 with two inputs and an output [0029-31])); an input connector for connecting the two inputs across a current-sense resistor (fig. 2 shunt resistor 13 that generates a voltage proportional to current, which is applied to two inputs of 13via resistive connections [0029-31]); a gain control sub-circuit connected to the output and including a switch operable to select a current path from a plurality of current paths (switching elements A18, B20, connected in the output path of the operational amplifier 23 and operable to selected among multiple resistive current paths having different effective resistances [0032-36])); and a measurement output connected to the gain control sub-circuit for outputting a signal indicating a measured current based on a selected current path (current detection circuit 21 that receives the conditioned output signal and outputs a value corresponding to the measure current, which depends on the selected switch state and corresponding path [0036-37, 44-47]), Nakagaki teaches that the gain control sub circuit is configured to adjust the effective gain of the current measurements circuit by selecting different path in order to prevent saturation of the operational amplifier and maintain accuracy [0058-65], but does not explicitly teach wherein the gain control sub-circuit is configured to select a gain across the operational amplifier based on a ratio between the input connector and the selected current path. However, Mikuteit teaches a circuit comprises a battery field-effect transistor (FET) coupled between a battery and an electronic system teaches a current sensing circuit comprises an operational amplifier (fig. 8 816, 832) in which plurality of resistor segments 838 (1-n) form selectable current paths, and switches (840-1-n) selectively include or exclude the resistor segments to change the effective resistance and scaling of the sensed signal [0054-59] further selecting different resistor paths established a resistance ratio that determines the effective gain or scaling of the current measurement, based on operating conditions such as current magnitude, in order to improve accuracy. It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to modify the gain control sub circuit of Nakagaki to implement the selectable current paths using switch controlled resistor segments as taught by Mikuteit, such that the gain across the operational amplifier is selected based on a ratio between the input connector and the selected current path to gain the advantage of providing a defined resistance ratio for gain selection while maintaining accurate current measurement over a wide dynamic range and preventing saturation. PNG media_image1.png 551 581 media_image1.png Greyscale PNG media_image2.png 506 644 media_image2.png Greyscale Regarding claim 2, Nakagaki as modified further teaches the input connector includes an input resistor (fig. 2 (25, 26) [0031]); and the gain control sub-circuit includes a plurality of output resistors (fig. 2 (voltage dividing resistors A17, B19) connected in the output path and selectively engaged by switching elements A18, B20 [0033-36]) and the plurality of current paths connect through one or more of the plurality of output resistors ( fig. 3, the voltage divider resistors A17, B19 are included in current path depending on the state of the switching elements thereby forming multiple selectable current paths [0044-47]). Regarding claim 3, Nakagaki as modified further teaches the gain control sub-circuit includes a high gain current path (multiple operating ranges A-D corresponding o different effective gains depending on the selected current path [0044-47]) and a low gain current path; the low gain current path has lower resistance than the high gain current path (paths including fewer or lower resistance resistors e.g. bypassing voltage dividing resistors produce lower gain, while paths including higher resistance combinations produce higher gain [0044-47, 0058-64]); and the switch is operable to selectively connect the output to one of the high gain current path and the low gain current path (switching elements A18, B20 selectively connect the operational amplifier output to different resistive paths [0032-36]). Regarding claim 4, Nakagaki as modified further teaches controller (fig. 2 21) for controlling the switch (fig. 2 (A18, B20)) based on characteristics indicative of a sensed current amplitude (monitoring the voltage corresponding to the sensed current and used that voltage to determine when to change the switch state [0038-42, 58-59], the monitored voltage is directly indicative of current amplitude through the shunt resistor). Regarding claim 5, Nakagaki as modified further teaches the controller controls the switch based on the characteristics exceeding a threshold (predetermined voltage threshold values (α28, β29, γ30) that trigger switching of the switching elements when the sensed voltage reaches of exceeds the threshold [0038-42]); and the threshold is selected to be indicative of a current amplitude below a saturation amplitude associated with the operational amplifier (the threshold voltage is selected to ensure the operations amplifier output and the current calculation circuit input remain below their maximum allowable voltage and avoid saturation [0040, 58-59]). Regarding claim 6, Nakagaki as modified further teaches wherein the characteristics includes a voltage (current calculation circuit 21 receives a voltage value higher than that before the switching due to decrease in the amount of voltage drop in voltage-dividing circuit 15 while the voltage value is kept less than or equal to the predetermined voltage value (5 V), so that accuracy of a current value calculated by current calculation circuit 21 can be improved. At this time, switching voltage value β29 may be provided with hysteresis for switching stabilization [0038-42]). Regarding claim 7, Nakagaki as modified further teaches wherein the voltage on the output is measured relative to ground (fig. 2 (22) [0029-36]). Regarding claim 11, Nakagaki as modified further teaches the measurement output includes a high gain measurement output and a low gain measurement output (multiple operating ranges A-D, corresponding to different effective gains and resulting output magnitudes depending on the selected current path [0044-47] inherently providing higher and lower gain measurements outputs depending on the selected current path ); and the switch is operable to select a current path for providing a lower gain signal on the low gain measurement output and a current path for providing a higher gain signal on the high gain measurement output (switching elements A18, B20 selectively connect the OP amp 23 output to different resistive paths thereby producing different gain levels at the measurement outputs [0032-36] ). Regarding claim 12, Nakagaki as modified further teaches the gain control sub-circuit includes first and second output resistors connected in series between the output and ground (fig. 2, A17, B19 connected between 23 output and ground); the switch is operable to bypass the first output resistor (fig. 2 A18, B20 selectively include of bypass respective resistive elements thereby altering the effective resistance between output and ground [0032-36]); and the high gain measurement output is connected to ground through the first and second output resistors and the low gain measurement output is connected to ground through the second output resistor (condition when fewer resistors are included in the current path, a lower resistance and gain output is provided and vice versa [0044-47]). Regarding claim 13, Nakagaki as modified further teaches a load driver comprising: the current measurement circuit of claim 1 (“current detector 7 is connected to DC motor 2 to detect a motor current flowing through DC motor 2, and then outputs a current value of the motor current to air volume detector 9” [0018-25] the motor driver and associated circuitry constitute a load driver incorporating the current measurement circuit). Regarding claim 14, Nakagaki as modified further teaches a current protection device comprising: the current measurement circuit of claim 1 (using the sensed current to prevent saturation and protect circuitry by controlling operating conditions based on detected current levels [0058-59]). Regarding claim 15, Nakagaki as modified further teaches a method of controlling the current measurement circuit of claim 1, the method comprising: identifying characteristics exceeding a threshold (predetermined voltage threshold values (α28, β29, γ30) that trigger switching of the switching elements when the sensed voltage reaches of exceeds the threshold [0038-42]), wherein the threshold is selected to be indicative of a current amplitude below a saturation amplitude associated with the operational amplifier (the threshold voltage is selected to ensure the operations amplifier output and the current calculation circuit input remain below their maximum allowable voltage and avoid saturation [0040, 58-59]); and controlling the switch to select a current path for reducing the gain across the operational amplifier (fig. 2 A18, B20 controlled to reduce effective gain when the threshold is exceeded [0058-65]). Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Nakagaki (U.S. Publication 20220268811), Mikuteit (U.S. Publication 20150137820) as applied to the rejection of claim 4 above and further in view of Hehn (U.S. Publication 20050270198). Regarding claim 8, Nagagaki as modified by Mikuteit further teaches wherein the controller includes for comparing a voltage on the measurement output to a threshold (claim 5, 7, 9, 11 [0038-42] compare sense voltage to the measured current against predetermined switching voltage values α28, β29, γ30). Nagagaki as modified by Mikuteit does not explicitly teach a comparator. However, Hehn teaching a circuit for current measurement and current monitoring teaches a comparator circuit fig. 1 (OP5)). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to incorporate comparator of Hehn into the current calculation circuit of Nagagaki as modified to provide threshold-based detection of current conditions to gain the advantage of reduced processing latency and eliminate the need for continues digital current calculation. PNG media_image3.png 546 593 media_image3.png Greyscale Regarding claim 9, Nagagaki as modified by Mikuteit further teaches wherein the controller further includes a voltage follower connected between the measurement output and the comparator for generating an input signal to the comparator based on a voltage on the measurement output (conditioning the voltage output from the signal amplifying circuit before it is processed by the current calculation circuit for threshold comparison and switching control [0036-42]. Providing a buffered or isolated voltage signal prior to comparison). Nagagaki as modified by Mikuteit does not explicitly teach a comparator. However, Hehn teaching a circuit for current measurement and current monitoring teaches a comparator circuit fig. 1 (OP5)). It would have been obvious to a person of ordinary skill in the art, before the effective filing date of the claimed invention to incorporate comparator of Hehn into the current calculation circuit of Nagagaki as modified to provide threshold-based detection of current conditions to gain the advantage of reduced processing latency and eliminate the need for continues digital current calculation. Regarding claim 10, Nagagaki as modified teaches wherein the controller further includes a hysteresis for preventing oscillations of a comparator output (using hysteresis between switching voltage values β29, γ30 to stabilize switching and prevent frequent oscillation of the switching elements due to noise [0041-43] directly corresponds to preventing oscillations of the comparator output controlling switching elements. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Dietz (U.S. Publication 20130214804) discloses CURRENT SENSOR. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAQI R NASIR whose telephone number is (571)270-1425. The examiner can normally be reached 9AM-5PM EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at (571) 270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TAQI R NASIR/Examiner, Art Unit 2858 /LEE E RODAK/Supervisory Patent Examiner, Art Unit 2858
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Prosecution Timeline

Jun 07, 2024
Application Filed
Jan 06, 2026
Non-Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
99%
With Interview (+13.4%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 489 resolved cases by this examiner. Grant probability derived from career allow rate.

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