DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 18 December 2025 have been fully considered but they are not persuasive.
Regarding claim 1, Applicant argues that the claim is allowable because the claim has been amended to claim the allowable subject matter recited in claim 6 and the intermediate limitations of claim 4. However, the examiner respectfully disagrees with this assertion by the applicant.
Claim 4 as previously recited, stated “wherein the first pixel signal is a signal based on charges of at least one photoelectric conversion element of one of the pixels, and the second pixel signal is a signal based on charges of another conversion element of the one pixel” and claim 6 as previously recited stated “wherein the AD converter includes a first AD converter and a second AD converter, and the control unit performs control such that, in a period in which the first AD converter is converting the first pixel signal to a digital signal, the second AD converter starts an operation of converting the second pixel signal to a digital signal.” The only amendment to claim 1 was to claim the first and second AD converters of prior claim 6 (see image below).
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It is clear that there is no mention of “wherein the first pixel signal is a signal based on charges of at least one photoelectric conversion element of one of the pixels, and the second pixel signal is a signal based on charges of another conversion element of the one pixel” as recited in prior claim 4 and “the control unit performs control such that, in a period in which the first AD converter is converting the first pixel signal to a digital signal, the second AD converter starts an operation of converting the second pixel signal to a digital signal” as recited in prior claim 6. While claim 1 requires an operation including holding a second pixel signal in another sample-hold circuit and the second pixel being AD converted by the second AD converter “is started” in the period, the claim does not require “control such that, in a period in which the first AD converter is converting the first pixel signal to a digital signal, the second AD converter starts an operation of converting the second pixel signal to a digital signal” as recited in prior claim 6.
Regarding prior claim 6, figure 8 of Applicant’s specification disclosed the following:
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As shown in figure 8, the “operation of converting the second pixel signal to a digital signal” is started in the “period in which the first AD converter is converting the first pixel signal to a digital signal”
On the contrary, regarding currently amended claim 1, figure 11 of Applicant’s specification disclosed the following:
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As shown in figure 11, the operation “in which a second pixel signal obtained from the pixel become held in another sample- hold circuit, out of the at least three sample-hold circuits and the second pixel signal is AD converted by the second AD converter” is started in “a period in which a first pixel signal obtained from the pixel is held in one sample-hold circuit, out of the at least three sample- hold circuits, and the first pixel signal is AD converted by the first AD converter.” Therefore, it is clear that the scope of amended claim 1 is much broader than claim 6 as previously presented.
In view of the forgoing, the Examiner is not persuaded by Applicant’s argument that claim 1 is allowable because claim 1 “has been amended to include the allowable subject matter recited in claim 6 and claim limitations of the intermediate claim 4”.
Therefore, because claim 1 as currently presented is different in scope than any prior pending claim, new grounds of rejection is proper. The new grounds of rejection are further detailed below.
Applicant argues that claim 10 has been amended to include the allowable subject matter of claim 6. However, claim 10 is a method variant of claim 1 and therefore, applicant’s assertion that the claim incorporates the subject matter of claim 6 is not persuasive for reasons similar to those presented with respect to claim 1.
Therefore, because claim 10 as currently presented is different in scope than any prior pending claim, new grounds of rejection is proper. The new grounds of rejection are further detailed below.
Regarding claim 5, Applicant argues that the claim has been “rewritten as an independent claim that includes the allowable subject matter of the original claim 5 and claim limitations of the base claim 1 and intervening claim 4.”. However, the Examiner respectfully disagrees with this assertion as well.
Claim 5 previously claimed “wherein the AD converter includes a first AD converter and a second AD converter, and the control unit performs control such that the second AD converter performs AD conversion of the first pixel signal while the first AD converter is performing AD conversion of the first pixel signal”. As discussed above with respect to claim 6, this claim as previously presented requires that “the second AD converter performs AD conversion of the first pixel signal while the first AD converter is performing AD conversion of the first pixel signal” (i.e. the A signal AD conversion period needs to overlap the A+B AD conversion period). This operation is shown in figure 8 of Applicant’s specification.
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However, claim 5 has been amended to recite “in a period in which a first pixel signal obtained from the pixel is held in one sample-hold circuit, out of the at least three sample-hold circuits, and the first pixel signal is AD converted by the first and second AD converters, an operation is started in which a second pixel signal obtained from the pixel become held in another sample-hold circuit, out of the at least three sample-hold circuits”. There is now no mention in claim 5 of the second AD converter performing AD conversion of the first pixel signal while the first AD converter is performing AD conversion of the first pixel signal.
Claim 5 as recited now claims that a sample-hold operation of a second signal is started during a period which covers the first signal being held in a first sample-hold circuit, AD converted by the first ADC and AD converted by the second ADC. An example of the claimed “a period” and the correspondingly claimed “operation” is shown in annotated figure 6, below.
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In view of the foregoing, it is clear that claim 5 recites subject matter different from that which was previously presented in claim 5.
Therefore, because claim 5 as currently presented is different in scope than any prior pending claim, new grounds of rejection is proper. The new grounds of rejection are further detailed below.
Claim 12 is a method variant of claim 5 and therefore, the response with respect to claim 5 similarly applies to claim 12.
In view of the foregoing, the pending claims stand rejected as detailed below.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5, 7, 10 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Okada et al. (United States Patent Application Publication 2021/0281784), hereinafter referenced as Okada, in view of Fujii et al. (United States Patent Application Publication 2018/0077337), hereinafter referenced as Fujii, and further in view of Iwane et al. (United States Patent Application Publication 2013/0222631), hereinafter referenced as Iwane.
Regarding claim 1, Okada discloses an image capturing apparatus comprising: a pixel portion in which a plurality of pixels each including photoelectric conversion elements are arranged in a matrix (figure 17 exhibits pixel array section 213 as disclosed at paragraph 53); at least three sample-hold circuits that are arranged with respect to pixel signals output from one pixel (figure 4 exhibits 4 sample and hold circuits 320, 330, 350 and 360 connected to a column line connected to pixel array 213); a voltage-current conversion portion configured to output a difference between two sample-hold circuits, out of the at least three sample-hold circuits, as a current signal (figure 18 exhibits differential conversion circuit 340 which outputs a difference between reset and signal levels of pixel as a current signal as disclosed at paragraph 84); a first AD converter configured to convert an output signal of the voltage-current conversion portion to a digital signal (figure 4 shows that each sample and hold block is connected to an ADC 370 as disclosed at paragraph 63); and at least one processor or circuit (figure 3 exhibits timing control circuit 212 as disclosed at paragraph 55) configured to function as: a control unit configured to perform control such that, in a period in which a first pixel signal obtained from the pixel is held in one sample-hold circuit, out of the at least three sample- hold circuits, and the first pixel signal is AD converted by the first AD converter, an operation is started in which a second pixel signal obtained from the pixel become held in another sample- hold circuit, out of the at least three sample-hold circuits and the second pixel signal is AD converted (figure 21 exhibits timing such that when one pair of sample and hold circuits and holding signals and A/D conversion is performed, the other pair is performing an operation to hold a second pair of pixel signals as disclosed at paragraphs 143 and 144).
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However, Okada fails to disclose that each pixel includes a plurality of photoelectric conversion elements and that the second pixel signal is from the same pixel as the first pixel signal; a second AD converter; and the second pixel signal is AD converted by the second AD converter.
Fujii is a similar or analogous system to the claimed invention as evidenced Fujii teaches an imaging device wherein the motivation of realizing a more diverse data output would have prompted a predictable variation of Okada by applying Fujii’s known principal of providing a second AD converter; and the second pixel signal is AD converted by the second AD converter (figure 8 exhibits wherein each column includes two ADCs per column where a first signal is converted by the first ADC and a second signal is converted by the second ADC as disclosed at paragraph 109).
In view of the motivations such as realizing a more diverse data output one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Okada.
Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention.
Okada in view of Fujii fails to disclose that each pixel includes a plurality of photoelectric conversion elements and that the second pixel signal is from the same pixel as the first pixel signal.
Iwane is a similar or analogous system to the claimed invention as evidenced Iwana teaches an imaging device wherein the motivation of being able to perform both image capturing and phase difference focus detection would have prompted a predictable variation of Okada by applying Iwane’s known principal of providing pixels with two photodiodes and sequentially reading out a single photodiode pixel signal and a combined photodiode pixel signal from a pixel (figure 14 exhibits wherein each pixel has two photodiodes Da11 and Db11 as disclosed at paragraph 57 and figure 16 exhibits timing where a pixel signal corresponding to Da11 is readout in a first period and a pixel signal corresponding to the combination of Da11 and Db11 is readout in a second period as disclosed at paragraphs 66 and 69).
In view of the motivations such as being able to perform both image capturing and phase difference focus detection one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Okada.
Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention.
Regarding claim 2, Okada in view of Fujii and further in view of Iwane discloses the image capturing apparatus according to claim 1, in addition, Okada discloses wherein the control unit causes the at least three sample-hold circuits to hold a reset signal of the pixel (figure 18 exhibits reset sample and hold circuits 320 and 350 which hold reset signals as disclosed at paragraphs 143 and 144 ).
Regarding claim 3, Okada in view of Fujii and further in view of Iwane discloses the image capturing apparatus according to claim 1, in addition, Iwane discloses wherein the first pixel signal is a signal based on charges of at least one photoelectric conversion element of one of the pixels, and the second pixel signal is a signal based on charges of a plurality of photoelectric conversion elements of the one pixel (paragraphs 66 and 69 teach that providing pixels with two photodiodes and sequentially reading out a single photodiode pixel signal and a combined photodiode pixel signal from a pixel (figure 14 exhibits wherein each pixel has two photodiodes Da11 and Db11 as disclosed at paragraph 57 and figure 16 exhibits timing where a pixel signal corresponding to Da11 is readout in a first period and a pixel signal corresponding to the combination of Da11 and Db11 is readout in a second period).
Regarding claim 5, Okada discloses an image capturing apparatus comprising: a pixel portion in which a plurality of pixels each including photoelectric conversion elements are arranged in a matrix (figure 17 exhibits pixel array section 213 as disclosed at paragraph 53); at least three sample-hold circuits that are arranged with respect to pixel signals output from one pixel (figure 4 exhibits 4 sample and hold circuits 320, 330, 350 and 360 connected to a column line connected to pixel array 213); a voltage-current conversion portion configured to output a difference between two sample-hold circuits, out of the at least three sample-hold circuits, as a current signal (figure 18 exhibits differential conversion circuit 340 which outputs a difference between reset and signal levels of pixel as a current signal as disclosed at paragraph 84); a first AD converter configured to convert an output signal of the voltage-current conversion portion to a digital signal (figure 4 shows that each sample and hold block is connected to an ADC 370 as disclosed at paragraph 63); and at least one processor or circuit (figure 3 exhibits timing control circuit 212 as disclosed at paragraph 55) configured to function as: a control unit configured to perform control such that, in a period in which a first pixel signal obtained from the pixel is held in one sample-hold circuit, out of the at least three sample-hold circuits, and the first pixel signal is AD converted by the first AD converter, an operation is started in which a second pixel signal obtained become held in another sample-hold circuit, out of the at least three sample-hold circuits (figure 21 exhibits timing such that when one pair of sample and hold circuits and holding signals and A/D conversion is performed, the other pair is performing an operation to hold a second pair of pixel signals as disclosed at paragraphs 143 and 144), wherein the first pixel signal is a signal based on charges of at least one photoelectric conversion elements of one of the pixels (figure 21 shows that the AD converted signal is a signal voltage from the pixel as disclosed at paragraph 143).
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However, Okada fails to disclose that each pixel includes a plurality of photoelectric conversion elements a second AD converter, the first period includes AD conversion of the first pixel signal by the second AD converter and the second pixel signal is a signal based on charges of another conversion element of the one pixel.
Fujii is a similar or analogous system to the claimed invention as evidenced Fujii teaches an imaging device wherein the motivation of realizing a more diverse data output would have prompted a predictable variation of Okada by applying Fujii’s known principal of providing a second AD converter; and the second pixel signal is AD converted by the second AD converter (figure 8 exhibits wherein each column includes two ADCs per column where a first signal is converted by the first ADC and a second signal is converted by the second ADC as disclosed at paragraph 109).
In view of the motivations such as realizing a more diverse data output one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Okada.
Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention.
Okada in view of Fujii fails to disclose that each pixel includes a plurality of photoelectric conversion elements and that the second pixel signal is from the same pixel as the first pixel signal.
Iwane is a similar or analogous system to the claimed invention as evidenced Iwana teaches an imaging device wherein the motivation of being able to perform both image capturing and phase difference focus detection would have prompted a predictable variation of Okada by applying Iwane’s known principal of providing pixels with two photodiodes and sequentially reading out a single photodiode pixel signal and a combined photodiode pixel signal from a pixel (figure 14 exhibits wherein each pixel has two photodiodes Da11 and Db11 as disclosed at paragraph 57 and figure 16 exhibits timing where a pixel signal corresponding to Da11 is readout in a first period and a pixel signal corresponding to the combination of Da11 and Db11 is readout in a second period as disclosed at . When applying this known technique to Okada in view of Fujii, the signal AD converted by the second AD converter in the column would be the combined signal of the two photodiodes which is based on both the first and second signals. Therefore, the period in Okada which starts with the sample-hold of the first pixel signal, includes the AD conversion of the first signal and concludes after the AD conversion of the second signal (which includes both the first pixel signal and the second pixel) is a period in which a second pixel signal becomes held in another sample-hold circuit (the combined signal of Iwane).
In view of the motivations such as being able to perform both image capturing and phase difference focus detection one of ordinary skill in the art would have implemented the claimed variation of the prior art system of Okada.
Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention.
Regarding claim 7, Okada in view of Fujii and further in view of Iwane discloses the image capturing apparatus according to claim 1, in addition, Okada discloses wherein the control unit performs control such that, after the AD conversion of the first pixel signal is ended, and the second pixel signal is sample-held, an operation is stared in which a sample-hold circuit that held the first pixel signal is caused to hold a third pixel signal (figure 21 exhibits beginning at time T20 the first sample and hold unit which just finished ADS conversion begins a sampling and holding a new pixel signal as disclosed at paragraph 144).
Claim 10, a method, corresponds to and is analyzed the same as the apparatus of claim 1.
Claim 12, a method, corresponds to and is analyzed the same as the apparatus of claim 5.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Okada in view of Fujii in view of Iwane and further in view of Matsuura (United States Patent Application Publication 2020/0265909).
Regarding claim 8, Okada in view of Fujii and further in view of Iwane discloses the image capturing apparatus according to claim 1, however, the combination fails to disclose wherein the AD converter includes a delta-sigma type AD converter.
Okada discloses an AD converter of an unknown type to convert pixel signals (figure 7 exhibits ADC 370 as disclosed at paragraph 63). Matsuura discloses using a delta-sigma AD converter to convert pixel signals (paragraph 66). Because both Okada and Matsuura discloses AD converters for converting pixel signals it would have been obvious to a person having ordinary skill in the art before the effective filing date to substitute the delta-sigma AD converter taught by Matsuura for the AD converter disclosed by Okada to achieve the predictable result of converting pixels signals to a digital value.
Therefore the claimed subject matter would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON A FLOHRE whose telephone number is (571)270-7238. The examiner can normally be reached Mon-Fri 8:00-3:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached at 571-272-7564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JASON A. FLOHRE
Patent Examiner
Art Unit 2637
/JASON A FLOHRE/Patent Examiner, Art Unit 2637