DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to the claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-2, 4-5, 8-9 and 16-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Littlefield (US 5959443) in view of Nebrigic et al. (US 7208928) and further in view of applicant’s admitted prior art figure 1 (APA fig. 1).
Claims 1, 8 and 19; Littlefield discloses a feedback circuit for a converter circuit wherein the feedback circuit comprises: a measurement resistance (103) configured to receive a current (from 102); a feedback resistance (R1); a gain circuit (400) comprising a gain output (VIL) and configured to receive a sensed voltage (across Rs) associated to the measurement resistance (103), and to provide, at the gain output, a gain signal (VIL) generated based on the sensed voltage; and a comparison circuit (404) comprising a comparison output (to R), and configured to generate a comparison signal (reset signal R), at the comparison output, wherein the comparison signal is generated based on the gain signal (VIL), a voltage drop across the feedback resistance (R1) and a reference signal (Vc).
However, Littlefield does not disclose the converter being a boost converter and Littlefield does not disclose an adjustable current source coupled to the second end of the feedback resistance and to the second comparison input of the comparison circuit.
Nebrigic et al. teach that DC-DC converter circuits can be configured as a buck or boost converter configuration (see figs. 2A and 2B) depending on whether a stepped up or stepped down output voltage is desired.
Applicant’s own admission (fig. 1) clearly illustrate that the adjustable current source coupled to the second end of the feedback resistance and to the second comparison input of the comparison circuit is already known feature in the art. The target output voltage for the converter circuit is set by choosing an appropriate value for the current using an adjustable current source.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Littlefield to include a boost converter since buck and boost configuration are old and well known in the art and since Nebrigic et al. teach that DC converter can be configured as a buck or a boost converter depending on whether a higher output voltage than the input voltage is desired; and, it would have been obvious to include an adjustable current source coupled to the second end of the feedback resistance and to the second comparison input of the comparison circuit to set the target output voltage for the converter circuit by choosing an appropriate value of current using the adjustable current source.
Claim 2; gain circuit 400 is connected to the resistor RS at both ends; see figure 3.
Claim 4; comparator 404 is coupled to reference signal Vc input to first input (- ), R1 and VIL from gain circuit 400 coupled to second input (+).
Claim 5; gain circuit and second end of R1 connected to (-) input of 404. Claim 9; R1 is coupled to the output through gain circuit 400 and resistor Rs.
Claim 9; R1 is coupled to the output through gain circuit 400 and resistor Rs.
Claim 15; this is normal boost converter operation. Obviously when a boost configuration is used, as taught by Nebrigic et al., the boost converter will be in a charging state when the low side switch is ON and the high side will be OFF, so the gain output of the gain circuit would be zero since no current flows to the output because the high side switch would be OFF. And obviously, when in the discharge state, energy is released, inductor current flows to the output through the measuring resistor and the gain circuit would be non-zero because the high side switch would be ON the low side would be OFF.
Claim 16; a converter circuit comprising: a feedback circuit for a converter circuit, wherein the feedback circuit comprises: a measurement resistance (Rs) configured to receive a current; a feedback resistance (R1); a gain circuit (400) comprising a gain output and configured to receive a sensed voltage associated to the measurement resistance (Rs), and to provide, at the gain output, a gain signal generated based on the sensed voltage (across Rs); and a comparison circuit (400) comprising a comparison output, and configured to generate a comparison signal, at the comparison output, wherein the comparison signal is generated based on the gain signal (VIL), a voltage drop across the feedback resistance (R1) and a reference signal (Vc); an inductor (102); an input terminal (Vin) configured to receive an input voltage; an output terminal (Vout) configured to provide an output voltage; a control circuit (300) configured to switch the circuit to perform cycles wherein each cycle comprises an energy discharging state (101 OFF) in which the inductor provides energy to the output terminal and an energy charging state (101 ON) in which the inductor stores energy provided by the input voltage; wherein the control circuit is configured to switch the converter circuit based on the comparison signal (404).
However, Littlefield does not disclose the converter being a boost converter and Littlefield does not disclose an adjustable current source coupled to the second end of the feedback resistance and to the second comparison input of the comparison circuit.
Nebrigic et al. teach that DC-DC converter circuits can be configured as a buck or boost converter configuration (see figs. 2A and 2B) depending on whether a stepped up or stepped down output voltage is desired.
Applicant’s own admission (fig. 1) clearly illustrate that the adjustable current source coupled to the second end of the feedback resistance and to the second comparison input of the comparison circuit is already known feature in the art. The target output voltage for the converter circuit is set by choosing an appropriate value for the current using an adjustable current source.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Littlefield to include a boost converter since buck and boost configuration are old and well known in the art and since Nebrigic et al. teach that DC converter can be configured as a buck or a boost converter depending on whether a higher output voltage than the input voltage is desired; and, it would have been obvious to include an adjustable current source coupled to the second end of the feedback resistance and to the second comparison input of the comparison circuit to set the target output voltage for the converter circuit by choosing an appropriate value of current using the adjustable current source.
Claims 17 and 18; typical configuration and switching operation of a boost converter taught by Nebrigic et al.
Allowable Subject Matter
Claim 3 and 6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 10-15, 21 and 22 are allowed.
The following is a statement of reasons for the indication of allowable subject matter: the reasons were stated in the previous office action dated 4/07/2026.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20160359414 Ozanoglu et al. disclose a switching power supply; US 7719243 Balogh disclose a power converter circuit.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GARY L LAXTON whose telephone number is (571)272-2079. The examiner can normally be reached Monday-Friday, 8 am-4 pm.
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/GARY L LAXTON/Primary Examiner, Art Unit 2838 8/31/2026
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