DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Inventorship
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Information Disclosure Statement
The information disclosure statements submitted on 6/07/2024 and 11/03/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Drawings
Figures 1-3 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 16-18 are objected to because of the following informalities:
Claim 16 recites the limitation "a boost converter" in line 2. There is insufficient antecedent basis for this limitation in the claim. A boost converter was already recited in line 1. Claims 17 and 18 inherit the same from claim 16.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 15 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 15 recites the limitation "a voltage is close to a reference voltage when a a system is in control" in line 4. This is vague and indefinite. What voltage is the applicant referring to, what reference is the applicant referring to and what system is the applicant referring to and how is the system in control or not in control?
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-2, 4-5, 8-9 and 15-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Littlefield (US 5959443) in view of Nebrigic et al. (US 7208928).
Claims 1, 8 and 19; Littlefield discloses a feedback circuit for a converter circuit wherein the feedback circuit comprises: a measurement resistance (103) configured to receive a current (from 102); a feedback resistance (R1); a gain circuit (400) comprising a gain output (VIL) and configured to receive a sensed voltage (across Rs) associated to the measurement resistance (103), and to provide, at the gain output, a gain signal (VIL) generated based on the sensed voltage; and a comparison circuit (404) comprising a comparison output (to R), and configured to generate a comparison signal (reset signal R), at the comparison output, wherein the comparison signal is generated based on the gain signal (VIL), a voltage drop across the feedback resistance (R1) and a reference signal (Vc).
However, Littlefield does not disclose the converter being a boost converter.
Nebrigic et al. teach that DC-DC converter circuits can be configured as a buck or boost converter configuration (see figs. 2A and 2B) depending on whether a stepped up or stepped down output voltage is desired.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Littlefield to include a boost converter since buck and boost configuration are old and well known in the art and since Nebrigic et al. teach that DC converter can be configured as a buck or a boost converter depending on whether a higher output voltage than the input voltage is desired.
Claim 2; gain circuit 400 is connected to the resistor RS at both ends; see figure 3.
Claim 4; comparator 404 is coupled to reference signal Vc input to first input (-), R1 and VIL from gain circuit 400 coupled to second input (+).
Claim 5; gain circuit and second end of R1 connected to (-) input of 404.
Claim 9; R1 is coupled to the output through gain circuit 400 and resistor Rs.
Claim 15; this is normal boost converter operation. Obviously when a boost configuration is used, as taught by Nebrigic et al., the boost converter will be in a charging state when the low side switch is ON and the high side will be OFF, so the gain output of the gain circuit would be zero since no current flows to the output because the high side switch would be OFF. And obviously, when in the discharge state, energy is released, inductor current flows to the output through the measuring resistor and the gain circuit would be non-zero because the high side switch would be ON the low side would be OFF.
Claim 16; a converter circuit comprising: a feedback circuit for a converter circuit, wherein the feedback circuit comprises: a measurement resistance (Rs) configured to receive a current; a feedback resistance (R1); a gain circuit (400) comprising a gain output and configured to receive a sensed voltage associated to the measurement resistance (Rs), and to provide, at the gain output, a gain signal generated based on the sensed voltage (across Rs); and a comparison circuit (400) comprising a comparison output, and configured to generate a comparison signal, at the comparison output, wherein the comparison signal is generated based on the gain signal (VIL), a voltage drop across the feedback resistance (R1) and a reference signal (Vc); an inductor (102); an input terminal (Vin) configured to receive an input voltage; an output terminal (Vout) configured to provide an output voltage; a control circuit (300) configured to switch the circuit to perform cycles wherein each cycle comprises an energy discharging state (101 OFF) in which the inductor provides energy to the output terminal and an energy charging state (101 ON) in which the inductor stores energy provided by the input voltage; wherein the control circuit is configured to switch the converter circuit based on the comparison signal (404).
However, Littlefield does not disclose the converter being a boost converter.
Nebrigic et al. teach that DC-DC converter circuits can be configured as a buck or boost converter configuration (see figs. 2A and 2B) depending on whether a stepped up or stepped down output voltage is desired.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to modify Littlefield to include a boost converter since buck and boost configuration are old and well known in the art and since Nebrigic et al. teach that DC converter can be configured as a buck or a boost converter depending on whether a higher output voltage than the input voltage is desired.
Claims 17 and 18; typical configuration and switching operation of a boost converter taught by Nebrigic et al.
Allowable Subject Matter
Claims 3, 6, 7, 10-14 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 3; prior art fails to disclose or fairly suggest, inter alia, the feedback resistance comprises a first end and a second end and wherein the first end of the feedback resistance is coupled to the second end of the measurement resistance, the second end of the feedback resistance is coupled to the comparison circuit and the gain output is coupled to the comparison circuit.
Claims 6 and 7; prior art fails to disclose or fairly suggest, inter alia, another feedback resistance configured to receive the gain signal wherein the comparison circuit comprises a first comparison input, a second comparison input and a comparison output, wherein the comparison circuit is configured to receive, at the first comparison input, the sum of the reference voltage and a further voltage drop caused by the gain signal across the another feedback resistance, to receive the voltage drop across the feedback resistance at the second comparison input and to generate the comparison signal by comparing the sum of the reference voltage and the further voltage drop with the voltage drop across the feedback resistance.
Claims 10-13; a prior art fails to disclose or fairly suggest, inter alia, measurement switch wherein the measurement switch and the measurement resistance are coupled in series, wherein the measurement switch and the measurement resistance are coupled in parallel with a first switch of the boost converter, wherein the first switch comprises an on-resistance when the first switch is closed, and wherein the measurement switch and the first switch of the boost converter circuit are configured to open and close at the same time.
Claims 14 and 20; prior art fails to disclose or fairly suggest, inter alia, an adjustable current source coupled to the second end of the feedback resistance and to the second comparison input of the comparison circuit.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GARY L LAXTON whose telephone number is (571)272-2079. The examiner can normally be reached Monday-Friday, 8 am-4 pm.
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/GARY L LAXTON/Primary Examiner, Art Unit 2838 3/24/2026
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