DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to communication filed on 06/11/2024.
Claims 1-20 present for examination.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2, 3, 9, 10, 16, and 17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 recites the limitation "the synchronization interval" in line 1. There is insufficient antecedent basis for this limitation in the claim. Same rejection applies to claims 9 and 16.
Regarding claim 2, claim limitation recites “the synchronization interval is a multiple of the reference synchronization interval” in lines 1-2, which renders the claim vague and indefinite. The examiner is unable to determine the scope of the claim. Same rejection applies to claims 9 and 16.
Regarding claim 3, claim limitation recites “each synchronization interval is a different multiple of the reference synchronization interval” in lines 3-4, which renders the claim vague and indefinite. The examiner is unable to determine the scope of the claim. Same rejection applies to claims 10 and 17.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 7, 8, 14, and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kozaki et al. (US 2013/0266306 A1), hereinafter Kozaki, in view of Manevich et al. (US 2025/0323743 A1), hereinafter Manevich, and further in view of Shimizu et al. (US 2018/0062780 A1), hereinafter Shimizu.
Regarding claim 1, Kozaki discloses
A method, comprising:
decoding a reference message comprising time information to synchronize a hardware clock of a time sensitive network (TSN) node with a network time for a TSN ([0044]: the slave station apparatus 10, which receives the synchronization command, compares the time stamp of the synchronization command and time (timing information) indicated by a clock of the slave station apparatus (a PON clock) and corrects the time information of the synchronization command based on different between the time stamp and the time; the slave station apparatus 10 converts the corrected time information into a synchronization message (Sync message) in the second network and transmits the synchronization message to the slave apparatus SL);
selecting a first virtual clock from a set of virtual clocks for the TSN node ([0160]: the control device 11 determines, according to whether the control device 11 is in the protection period (the handover state), whether the local clock A is selected or the local clock B is selected as a clock used for the synchronization processing);
adjusting a time for the first virtual clock based on the time information from the reference message to synchronize the first virtual clock with the network time for the TSN ([0044]: upon receiving the synchronization message, the slave apparatus SL extracts the time information from the synchronization message and corrects the time information using a delay time of the second network measured in advance; the slave apparatus SL can synchronize with time of the grand master apparatus GM by synchronizing time of the clock of the slave apparatus SL with the corrected time information).
Kozaki does not explicitly disclose
the reference message associated with a reference synchronization interval.
However, Manevich discloses
the reference message associated with a reference synchronization interval ([0046]: manage periodic transmission of time synchronization message (e.., sync messages) to one or more time synchronization followers according to the clock time of a hardware clock maintained by the network device).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the feature of Manevich in Kozaki because Kozaki discloses transmit synchronization message for time synchronization ([0011]) and Manevich further suggests manage periodic transmission of time synchronization message ([0046]]).
One of ordinary skill in the art would be motivated to utilize the teachings of Manevich in the Kozaki system in order to ensure device maintains an accurate clock.
Kozaki and Manevich do not explicitly disclose
the first virtual clock associated with a first synchronization interval that is different from the reference synchronization interval.
However, Shimizu discloses
the first virtual clock associated with a first synchronization interval that is different from the reference synchronization interval ([0026]: a first master node among the plurality of master node is configured to correct a first local master clock of the first master node at predetermined periodic intervals by synchronizing with a timing synchronization signal from a source clock node having a source clock selected for a clock domain).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the feature of Shimizu in Kozaki and Manevich because Kozaki and Manevich disclose transmit synchronization message for time synchronization (Kozaki: [0011]) and Shimizu further suggests correct local clock at predetermined periodic intervals ([0026]]).
One of ordinary skill in the art would be motivated to utilize the teachings of Shimizu in the Kozaki and Manevich system in order to ensure device maintains an accurate clock.
Regarding claim 7, Kozaki, Manevich, and Shimizu disclose the method as described in claim 1. Kozaki further discloses
the TSN node is a clock follower node for the TSN and the reference message is from a clock leader node for the TSN ([0012]: a master station apparatus configured to transmit time information to a second network connected to a slave station apparatus via a first network).
Regarding claims 8 and 15, the limitations of claims 8 and 15 are rejected in the analysis of claim 1 above and these claims are rejected on that basis.
Regarding claim 14, the limitations of claim 14 are rejected in the analysis of claim 7 above and these claims are rejected on that basis.
Claim(s) 2, 3, 9, 10, 16, and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kozaki in view of Manevich, in view of Shimizu, and further in view of Shikata (US 2005/0028018 A1).
Regarding claim 2, Kozaki, Manevich, and Shimizu disclose the method as described in claim 1. Kozaki, Manevich, and Shimizu do not explicitly disclose
the synchronization interval is a multiple of the reference synchronization interval.
However, Shimizu discloses
the synchronization interval is a multiple of the reference synchronization interval ([0099]: the period of the clock sync signal may be set to be a given multiple of the period of the reference clock).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the feature of Shikata in Kozaki, Manevich, and Shimizu because Kozaki, Manevich, and Shimizu disclose transmit synchronization message for time synchronization (Kozaki: [0011]) and Shikata further suggests period of clock sync signal may be set to be a given multiple of the period of the reference clock ([0099]).
One of ordinary skill in the art would be motivated to utilize the teachings of Shikata in the Kozaki, Manevich, and Shimizu system in order to optimize performance.
Regarding claim 3, Kozaki, Manevich, and Shimizu disclose the method as described in claim 1. Kozaki, Manevich, and Shimizu further disclose
each virtual clock from the set of virtual clocks corresponds to a synchronization loop comprising a synchronization interval to control when each virtual clock is synchronized with the network time for the TSN (Shimizu: [0026]: a first master node among the plurality of master node is configured to correct a first local master clock of the first master node at predetermined periodic intervals by synchronizing with a timing synchronization signal from a source clock node having a source clock selected for a clock domain).
Kozaki, Manevich, and Shimizu do not explicitly disclose
each synchronization interval is a different multiple of the reference synchronization interval.
However, Shikata discloses
each synchronization interval is a different multiple of the reference synchronization interval ([0099]: the period of the clock sync signal may be set to be a given multiple of the period of the reference clock).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the feature of Shikata in Kozaki, Manevich, and Shimizu because Kozaki, Manevich, and Shimizu disclose transmit synchronization message for time synchronization (Kozaki: [0011]) and Shikata further suggests period of clock sync signal may be set to be a given multiple of the period of the reference clock ([0099]).
One of ordinary skill in the art would be motivated to utilize the teachings of Shikata in the Kozaki, Manevich, and Shimizu system in order to optimize performance.
Regarding claims 9 and 16, the limitations of claims 9 and 16 are rejected in the analysis of claim 2 above and these claims are rejected on that basis.
Regarding claims 10 and 17, the limitations of claims 10 and 17 are rejected in the analysis of claim 3 above and these claims are rejected on that basis.
Allowable Subject Matter
Claims 4-6, 11-13, 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
D’Eletto (US 2017/0180108 A1). Sender device 210 may maintain multiple virtual clocks 230 that correspond to multiple reflector clocks 250 maintained by multiple reflector devices 240 ([0029]).
Rebello et al. (US 2016/0098326 A1). Upon receipt of the synchronization message, the synchronization message is timestamped with a local timestamp; determine an offset between its own hardware timestamp and that of the PTP master node ([0041]).
Zhang (US 2016/0173267 A1). When a Precision Time Protocol (PTP) message is received from an ingress or sent from an egress, this instruction is adopted to generate a PTP TS (TimeStamp), and the generated TS is used for subsequent calculation of a link delay and a time offset.
Lee et al. (US 2014/0010515 A1). Generate a clock offset value based on the sender timestamp.
Dionne et al. (US 2015/0326387 A1). Starting a counter clocked by a local clock signal to determine an offset time since receipt of the time-stamp packet ([0011]).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAYLEE J HUANG whose telephone number is (571)272-0080. The examiner can normally be reached Monday-Friday 9AM-5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joon H Hwang can be reached at 571-272-4036. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Kaylee Huang
01/10/2026
/KAYLEE J HUANG/Primary Examiner, Art Unit 2447