DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-5, 7, 11 and 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Duong et al. (US 11,361,213 B1) (hereafter referred to as Duong) in view of Huang et al. (CN 110348021 A) (hereafter referred to as Huang) further in view of Song (US 2021/0132954 A1) (hereafter referred to as Song).
Regarding claim 1:
Duong teaches:
“A method for generating program code which, when executed on a hardware platform, creates a neural network having a given architecture,” (Duong Col. 4 lines 50-57, “For efficiency, the compiler of some embodiments (a software program that generates the configuration data for enabling the IC to execute a particular neural network) attempts to optimize the location of the post-processing unit for each computation node output relative to the cores used to compute the constituent partial dot products for that computation node and the destination core for the output value.”)
“wherein the given architecture includes neurons organized in layers and/or groups, the method comprising the following steps:” (Duong Col. 2, lines 54-55, “A typical neural network operates in layers, with each layer including numerous nodes.”)
“generating program code which, for all respective neurons in the layer and/or group respectively:” (Duong Col. 4 lines 50-57, “For efficiency, the compiler of some embodiments (a software program that generates the configuration data for enabling the IC to execute a particular neural network) attempts to optimize the location of the post-processing unit for each computation node output relative to the cores used to compute the constituent partial dot products for that computation node and the destination core for the output value.”)
“aggregates inputs of the respective neuron to form an argument of the activation function in accordance with the given architecture,” (Duong Col. 1 lines 32-38, “The neural network computation fabric of some embodiments includes (i) a set of cores that compute dot products of input values and corresponding weight values and (ii) a channel that aggregates these dot products and performs post-processing operations (as well as performs other operations), in order to compute the outputs of neural network computation nodes.” Examiner notes the post processing operations includes the activation functions.)
Duong does not distinctly disclose:
“for at least one layer and/or group of neurons, ascertaining a non-linear activation function of the neurons in the layer and/or group from the given architecture;”
“pre-calculating and storing in a lookup table possible values that can be assumed by the activation function;”
“ascertains an index from the argument, under which an associated value of the activation function is stored in the lookup table for the respective layer and/or group,”
“and ascertains an output of the respective neuron by retrieving the value from the lookup table with the index. ”
However, Huang teaches:
“ascertains an index from the argument, under which an associated value of the activation function is stored in the lookup table for the respective layer and/or group,” (Huang ¶29-31, “Optionally, using the lookup data to perform a data search in the preset lookup table includes: The lookup data is quantized into positive integers and then divided by H to obtain the converted result data; The preset lookup table is used to find the output integer corresponding to the index that is equal to the converted result data.” Examiner notes the lookup data teaches the argument which then points to stored data relating to the index.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network including a lookup table of Duong, with the index of Huang in order to reduce the reliance of dedicated hardware acceleration modules when performing activation functions. (Huang ¶4).
Duong as modified does not distinctly disclose:
“for at least one layer and/or group of neurons, ascertaining a non-linear activation function of the neurons in the layer and/or group from the given architecture;”
“pre-calculating and storing in a lookup table possible values that can be assumed by the activation function;”
“and ascertains an output of the respective neuron by retrieving the value from the lookup table with the index. ”
However, Song teaches:
“for at least one layer and/or group of neurons, ascertaining a non-linear activation function of the neurons in the layer and/or group from the given architecture;” (Song ¶45, “The function selection signal FS may be generated to select one of various activation functions which are used for a neural network. The various activation functions used for a neural network may include, but are not limited to, sigmoid sigmoid function), Tan h (i.e., hyperbolic tangent activation function), ReLU (i.e., rectified linear unit function), leaky ReLU (i.e., leaky rectified linear unit function), Maxout (i.e., max out activation function), and an activation function which is inputted based on the external command ECMD.”)
“pre-calculating and storing in a lookup table possible values that can be assumed by the activation function;” (Song ¶112 “Referring to FIG. 21, various set values of the output distribution signal ODST that corresponds to the application results of the activation function are listed based on various set values (8-bit binary stream data) of the arithmetic result signal MOUT.”)
“and ascertains an output of the respective neuron by retrieving the value from the lookup table with the index. ” (Song ¶43, “The lookup table has a table form that contains information about an input value and the output value corresponding to the input value. When by using the lookup table, the output value corresponding to the input value can be printed directly without any arithmetic, thus improving the arithmetic speed.”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network of Duong with the lookup table of Song in order to improve the speed of obtaining results due to the reducing the amount of calculations required (Song ¶43).
Regarding claim 2:
Duong as modified teaches all the limitations of claim 1.
Duong as modified further teaches:
“wherein program code is generated which calculates the argument of the activation function in integer arithmetic.” (Huang ¶29-31, “Optionally, using the lookup data to perform a data search in the preset lookup table includes: The lookup data is quantized into positive integers and then divided by H to obtain the converted result data; The preset lookup table is used to find the output integer corresponding to the index that is equal to the converted result data.” Examiner notes the lookup data teaches the argument of the activation function which the output is calculated from using integers (see Huang ¶25, “where H is an integer;”))
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network including a lookup table of Duong as modified in claim 1, with the calculation of the activation function argument of Huang in order to efficiently compute operations in different systems including situations where floating-point units are not available (Huang ¶4).
Regarding claim 3:
Duong as modified teaches all the limitations of claim 2.
Duong as modified further teaches:
“wherein program code is generated which calculates the index by adding an offset to the argument.”(Huang ¶101, “For example, if the sample data above uses a 16-bit data type and 11 bits represent the decimal (i.e., multiply by 2^11, or shift left by 11 bits), then the way to quantize the lookup data into a positive integer is to use a 16-bit data type and 11 bits represent the decimal, and add an offset of 16384. Divide the positive integer after adding the offset by 256 (i.e., shift right by 8 bits) to obtain the converted data. Then, the index that matches the converted result data is found in the preset lookup table, and the corresponding output integer is found based on the mapping relationship between the N output integers and their respective indexes.”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network including a lookup table of Duong as modified in claim 2, with the offset of Huang in order to quantize the data (Huang ¶101).
Regarding claim 4:
Duong as modified teaches all the limitations of claim 2.
Duong as modified further teaches:
“wherein values of the activation function are stored in the lookup table as integers.” (Huang ¶31 “The preset lookup table is used to find the output integer corresponding to the index that is equal to the converted result data.”)
Regarding claim 5:
Duong as modified teaches all the limitations of claim 2.
Duong as modified further teaches:
“wherein the integer arithmetic is an integer arithmetic with 256 possible values.” (Huang ¶93 “For example, if the equal numerical interval H is 128, then 16384*2/128＝256. Therefore, 256 positive integer samples can be selected from the range of integer samples at intervals of 128. Correspondingly, 256 output integers can also be selected from the range of output integers.” Examiner notes the limiting of both the argument and the output to 256 integers.)
Regarding claim 7:
Duong as modified teaches all the limitations of claim 1.
Duong as modified further teaches:
“program code is generated which respectively adds an offset when forming the argument of the activation function and/or when ascertaining the output of the neuron, and the offset is the same within each layer and/or group of neurons.” .”(Huang ¶101, “For example, if the sample data above uses a 16-bit data type and 11 bits represent the decimal (i.e., multiply by 2^11, or shift left by 11 bits), then the way to quantize the lookup data into a positive integer is to use a 16-bit data type and 11 bits represent the decimal, and add an offset of 16384. Divide the positive integer after adding the offset by 256 (i.e., shift right by 8 bits) to obtain the converted data. Then, the index that matches the converted result data is found in the preset lookup table, and the corresponding output integer is found based on the mapping relationship between the N output integers and their respective indexes.” Examiner notes the offset is based on bits not individual layers so it teaches the same offset within each layer and/or group of neurons.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network including a lookup table of Duong as modified in claim 1, with the offset of Huang in order to quantize the data (Huang ¶101).
Regarding claim 11:
Duong as modified teaches all the limitations of claim 1.
Duong as modified further teaches:
“wherein the program code is loaded onto a hardware platform and executed, so that the neural network is created.” (Duong Col. 1, lines 39-48, “In some embodiments, at startup of the IC, the microprocessor loads neural network configuration data (e.g., weight values, scale and bias parameters, etc.) from off-chip storage and generates instructions for the neural network computation fabric to write the neural network parameters to memory. In addition, microprocessor loads the neural network program instructions for the computation fabric to its own memory. These instructions are applied by the computation fabric to input data (e.g., images, audio clips, etc.) in order to execute the neural network.”)
Regarding claim 13, Duong as modified teaches a non-transitory machine-readable data carrier on which is stored a computer program (Duong Col. 34 lines 23-41, “Some embodiments include electronic components, such as microprocessors, storage and memory that store computer program instructions in a machine-readable or computer-readable medium (alternatively referred to as computer-readable storage media, machine-readable media, or machine-readable storage media). Some examples of such computer-readable media include RAM, ROM, read-only compact discs (CD-ROM), recordable compact discs (CD-R), rewritable compact discs (CD-RW), read-only digital versatile discs (e.g., DVD-ROM, dual-layer DVD-ROM), a variety of recordable/rewritable DVDs (e.g., DVD-RAM, DVD-RW, DVD+RW, etc.), flash memory (e.g., SD cards, mini-SD cards, micro-SD cards, etc.), magnetic and/or solid state hard drives, read-only and recordable Blu-Ray® discs, ultra-density optical discs, any other optical or magnetic media, and floppy disks. The computer-readable media may store a computer program that is executable by at least one processing unit and includes sets of instructions for performing various operations.”) which when executed performs the method of claim 1 (see rejection of claim 1) and is therefore rejected under the same analysis.
Regarding claim 14, Duong as modified teaches one or more computers and/or compute instances including a non-transitory data carrier on which is stored a computer program including machine-readable instructions (Duong Col. 33 lines 20-34, “FIG. 19 conceptually illustrates an electronic system 1900 with which some embodiments of the invention are implemented. The electronic system 1900 can be used to execute any of the control and/or compiler systems described above in some embodiments. The electronic system 1900 may be a computer (e.g., a desktop computer, personal computer, tablet computer, server computer, mainframe, a blade computer etc.), phone, PDA, or any other sort of electronic device. Such an electronic system includes various types of computer readable media and interfaces for various other types of computer readable media. Electronic system 1900 includes a bus 1905, processing unit(s) 1910, a system memory 1925, a read-only memory 1930, a permanent storage device 1935, input devices 1940, and output devices 1945.”) which when executed performs the method of claim 1 (see rejection of claim 1) and is therefore rejected under the same analysis.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Duong et al. (US 11,361,213 B1) (hereafter referred to as Duong) in view of Huang et al. (CN 110348021 A) (hereafter referred to as Huang) further in view of Song (US 2021/0132954 A1) (hereafter referred to as Song) as applied to claim 1, further in view of Xu et al. (CN 111160424 A) (hereafter referred to as Xu).
Regarding claim 6:
Duong as modified teaches all the limitations of claim 1.
Duong does not distinctly disclose:
“wherein the activation function is an activation function with at least one free parameter a value of which is the same within each layer and/or group of neurons.”
However, Xu teaches:
“wherein the activation function is an activation function with at least one free parameter a value of which is the same within each layer and/or group of neurons.” (Xu, Page 5, ¶4, “the mapping layer uses SIGMOD function as small influence function of activation function, mapping has displacement invariance; and all the neuron weight value several feature mapping plane calculation layer of the network are the same. the number at the same time, due to neuronal sharing weights of the individual feature mapping surface, reduces the free parameters.”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network including a lookup table of Duong as modified in claim 1, with the value of free parameter being the same across the entire layer of Xu in order to reduce the free parameters by sharing the weights (Xu, Page 5, ¶4).
Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Duong et al. (US 11,361,213 B1) (hereafter referred to as Duong) in view of Huang et al. (CN 110348021 A) (hereafter referred to as Huang) further in view of Song (US 2021/0132954 A1) (hereafter referred to as Song) as applied to claim 1, further in view of Ki et al. (https://ieeexplore.ieee.org/document/9748745) (hereafter referred to as Ki).
Regarding claim 8:
Duong as modified teaches all limitations of claim 1.
Duong as modified does not distinctly disclose:
“wherein the activation function is a leaky rectified linear unit which outputs positive arguments unchanged and multiplies negative arguments by a predetermined factor.”
However, Ki teaches:
“wherein the activation function is a leaky rectified linear unit which outputs positive arguments unchanged and multiplies negative arguments by a predetermined factor.” (Ki §II.B, “In ReLU, the most commonly used activation function, a negative value becomes 0, which disables the neuron. To compensate for this problem, tiny YOLO v2 and v3 use leaky ReLU as an activation function, and the formula of leaky ReLU is as follows:
PNG
media_image1.png
40
256
media_image1.png
Greyscale
For 𝛼 in Eq. (3), a value of 0.01 is mostly used, but it can be replaced with other small values.”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network including a lookup table of Duong as modified in claim 1, with the leaky ReLu of Ki in order to prevent the disabling of neurons caused by setting negative values to 0 (Ki §II.B, ¶1).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Duong et al. (US 11,361,213 B1) (hereafter referred to as Duong) in view of Huang et al. (CN 110348021 A) (hereafter referred to as Huang) further in view of Song (US 2021/0132954 A1) (hereafter referred to as Song) as applied to claim 1, further in view of Yu et al. (US 2018/0365033 A1) (hereafter referred to as Yu).
Regarding claim 9:
Duong as modified teaches all the limitations of claim 1.
Duong does not distinctly disclose:
“wherein program code is generated which includes a pointer to the lookup table.”
However, Yu teaches:
“wherein program code is generated which includes a pointer to the lookup table.” (Yu, ¶33, “A dictionary lookup is a compile-time action that can behave like a function taking a type handle or a method handle as an input and outputting a pointer to the information in question. A lookup happens between the code generator and the type system. A generic dictionary can be a table of pointers and integers. The type system can receive a lookup from the code generator and can return the index to the requested entry of the generic dictionary. The code generator can receive the index and can generates code to get the pointer out of the dictionary entry.”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network including a lookup table of Duong as modified in claim 1, with the pointer of Yu in order to get the values from the lookup table (Yu ¶33).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Duong et al. (US 11,361,213 B1) (hereafter referred to as Duong) in view of Huang et al. (CN 110348021 A) (hereafter referred to as Huang) further in view of Song (US 2021/0132954 A1) (hereafter referred to as Song) as applied to claim 1, further in view of Wuraola et al. (https://www.sciencedirect.com/science/article/pii/S0925231221017094?ref=pdf_download&fr=RR-2&rr=a396f37299b2b87e) (hereafter referred to as Wuraola).
Regarding claim 10:
Duong as modified teaches all the limitations of claim 1.
Duong as modified does not distinctly disclose:
“from a total existing layers and/or groups of the neural network, those layers and/or groups for which a lookup table and program code for retrieving values of an activation function from the lookup table are produced are selected based on a computational effort incurred in the respective group and/or layer for an evaluation of the activation function.”
However, Wuraola teaches:
“from a total existing layers and/or groups of the neural network, those layers and/or groups for which a lookup table and program code for retrieving values of an activation function from the lookup table are produced are selected based on a computational effort incurred in the respective group and/or layer for an evaluation of the activation function.” (Wuraola, §1 ¶2, “There are many nonlinear functions used as activation functions for machine learning including Rectified Linear Unit (ReLU), Tanh, sigmoid, and more. Some of these functions, such as ReLU, hard sigmoid, and hard Tanh are very simple and can be implemented with simple operators on hardware; others require some type of approximation method or extra memory by using a lookup table (LUT). Every variant of ReLU or other deep learning-based activation functions is computationally expensive.” Examiner notes the determination of computational effort of the various activation function and the selection of implementing some as a lookup table.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the method for generating program code to create a neural network including a lookup table of Duong as modified in claim 1, with the selection of activation functions to be stored in a lookup table of Wuraola in order to implement efficiently on hardware, computationally intensive activation functions (Wuraola §1 ¶2).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Duong et al. (US 11,361,213 B1) (hereafter referred to as Duong) in view of Huang et al. (CN 110348021 A) (hereafter referred to as Huang) further in view of Song (US 2021/0132954 A1) (hereafter referred to as Song) as applied to claim 11 further in view of Willers et al. (US 2020/0410364 A1) (hereafter referred to as Willers).
Regarding claim 12:
Duong as modified teaches all the limitations of claim 11.
Duong does not distinctly disclose:
“the neural network is supplied with measurement data recorded by at least one sensor, the neural network ascertains outputs with respect to a given task from the measurement data, a control signal is ascertained from the outputs, and a vehicle, and/or a driving assistance system, and/or a robot, and/or a system for monitoring areas, and/or a system for quality control, and/or a system for medical imaging, is controlled using the control signal.”
However, Willers teaches:
“the neural network is supplied with measurement data recorded by at least one sensor, the neural network ascertains outputs with respect to a given task from the measurement data, a control signal is ascertained from the outputs, and a vehicle, and/or a driving assistance system, and/or a robot, and/or a system for monitoring areas, and/or a system for quality control, and/or a system for medical imaging, is controlled using the control signal.” (Willers ¶49 “In other alternatives, the at least party autonomous robot can also be a household appliance, in particular a washing machine, stove, oven, microwave or dishwasher. With a sensor, for example an optical sensor, a condition of an object treated with the household appliance can be recorded, for example in the case of the washing machine a condition of laundry, which is in the washing machine. A neural network can then be used to determine the type or state of this object based on the data of the sensor. A control signal can then be determined in such a way that the household appliance is controlled depending on the determined type and/or the determined state of the object as well as a global uncertainty of this prediction. For example, in the case of the washing machine, it can be controlled depending on the material of which the laundry is made. To make sure, that no living creature is within in the washing machine, the global uncertainty helps to gain the needed high safety standards.”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the neural network of Duong as modified in claim 11, with the use of the neural network of Willers in order to ensure the proper standards for the control of the desired system (Willers ¶49).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Li et al. (CN 110610235 A) also teaches a method for optimizing a neural network using a look-up table.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Peter T Annis whose telephone number is (571)270-1059. The examiner can normally be reached M-F, 7:30am to 5pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexey Shmatov can be reached at (571) 270-3428. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PETER THOMAS ANNIS/Examiner, Art Unit 2123
/ALEXEY SHMATOV/Supervisory Patent Examiner, Art Unit 2123
Prosecution Insights