DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 8-9 are objected to because of the following informalities: it depends on claim 1 “a television configured…” further claims are recited as a system claim and appeared to be written as independent claim. Appropriate correction is required.
Claim Rejections - 35 USC § 112
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. - An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
Use of the word “means” (or “step for”) in a claim with functional language creates a rebuttable presumption that the claim element is to be treated in accordance with 35 U.S.C.112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph). The presumption that 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph) is invoked is rebutted when the function is recited with sufficient structure, material, or acts within the claim itself to entirely perform the recited function.
Absence of the word “means” (or “step for”) in a claim creates a rebuttable presumption that the claim element is not to be treated in accordance with 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph). The presumption that 35 U.S.C. 112(f) (pre-AIA 35 U.S.C. 112, sixth paragraph) is not invoked is rebutted when the claim element recites function but fails to recite sufficiently definite structure, material or acts to perform that function.
Claim elements in this application that use the word “means” (or “step for”) are presumed to invoke 35 U.S.C. 112(f) except as otherwise indicated in an Office action. Similarly, claim elements that do not use the word “means” (or “step for”) are presumed not to invoke 35 U.S.C. 112(f) except as otherwise indicated in an Office action.
Claim limitation “configured to” has/have been interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because it uses/they use a generic placeholder “configured to” coupled with functional language “control” and "store” without reciting sufficient structure to achieve the function. Furthermore, the generic placeholder is not preceded by a structural modifier. [0013] In accordance with a third aspect of the present disclosure, a television configured to update the firmware in a connected audio device is….]
Since the claim limitation(s) invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, claim(s) 1-6has/have been interpreted to cover the corresponding structure described in the specification that achieves the claimed function, and equivalents thereof.
A review of the specification shows that the following appears to be the corresponding structure described in the specification for the 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph limitation: paragraphs [0007 and 0008]. However, these section does not provide any structure thereof and only summarize the functionality.
If applicant wishes to provide further explanation or dispute the examiner’s interpretation of the corresponding structure, applicant must identify the corresponding structure with reference to the specification by page and line number, and to the drawing, if any, by reference characters in response to this Office action.
If applicant does not intend to have the claim limitation(s) treated under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112 , sixth paragraph, applicant may amend the claim(s) so that it/they will clearly not invoke 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, or present a sufficient showing that the claim recites/recite sufficient structure, material, or acts for performing the claimed function to preclude application of 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
For more information, see MPEP § 2173 el seq. and Supplementary Examination Guidelines for Determining Compliance With 35 U.S.C. 112 and for Treatment of Related Issues in Patent Applications, 76 FR 7162, 7167 (Feb. 9, 2011).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-23 of U.S. Patent No. 12/067,384. Although the claims at issue are not identical, they are not patentably distinct from each other because they are obvious and parallel in nature.
Current claims 18/740,756
Patented claims 12/067,384
1. A television configured to update the firmware in a connected audio device, comprising: an audio data buffer having an audio data signal input and an audio data buffer signal output;
a firmware update data buffer having a firmware update data buffer signal input and a firmware update data buffer signal output;
a firmware data and audio data multiplexer having a first input operatively connected to the audio data buffer signal output, a second input operatively connected to the firmware update data buffer signal output, and an output operatively connected to the audio device input via an audio return channel of a High-Definition Multimedia Interface Audio Return Channel (HDMI ARC) cable.
1. A television configured to update the firmware in a connected audio device, comprising: an audio data buffer having an audio data signal input and an audio data buffer signal output; a firmware update data buffer having a firmware update data buffer signal input and a firmware update data buffer signal output; a firmware data and audio data multiplexer having a first input operatively connected to the audio data buffer signal output, a second input operatively connected to the firmware update data buffer signal output, and an output operatively connected to the audio device input via an audio return channel of a High-Definition Multimedia Interface Audio Return Channel (HDMI ARC) cable; and a data stream clock and synchronization module, wherein the data stream clock and synchronization module has an audio data rate signal input and a clock signal output, wherein the clock signal output is connected to a clock signal input of the firmware data and audio data multiplexer.
11. A television, comprising a multiplexer configured to multiplex audio data and firmware update data for an audio device and transmit multiplexed audio data and firmware update data to the audio device.
14. A television, comprising: a multiplexer configured to multiplex audio data and firmware update data for an audio device and transmit multiplexed audio data and firmware update data to the audio device; and a data stream clock and synchronization module, wherein the data stream clock and synchronization module has an audio data rate signal input and a clock signal output, wherein the clock signal output is connected to a clock signal input of the multiplexer.
12. A system for updating firmware of an audio device, comprising an audio device connected to a television via an HDMI ARC cable, wherein the television is configured to transmit firmware update data to the audio device via an audio return channel of the HDMI ARC cable, and the audio device comprises a demultiplexer configured to demultiplex multiplexed audio data and firmware update data.
15. A system for updating firmware of an audio device, comprising: an audio device connected to a television via an HDMI ARC cable, wherein the television comprises a multiplexer having a clock signal input, a data stream clock and synchronization module having an audio data rate signal input, and a clock signal output, and wherein the clock signal output is connected to a clock signal input of the multiplexer, and the television is configured to transmit firmware update data to the audio device via an audio return channel of the HDMI ARC cable, and the audio device comprises a demultiplexer configured to demultiplex a data signal comprising multiplexed audio data and firmware update data and an embedded synchronization clock signal.
13. A method of updating firmware in an audio device connected to a television: receiving an audio data signal; receiving a firmware update data signal; multiplexing the audio data signal and the firmware update signal to create a multiplexed signal; and
transmitting the multiplexed signal to the audio device.
16. A method of updating firmware in an audio device connected to a television: receiving an audio data signal; receiving a firmware update data signal; multiplexing the audio data signal and the firmware update signal and embedding a synchronization clock signal to create a multiplexed signal; and transmitting the multiplexed signal to the audio device.
16. A method of updating firmware in an audio device, the method comprising: receiving a data signal comprising multiplexed audio and firmware update data signals; and
demultiplexing the multiplexed audio and firmware update data signals to define a demultiplexed audio signal and a demultiplexed firmware update signal; and
playing the demultiplexed audio signal.
19. A method of updating firmware in an audio device, the method comprising: receiving a data signal comprising multiplexed audio and firmware update data signals and an embedded synchronization clock signal; and demultiplexing the data signal comprising multiplexed audio and firmware update data signals and an embedded synchronization clock signal to define a demultiplexed audio signal and a demultiplexed firmware update signal; and playing the demultiplexed audio signal.
18. An audio device, comprising: an audio input configured to receive audio signals from an audio source; a central processing unit;
a firmware data demultiplexer operatively connected to the audio input and the processor, wherein the demultiplexer is operable to demultiplex multiplexed audio data signals and firmware update data signals received via the audio input.
21. An audio device, comprising: an audio input configured to receive audio signals from an audio source; a central processing unit; a firmware data demultiplexer operatively connected to the audio input and the processor, wherein the demultiplexer is operable to demultiplex a data signal comprising multiplexed audio data and firmware update data signals and an embedded synchronization clock signal received via the audio input.
Dependent claims 2-9, 14-15, 17 and 19-20 are also obvious and parallel in nature to patented dependent claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-7 and 11-15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Perry et al US 2008/0172708.
Regarding claim 1
Perry et al teaches
an audio data buffer having an audio data signal input and an audio data buffer signal output [0254] In order to achieve maximum transmission throughput it is preferable to avoid having the processor copy the data. Therefore a DMA controller within the A/V subsystem FPGA transfers the video/audio data into frame buffers owned by the A/V subsystem driver. The FPGA has an array of pointers to 16 video frame buffers and 16 audio frame buffers. The frame pointer arrays will be initialized by the processor during startup. The FPGA will iterate through all the frame buffers before beginning at the first one again. The frame buffers will be memory mapped by the A/V subsystem logical driver in order to avoid having to copy the data into user space. The A/V subsystem driver will notify the logical driver of the arrival of data. If there is an active session the logical driver will then send an event to AOAvSessionTx to transmit the data, using RTP. Note that the marker bit in the RTP header will be set to indicate the start of a frame. The payload type field will indicate whether the packet is video or audio];
a firmware update data buffer having a firmware update data buffer signal input and a firmware update data buffer signal output [0511] now, the system's web user interface is described. The system provides a Web User Interface System that allows the user to configure system settings; display hardware and firmware version, connection status and signal strength etc; and update firmware. The web interface authorizes a single user, e.g. an audio and video (AV) system integrator, to configure hardware and software settings of Tx and Rx(s) via HTML Web pages. A Web browser communicates with embedded Web server using a 10/100 Ethernet or a 802.11a link connected to either the Tx, Rx(s) directly, through a router, or through web proxy via the Tx/Rx. The Ethernet link also transmits audio, video and control data];
a firmware data and audio data multiplexer having a first input operatively connected to the audio data buffer signal output, a second input operatively connected to the firmware update data buffer signal output, and an output operatively connected to the audio device input via an audio return channel of a High-Definition Multimedia Interface Audio Return Channel (HDMI ARC) cable [0611] the expansion bus of the IXP455 is a general purpose bus broken into eight chip selects that each cover a 32 Mbyte chunk of memory. Each chip select is programmable in terms of its timing, data width, multiplexed or non multiplexed address and data. The following tables show how to set up the expansion bus for the Expansion Connector and to program the FPGA] and [0091] In FIG. 1, the system 10 provides a wire replacement for a High Definition Multimedia Interface (in the art sometimes abbreviated HDMI, or simply HD) source connecting to an HDMI display. The system is composed of a transmitter 11 and one or more receivers 12. The transmitter will support communication to up to 8 receiver units. Each receiver will utilize a virtual clock that is synchronized by the transmitter therefore allowing each receiver to be in sync with each other receiver] and [0109] new operational firmware can be received via the RJ45 connection port. In the event of an interrupted or corrupted transfer, the unit remains sufficiently operational to communicate and receive a valid firmware application. Alternatively, upgrades to firmware can be made via the wireless link. A firmware upgrade operation for the transmitter 11 ideally contains the upgrade code for all processors and sub-processors contained within the transmitter 11, rather than upgrading the parts of the transmitter individually].
Regarding claim 2
Perry et al teaches
the multiplexer is configured to receive audio data at a first data rate and transmit multiplexed data at a multiple of the first data rate [0172] within a system 10, a single receiver 12 of the set of receivers (such as are shown in FIG. 1) is designed as the master receiver. Data received by the serial port of the transmitter 11 is passed unmodified to the master receiver 12 which sends it out its RS232 port at the same data rate as received by the transmitter 11. Data received by the serial port of the Master Receiver will be passed unmodified to the Transmitter which will send it out its RS232 port at the same data rate as received by the Master Receiver].
Regarding claim 3
Perry et al teaches
the multiplexer is configured to transmit audio data received at the first input and at the first data rate to an audio input of the audio device in a first portion of data frames having a frame period at the multiple of the first data rate [0251] audio and/or video data can be encrypted as they are transmitted across the network, wired or wireless. Various encryption programs are available, including standard cipher algorithms, Secure Socket Layer, OCF (OpenBSD Crytographic Framework), Secure RTP, IPSec, and Openswan. Other encryption schemes will undoubtedly arise in the future. Presently, Openswan is preferred. There are also several approaches for key management, including fixed shared keys, manually set shared keys, and dynamic keys such as described at http://www.securemulticast.org/msec-index.htm. Either manual or fixed shared keys are preferred].
Regarding claims 4, 6 and 14
Pery et al teaches
the multiplexer is configured to transmit firmware update data received at the second input and at the first data rate to the audio input of the audio device in a second portion of the data frames having the frame period at the multiple of the first data rate [0207] new operational firmware is received by the receiver via an Ethernet RJ45 connection port. In the event of an interrupted or corrupted transfer, the product shall remain sufficiently operational to communicate and receive a valid firmware application. A firmware upgrade operation of the receiver contains the upgrade code for all processors and sub-processors contained within the receiver, so there is no need to upgrade the parts of the receiver individually. Firmware upgrades can also be done by the wireless link].
Regarding claim 5
Perry et al teaches
the multiplexer is configured to transmit audio data received at the first input and at the first data rate to the audio device input in a first portion of a bit period at the multiple of the first data rate [0254] in order to achieve maximum transmission throughput it is preferable to avoid having the processor copy the data. Therefore a DMA controller within the A/V subsystem FPGA transfers the video/audio data into frame buffers owned by the A/V subsystem driver. The FPGA has an array of pointers to 16 video frame buffers and 16 audio frame buffers. The frame pointer arrays will be initialized by the processor during startup. The FPGA will iterate through all the frame buffers before beginning at the first one again. The frame buffers will be memory mapped by the A/V subsystem logical driver in order to avoid having to copy the data into user space. The A/V subsystem driver will notify the logical driver of the arrival of data. If there is an active session the logical driver will then send an event to AOAvSessionTx to transmit the data, using RTP. Note that the marker bit in the RTP header will be set to indicate the start of a frame. The payload type field will indicate whether the packet is video or audio].
Regarding claim 7
Perry et al teaches
the television is selectively connectable to a remote server to receive firmware update data for the audio device (see summary of the invention and fig. 1).
Regarding claim 11
Perry et al teaches
a multiplexer configured to multiplex audio data and firmware update data for an audio device and transmit multiplexed audio data and firmware update data to the audio device [0511] now, the system's web user interface is described. The system provides a Web User Interface System that allows the user to configure system settings; display hardware and firmware version, connection status and signal strength etc; and update firmware. The web interface authorizes a single user, e.g. an audio and video (AV) system integrator, to configure hardware and software settings of Tx and Rx(s) via HTML Web pages. A Web browser communicates with embedded Web server using a 10/100 Ethernet or a 802.11a link connected to either the Tx, Rx(s) directly, through a router, or through web proxy via the Tx/Rx. The Ethernet link also transmits audio, video and control data].
Regarding claim 12
Perry et al teaches
an audio device connected to a television via an HDMI ARC cable, wherein the television is configured to transmit firmware update data to the audio device via an audio return channel of the HDMI ARC cable, and the audio device comprises a demultiplexer configured to demultiplex multiplexed audio data and firmware update data [0611] the expansion bus of the IXP455 is a general purpose bus broken into eight chip selects that each cover a 32 Mbyte chunk of memory. Each chip select is programmable in terms of its timing, data width, multiplexed or non multiplexed address and data. The following tables show how to set up the expansion bus for the Expansion Connector and to program the FPGA] and [0091] In FIG. 1, the system 10 provides a wire replacement for a High Definition Multimedia Interface (in the art sometimes abbreviated HDMI, or simply HD) source connecting to an HDMI display. The system is composed of a transmitter 11 and one or more receivers 12. The transmitter will support communication to up to 8 receiver units. Each receiver will utilize a virtual clock that is synchronized by the transmitter therefore allowing each receiver to be in sync with each other receiver] and [0109] new operational firmware can be received via the RJ45 connection port. In the event of an interrupted or corrupted transfer, the unit remains sufficiently operational to communicate and receive a valid firmware application. Alternatively, upgrades to firmware can be made via the wireless link. A firmware upgrade operation for the transmitter 11 ideally contains the upgrade code for all processors and sub-processors contained within the transmitter 11, rather than upgrading the parts of the transmitter individually].
Regarding claim 13
Perry et al teaches
receiving an audio data signal [0258] the receivers 12 operate in synchronism. Continuous audio and video streams are delivered in real-time. When using asynchronous networks for data transmission, however, timing information of the media units produced gets lost and a mechanism is required to ensure continuous and synchronous playback at the receiver side. Inter-stream synchronization between audio and video streams, as well as between different receivers are also required];
receiving a firmware update data signal [0491] the physical display is updated a single grid at a time. Grid updates are controlled by timer0, match register 0, which expires and interrupts every 500 uS. A grid update requires approximately 200 uS. As shown in FIGS. 24 and 25, when timer 1 expires it signals the main loop to begin a grid update. The match register reloads automatically each time it expires so the only action required in the ISR is sending the signal and clearing the interrupt]
multiplexing the audio data signal and the firmware update signal to create a multiplexed signal [0611] the expansion bus of the IXP455 is a general purpose bus broken into eight chip selects that each cover a 32 Mbyte chunk of memory. Each chip select is programmable in terms of its timing, data width, multiplexed or non multiplexed address and data. The following tables show how to set up the expansion bus for the Expansion Connector and to program the FPGA];
transmitting the multiplexed signal to the audio device [0645] ALIP is used to establish and maintain the communication link between a transmitter and a receiver in a network. It also passes control and information messages between transmitter and receivers. If there are multiple receivers, there is one ALIP link between the transmitter and each receiver. The concept of ALIP links is illustrated in FIG. 54. Some ALIP messages are carried by UDP packets since they may be broadcast before an IP address is assigned].
Regarding claim 15
Rejection of claims 1 and 13 are incorporated and further claim recite similar limitations claim 1 therefore rejected under same rationale.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 8-9 and 16-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Perry et al US 2008/017208 in view of Jeong US 2014/0026166.
Regarding claim 8
Perry et al teaches
an audio device and an audio processor, a central processing unit, [511] now, the system's web user interface is described. The system provides a Web User Interface System that allows the user to configure system settings; display hardware and firmware version, connection status and signal strength etc; and update firmware. The web interface authorizes a single user, e.g. an audio and video (AV) system integrator, to configure hardware and software settings of Tx and Rx(s) via HTML Web pages. A Web browser communicates with embedded Web server using a 10/100 Ethernet or a 802.11a link connected to either the Tx, Rx(s) directly, through a router, or through web proxy via the Tx/Rx. The Ethernet link also transmits audio, video and control data.]. Perry et al doesn’t fairly teaches a demultiplexer, wherein the demultiplexer comprises a multiplexed data signal input, a demultiplexed firmware update data signal output operatively connected the central processing unit and a demultiplexed audio data signal output operatively connected to the central processing unit, however Jeong teaches 0200] The signal processor 260 processes an input signal. For example, the signal processor 260 may demultiplex or decode an input video or audio signal. For signal processing, the signal processor 260 may include a video decoder or an audio decoder. The processed video or audio signal may be transmitted to the display device 300 through the external device interface 265. The set-top box 250 may further include a media input unit for media playback. The media input unit may be a Blu-ray input unit (not shown), for example. That is, the set-top box 250 may include a Blu-ray player. After signal processing such as demultiplexing or decoding in the signal processor 260, a media signal from a Blu-ray disc may be transmitted to the display device 300 through the external device interface 265 so as to be displayed on the display device 300]. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate demultiplexing. The modification would have been obvious because one of ordinary skill in the art would have been motivated to combine teaching into audio video set up as it allows a single data stream to be directed to multiple destinations within a system and its useful in data routing scenarios where a signal needs to be sent to different components or memory locations without duplicating the data.
Regarding claim 9
Perry et al teaches
an audio device transceiver connected to the audio device input [0258] the receivers 12 operate in synchronism. Continuous audio and video streams are delivered in real-time. When using asynchronous networks for data transmission, however, timing information of the media units produced gets lost and a mechanism is required to ensure continuous and synchronous playback at the receiver side. Inter-stream synchronization between audio and video streams, as well as between different receivers are also required].
Regarding claim 16
Perry et al teaches
receiving a data signal comprising multiplexed audio and firmware update data signals [0611] the expansion bus of the IXP455 is a general purpose bus broken into eight chip selects that each cover a 32 Mbyte chunk of memory. Each chip select is programmable in terms of its timing, data width, multiplexed or non multiplexed address and data. The following tables show how to set up the expansion bus for the Expansion Connector and to program the FPGA] and [0091] In FIG. 1, the system 10 provides a wire replacement for a High Definition Multimedia Interface (in the art sometimes abbreviated HDMI, or simply HD) source connecting to an HDMI display. The system is composed of a transmitter 11 and one or more receivers 12. The transmitter will support communication to up to 8 receiver units. Each receiver will utilize a virtual clock that is synchronized by the transmitter therefore allowing each receiver to be in sync with each other receiver] and [0109] new operational firmware can be received via the RJ45 connection port. In the event of an interrupted or corrupted transfer, the unit remains sufficiently operational to communicate and receive a valid firmware application. Alternatively, upgrades to firmware can be made via the wireless link. A firmware upgrade operation for the transmitter 11 ideally contains the upgrade code for all processors and sub-processors contained within the transmitter 11, rather than upgrading the parts of the transmitter individually]. Perry et al doesn’t teach explicitly, however Jeong teaches demultiplexing the multiplexed audio and firmware update data signals to define a demultiplexed audio signal and a demultiplexed firmware update signal and playing the demultiplexed audio signal [0204] The display device 300 may include a tuner 270, an external device interface 273, a demodulator 275, a memory 278, a controller 280, a user input interface 283, a display 290, and an audio output unit 295. The DEMUX 310 demultiplexes an input stream. For example, the DEMUX 310 may demultiplex an MPEG-2 TS into a video signal, an audio signal, and a data signal. The stream signal input to the DEMUX 310 may be received from the tuner 110, the demodulator 120 or the external device interface 135. The video processor 320 may process the demultiplexed video signal. For video signal processing, the video processor 320 may include a video decoder 325 and a scaler 335. The video decoder 325 decodes the demultiplexed video signal and the scaler 335 scales the decoded video signal so that the video signal can be displayed on the display 180]. Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate demultiplexing in updating firmware in video. The modification would have been obvious because one of ordinary skill in the art would have been motivated to combine teaching into and allows demultiplexers which are essential in frequency division multiplexing (FDM) and time division multiplexing (TDM) systems and isolate individual channels (frequency bands or time slots) so that each signal can be processed independently.
Regarding claim 17
Rejection of claims 1 and 16 are incorporated and further claim recite similar limitations claim 1 therefore rejected under same rationale.
Regarding claim 18
Perry et al teaches
an audio input configured to receive audio signals from an audio source; a central processing unit [0394] in the receiver the host processor sends video frames to the JPEG2000 decoder via the A/V subsystem FPGA. A HDMI transmitter receives uncompressed video from the decoder and outputs an HDMI stream. Audio frames are sent to the A/V subsystem FPGA which after processing forwards the audio data to the HDMI transmitter as well as the audio CODEC. When the source is DVI audio is supplied via separate audio connectors from the audio CODEC]. Perry et al doesn’t teach explicitly data demultiplexer operatively connected to the audio input and the processor, wherein the demultiplexer is operable to demultiplex multiplexed audio data signals and firmware update data signals received via the audio input, however, Jeong teaches [0203] the set-top box 250 may further include a media input unit for media playback. The media input unit may be a Blu-ray input unit (not shown), for example. That is, the set-top box 250 may include a Blu-ray player. After signal processing such as demultiplexing or decoding in the signal processor 260, a media signal from a Blu-ray disc may be transmitted to the display device 300 through the external device interface 265 so as to be displayed on the display device 300] and [0317] The broadcast interface 1901 is connected to an external broadcast station or a server to receive a general broadcast program and so on. The demultiplexer 1902 demultiplexes audio data and video data of a general broadcast program received from the broadcast interface 1901. Furthermore, the audio decoder 1903 decodes the audio data received from the demultiplexer 1902 and outputs the audio data to the speaker 1904. The video decoder 1905 decodes the video data received from the demultiplexer 1902 and outputs the video data to the display 1906]. The feature of providing demultiplex audio data…would be obvious for the reasons set forth in the rejection of claim 1.
Regarding claim 19
Rejection of claims 1 and 18 are incorporated and further claim recite similar limitations claim 18 therefore rejected under same rationale.
Regarding claim 20
Perry et al teaches
a non-transitory computer readable medium having computer executable instructions stored thereon which, when executed by the central processing unit, cause a control signal to be transmitted to the control signal input, and wherein a value of the control signal determines whether a signal received by the audio input during a specified period is transmitted to the audio processor or the firmware update receiver [[0418] the HDCP Authentication protocol is an exchange between an HDCP Transmitter and an HDCP Receiver that affirms to the HDCP Transmitter that the HDCP Receiver is authorized to receive HDCP Content. This affirmation is in the form of the HDCP Receiver demonstrating knowledge of a set of secret device keys. Each HDCP Device is provided with a unique set of secret device keys, referred to as the Device Private Keys, from the Digital Content Protection LLC. The communication exchange, which allows for the receiver to demonstrate knowledge of such secret device keys, also provides for both HDCP Devices to generate a shared secret value that cannot be determined by eavesdroppers on this exchange. By having this shared secret formation melded into the demonstration of authorization, the shared secret can then be used as a symmetric key to encrypt HDCP Content intended only for the Authorized Device. Thus, a communication path is established between the HDCP Transmitter and HDCP Receiver that only Authorized Devices can access]. The feature of providing receiver… would be obvious for the reasons set forth in the rejection of claim 1.
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Relevant Prior Art
US 9826529 B1 Jorgovanovic teaches Adaptive Wireless Frequency Band Sharing
US 9710055 B1 Lee et al teaches Method And System For Abstracting External Devices Via A High Level Communications Protocol
US 10638417 B1 Baki et al teaches Cloud-based Provisioning Using Peer Devices
Examiner’s Interview
On 5/28/2026 Examiner Khatri conducted a telephone interview with applicants’ representative, Hector Agdeppa and discussed the key features of the invention, double patenting, examiner’s amendment, dependency of claims and further to clarify the invention. No agreement was reached and examiner wish to express his appreciation to the applicant’s representative for his time and meaningful discussion during the interview.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Anil Khatri whose telephone number is (571)272-3725. The examiner can normally be reached M-F 8:30-5:00.
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/ANIL KHATRI/Primary Examiner, Art Unit 2191
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