Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
This is in response to applicant’s filing date of June 12, 2024. Claims 1-20 are currently pending.
Priority
Acknowledgment is made of applicant’s claim for foreign priority to Application EP23180014.5, filed on June 19, 2023. The certified copy of the application as required by 37 CFR 1.55 has been received.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on June 12, 2024, is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections – 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claim 19 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter because the claim is directed to a " computer program " that can encompass non-statutory transitory forms of signal transmission, such as a propagating electrical or electromagnetic signal per se. (See In re Nuijten, 500 F.3d 1346, 84 USPQ2d 1495 (Fed. Cir. 2007).
Claim Rejections – 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Fan et al (US-20200217899-A1)(“Fan”) and Christophersen et al (US- 20200300920-A1)(“Christophersen”).
As per claim 1, Fan discloses a computer system comprising processing circuitry configured (Figure 1) to:
measure initial voltages V0+ and V0- between a respective positive and negative pole of a battery in a vehicle and a ground potential of the vehicle (Fan at Para. [0032] discloses sampling initial voltages:” the controller 50 shown in FIG. 1 may use a minimum of four discrete voltage samples of each of the first and second voltages V1 and V2 to determine the above-noted RC response.”);
connect a resistance between one pole of the battery and the ground potential (Fan at Para. [0004] discloses connecting a resistance to sample the voltages:” controller disclosed herein automatically switches in a bias resistor via operation of a switch, doing so responsive to a trigger signal, and then periodically measures bus rail voltages at a calibrated sampling interval, i.e., a first voltage between a positive rail of the voltage bus and electrical ground, and a second voltage between the negative rail of the voltage bus and the electrical ground.”);
measure at least two voltages V(t) over the resistance before the voltage has reached a steady state voltage (Fan a Para. [0005] discloses acquiring voltage samples before circuit reaches steady state:” controller uses the estimated steady-state voltages, once the estimates are sufficiently stable, to more rapidly determine information such as a resistance of the electrical circuit, rather than waiting for the bus rail voltages to fully stabilize at their respective actual steady-state voltages.”);
;
estimate a steady state voltage over the resistance based on the fitted voltage step response model (Fan at Para. [0014] discloses determining an estimate of the steady state voltage based on sampled voltage trends:” estimating steady-state voltage values of the electric circuit, via the controller, based on the RC response of the electrical circuit, doing so using the voltage samples prior to the first and second voltages converging on the respective actual steady-state voltages.”) ; and
determine an isolation resistance based on the estimated steady state voltage (Fan at Para. [0003] discloses the determining of the isolation resistance for the circuit:” controller is programmed to determine an RC response [isolation resistance] of the electrical circuit when estimating a steady-state voltage level of the voltage bus, and to use the response to determine whether the estimated steady-state voltages are sufficiently stable relative to a stability threshold.”).
Fan does not explicitly disclose fitting or using a voltage response model to estimate the steady state voltage from the measured or sampled voltage levels.
Christophersen in the same field of endeavor discloses a method for determining the impedance of a Device Under Test (DUT) from sampled voltages using a “step response of an RC circuit, which is typically used to model battery pulse behavior”. At Para. [0107].
In particular, Christophersen discloses a process to fit a predetermined voltage step response model to the at least two measured voltages and the initial voltage of the pole for which the resistance is connected (Christophersen at Paras. [0113]-[0120] discloses that fitting function can be used to estimate a battery response:” curve fitting technique, such as, for example, linear regression can be used for the estimate of the battery response to the load condition. Equation 1 can be used to fit both charge load conditions and discharge load conditions.” At Para. [0119]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement linear regression to determine impedance of a circuit taught in Christophersen in the system of Fan with a reasonable expectation of success. because this results in a fast and adjustable measurement method for more robust and accurate battery assessments for performance, health, safety, and the like of vehicle batteries or circuits (see Christophersen at Para. [0009].).
As per claim 2, Fan and Christophersen disclose a computer system according to claim 1, wherein the processing circuitry is further configured to:
determine a quality measure of the fitted voltage step response model (Christophersen at Figure 12 and Para. [0126] disclosing the use of mean-square optimization as a quality measure:” optimization curve using mean-square-error optimization on the exponential expression. The curve 1210 illustrates error in the curve fit relative to the adjustment factor.”);
compare the quality measure with a predetermined quality threshold (Christophersen at Figure 12 and Para. [0126] discloses that the errors are computed and compared to ascertain the lowest error (point 1215):” exponential expression can be repeatedly recomputed while varying the adjustment factor and applying a mean-square-error computation to the curve fit.”); and
discard a fit having a quality measure below the predetermined quality threshold (Christophersen at Para. [0172] discloses applying various guesses until arriving at an exponential function that produces the minimal error of the curve fitting:” single point or an average of points can be taken to fit the exponential. Since this is not the final steady state value, an adjustment factor is included and a mean-square-error optimization analysis is performed (as shown in FIG. 17B). The actual XSS value will be determined based on a local minimum in the error analysis.”).
As per claim 3, Fan and Christophersen disclose a computer system according to claim 2, wherein the processing circuitry is further configured to:
perform a second fit of the predetermined voltage step response model, the second fit being fitted to a higher number of measured voltages compared to the first fit (Fan at Para. [0006] discloses increasing the number of initial samples:” controller may account for signal noise by running multiple additional iterations of the present method, with each iteration possibly extending the sampling interval by a calibrated multiple, and also reusing some of the earlier voltage samples, which in turn minimizes the required time for subsequent iterations. With each subsequent iteration, the controller uses different sample triplets (or more samples) that are more spread out in time.”).
As per claim 4, Fan and Christophersen disclose a computer system according to claim 1, where the at least two voltages used to fit the voltage step response model are the first voltage samples acquired after connecting the resistance (Fan at Para. [0008] discloses using the acquired samples after the switching:” a controller closes the switch responsive to a trigger signal, measures at least five voltage samples of the first and second voltages (bus rail voltages) at a calibrated sampling interval, estimates steady-state voltages of the electric circuit based on an RC response of the electrical circuit, and uses the voltage samples, prior to the first and second voltages converging on respective actual steady-state voltages, to execute a control action of the electrical system.”).
As per claim 5, Fan and Christophersen disclose a computer system according to claim 1, wherein the control circuitry is further configured to control a transistor to connect the resistance (Fan at Para. [0028] discloses using semiconductor type device for the switching which under broadest reasonable interpretation would be a transistor type device:” BDU 25 also includes high-voltage switching devices such as solenoid-driven contactors, solid-state/semiconductor switches, and/or other suitable switching devices, a pre-charge resistor, and other components for electrically connecting the RESS 14 to the remainder of the electrical system 10.”).
As per claim 6, Fan and Christophersen disclose a computer system according to claim 1, wherein the voltage step response model is described by V(t)=VSS+(V0-VSS)e(-t/τ) (Christophersen at Para. [0113] discloses the claimed step response function.).
As per claim 6, Fan and Christophersen disclose a computer system according to claim 1, wherein the processing circuitry is further configured to:
determine a first isolation resistance between a positive pole of the battery and ground (Fan at Para. [0042] discloses a first voltage between positive and ground to determine resistance:” the controller 50 may calculate and output the equivalent resistance of the various circuit components connected to the RESS 14 of FIG. 1, which in the example high-voltage isolation detection approach corresponds to an isolation resistance value.); and
determine a second isolation resistance between a negative pole of the battery and ground (Fan at Para. [0007] discloses a second voltage between negative and ground:” a second voltage between the negative bus rail and the electrical ground”.).
As per claim 8, Fan and Christophersen disclose a computer system according to claim 1, wherein the processing circuitry is configured to control a voltage measurement unit arranged between a pole of the battery and the ground potential to measure the at least two voltages over the resistance (Fan at Para. [0007] discloses switch the sensor device to measure the range of voltages:” circuit also includes one or more voltage sensors configured to measure a first voltage between the positive bus rail and electrical ground, and a second voltage between the negative bus rail and the electrical ground. A bias resistor is connectable to electrical ground and to the voltage bus via a switch. The switch, when it is in a closed state, electrically connects the bias resistor to one side of the voltage bus.”).
As per claim 9, Fan and Christophersen disclose a computer system according to claim 1, further comprising a filter configured to filter the at least two measured voltages to reduce noise (Fan at Para. [0032] disclose the use of a low-pass filter to reduce noise:” the method 100 is robust and adaptable to signal noise. Variable-length sampling may be used in conjunction with a rationality/pass-fail diagnostic check using various criteria, such as but not limited to standard deviation of the time constants, voltages, equivalent resistance, and/or other values as described below with reference to FIGS. 6A-6C, with optional low-pass filtering of the sampling data in certain embodiments.”).
As per claim 10, Fan and Christophersen disclose a computer system of claim 9, wherein the filter is configured to remove outliers based on a difference between a measured sample and one or more previous samples (Fan at Para. [0039] discloses discarding prior samples:” first collected sample of the prior group is discarded and a new sample is collected, e.g., in sample group 2, the first sample V.sub.t1 of sample group 1 is discarded and a new discrete voltage sample V.sub.t4 is collected, while in group 3, the first sample V.sub.t2 of sample group 1 is discarded and a new discrete voltage sample V.sub.t5 is collected.”)
As per claim 11, Fan and Christophersen disclose a computer system of claim 1, wherein the processing circuitry is configured to:
measure an initial voltage V0+ between a positive pole of the battery and ground (Fan at Para. [0007] discloses a first voltage between positive and ground:” a first voltage between the positive bus rail and electrical ground”.) (Fan at Para. [0007] discloses a first voltage between positive and ground:” a first voltage between the positive bus rail and electrical ground”.);
measure an initial voltage V0- between a negative pole of the battery and ground (Fan at Para. [0007] discloses a second voltage between negative and ground:” a second voltage between the negative bus rail and the electrical ground”.);
connect a first resistance between the positive pole of the battery and a ground potential (Fan at Para. [0028] discloses using semiconductor type device for the switching which under broadest reasonable interpretation would be a transistor type device:” BDU 25 also includes high-voltage switching devices such as solenoid-driven contactors, solid-state/semiconductor switches, and/or other suitable switching devices, a pre-charge resistor, and other components for electrically connecting the RESS 14 to the remainder of the electrical system 10.”);
measure a first set of at least two voltages over the first resistance before the voltage has reached a steady state voltage (Fan at Para. [0032] discloses sampling initial voltages:” the controller 50 shown in FIG. 1 may use a minimum of four discrete voltage samples of each of the first and second voltages V1 and V2 to determine the above-noted RC response.”);
fit the predetermined voltage step response model to the first set of at least two voltages and the initial voltage V0+ (Christophersen at Paras. [0113]-[0120] discloses that fitting function can be used to estimate a battery response:” curve fitting technique, such as, for example, linear regression can be used for the estimate of the battery response to the load condition. Equation 1 can be used to fit both charge load conditions and discharge load conditions.” At Para. [0119]);
estimate a positive steady state voltage over the first resistance based on the fitted voltage step response model (Fan at Para. [0014] discloses determining an estimate of the steady state voltage based on sampled voltage trends:” estimating steady-state voltage values of the electric circuit, via the controller, based on the RC response of the electrical circuit, doing so using the voltage samples prior to the first and second voltages converging on the respective actual steady-state voltages.”);
determine a first isolation resistance based on the estimated positive steady state voltage (Fan at Para. [0042] discloses a first voltage between positive and ground to determine resistance:” the controller 50 may calculate and output the equivalent resistance of the various circuit components connected to the RESS 14 of FIG. 1, which in the example high-voltage isolation detection approach corresponds to an isolation resistance value.);
disconnect the first resistance (Fan at Para.[0042] discloses a disconnection process:” controller 50 to record a diagnostic code or a corresponding pass/fail bit flag, and/or to command a disconnection of the RESS 14 or disabling charging when the isolation resistance value is too low in the exemplary vehicular embodiment of FIG. 1.”);
measure an initial voltage V0- between a negative pole of the battery and ground (Fan at Para. [0032] discloses sampling initial voltages:” the controller 50 shown in FIG. 1 may use a minimum of four discrete voltage samples of each of the first and second voltages V1 and V2 to determine the above-noted RC response.”);
measure an initial voltage V0+ between a positive pole of the battery and ground (Fan at Para. [0031] and Para. [0032] discloses sampling initial voltages:” the controller 50 shown in FIG. 1 may use a minimum of four discrete voltage samples of each of the first and second voltages V1 and V2 to determine the above-noted RC response.”);
connect a second resistance between the negative pole of the battery and the ground potential (Fan at Para. [0031]:”the negative bus rail 13.sup.− collectively exhibit a capacitance (C2) and a resistance (R2) that give rise to the trajectory of time plot 48 (FIG. 3B).”);
measure a second set of at least two voltages over the second resistance before the voltage has reached a steady state voltage (Fan a Para. [0005] discloses acquiring voltage samples before circuit reaches steady state:” controller uses the estimated steady-state voltages, once the estimates are sufficiently stable, to more rapidly determine information such as a resistance of the electrical circuit, rather than waiting for the bus rail voltages to fully stabilize at their respective actual steady-state voltages.”);
fit the predetermined voltage step response model to the second set of at least two voltages and the initial voltage V0- (Fan at Para. [0008] discloses using the acquired samples after the switching:” a controller closes the switch responsive to a trigger signal, measures at least five voltage samples of the first and second voltages (bus rail voltages) at a calibrated sampling interval, estimates steady-state voltages of the electric circuit based on an RC response of the electrical circuit, and uses the voltage samples, prior to the first and second voltages converging on respective actual steady-state voltages, to execute a control action of the electrical system.”);
estimate a negative steady state voltage over the second resistance based on the fitted voltage step response model (Fan at Para. [0030] discloses estimating the first and second steady state voltages:” the first and second voltages V1 and V2 will eventually reach their respective actual steady-state voltages (V.sub.SS or −V.sub.SS), with V.sub.SS and −V.sub.SS not necessarily having the same absolute voltage.”); and
determine a second isolation resistance based on the estimated negative steady state voltage (Fan at Para. [0030] discloses estimating the first and second steady state voltages:” the first and second voltages V1 and V2 will eventually reach their respective actual steady-state voltages (V.sub.SS or −V.sub.SS), with V.sub.SS and −V.sub.SS not necessarily having the same absolute voltage.”).
As per claim 12, Fan and Christophersen disclose a vehicle comprising the computer system of claim 1 (Fan at Figure 1, vehicle 12.).
As per claim 13, Fan discloses a computer-implemented method (Figure 4), comprising:
by processing circuitry of a computer system, measuring initial voltages V0+ and V0- between a respective positive and negative pole of a battery and ground (Fan at Para. [0032] discloses sampling initial voltages:” the controller 50 shown in FIG. 1 may use a minimum of four discrete voltage samples of each of the first and second voltages V1 and V2 to determine the above-noted RC response.”); (Fan at Para. [0032] discloses sampling initial voltages:” the controller 50 shown in FIG. 1 may use a minimum of four discrete voltage samples of each of the first and second voltages V1 and V2 to determine the above-noted RC response.”);;
connecting a resistance between one pole of the battery and the ground potential (Fan at Para. [0004] discloses connecting a resistance to sample the voltages:” controller disclosed herein automatically switches in a bias resistor via operation of a switch, doing so responsive to a trigger signal, and then periodically measures bus rail voltages at a calibrated sampling interval, i.e., a first voltage between a positive rail of the voltage bus and electrical ground, and a second voltage between the negative rail of the voltage bus and the electrical ground.”);
measuring at least two voltages V(t) over the resistance before the voltage has reached a steady state voltage (Fan a Para. [0005] discloses acquiring voltage samples before circuit reaches steady state:” controller uses the estimated steady-state voltages, once the estimates are sufficiently stable, to more rapidly determine information such as a resistance of the electrical circuit, rather than waiting for the bus rail voltages to fully stabilize at their respective actual steady-state voltages.”);
;
estimating a steady state voltage over the resistance based on the fitted voltage step response model (Fan at Para. [0014] discloses determining an estimate of the steady state voltage based on sampled voltage trends:” estimating steady-state voltage values of the electric circuit, via the controller, based on the RC response of the electrical circuit, doing so using the voltage samples prior to the first and second voltages converging on the respective actual steady-state voltages.”) ; and
determining an isolation resistance based on the estimated steady state voltage (Fan at Para. [0003] discloses the determining of the isolation resistance for the circuit:” controller is programmed to determine an RC response [isolation resistance] of the electrical circuit when estimating a steady-state voltage level of the voltage bus, and to use the response to determine whether the estimated steady-state voltages are sufficiently stable relative to a stability threshold.”).
Fan does not explicitly disclose fitting or using a voltage response model to estimate the steady state voltage from the measured or sampled voltage levels.
Christophersen in the same field of endeavor discloses a method for determining the impedance of a Device Under Test (DUT) from sampled voltages using a “step response of an RC circuit, which is typically used to model battery pulse behavior”. At Para. [0107].
In particular, Christophersen discloses a process to fitting a predetermined voltage step response model to the at least two measured voltages and the initial voltage of the pole for which the resistance is connected (Christophersen at Paras. [0113]-[0120] discloses that fitting function can be used to estimate a battery response:” curve fitting technique, such as, for example, linear regression can be used for the estimate of the battery response to the load condition. Equation 1 can be used to fit both charge load conditions and discharge load conditions.” At Para. [0119]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement linear regression to determine impedance of a circuit taught in Christophersen in the system of Fan with a reasonable expectation of success. because this results in a fast and adjustable measurement method for more robust and accurate battery assessments for performance, health, safety, and the like of vehicle batteries or circuits (see Christophersen at Para. [0009].).
As per claim 14, Fan and Christophersen disclose a computer implemented method according to claim 13, further comprising:
by the processing circuitry, determining a quality measure of the fitted voltage step response model (Christophersen at Figure 12 and Para. [0126] disclosing the use of mean-square optimization as a quality measure:” optimization curve using mean-square-error optimization on the exponential expression. The curve 1210 illustrates error in the curve fit relative to the adjustment factor.”);
comparing the quality measure with a predetermined quality threshold (Christophersen at Figure 12 and Para. [0126] discloses that the errors are computed and compared to ascertain the lowest error (point 1215):” exponential expression can be repeatedly recomputed while varying the adjustment factor and applying a mean-square-error computation to the curve fit.”); and
discarding a fit having a quality measure below the predetermined quality threshold (Christophersen at Para. [0172] discloses applying various guesses until arriving at an exponential function that produces the minimal error of the curve fitting:” single point or an average of points can be taken to fit the exponential. Since this is not the final steady state value, an adjustment factor is included and a mean-square-error optimization analysis is performed (as shown in FIG. 17B). The actual XSS value will be determined based on a local minimum in the error analysis.”.
As per claim 15, Fan and Christophersen disclose a method according to claim 14, further comprising:
by the processing circuitry, performing a second fit of the predetermined voltage step response model, the second fit being fitted to a higher number of measured voltages compared to the first fit (Fan at Para. [0006] discloses increasing the number of initial samples:” controller may account for signal noise by running multiple additional iterations of the present method, with each iteration possibly extending the sampling interval by a calibrated multiple, and also reusing some of the earlier voltage samples, which in turn minimizes the required time for subsequent iterations. With each subsequent iteration, the controller uses different sample triplets (or more samples) that are more spread out in time.”).
As per claim 16, Fan and Christophersen disclose a method according to claim 13, further comprising:
by the processing circuitry, determining a first isolation resistance between a positive pole of the battery and ground (Fan at Para. [0042] discloses a first voltage between positive and ground to determine resistance:” the controller 50 may calculate and output the equivalent resistance of the various circuit components connected to the RESS 14 of FIG. 1, which in the example high-voltage isolation detection approach corresponds to an isolation resistance value.); and
determining a second isolation resistance between a negative pole of the battery and ground (Fan at Para. [0007] discloses a second voltage between negative and ground:” a second voltage between the negative bus rail and the electrical ground”.).
As per claim 17, Fan and Christophersen disclose a method according to claim 13, further comprising controlling a voltage measurement unit arranged between a pole of the battery and the ground potential to measure the at least two voltages over the resistance (Fan a Para. [0005] discloses acquiring voltage samples before circuit reaches steady state:” controller uses the estimated steady-state voltages, once the estimates are sufficiently stable, to more rapidly determine information such as a resistance of the electrical circuit, rather than waiting for the bus rail voltages to fully stabilize at their respective actual steady-state voltages.”).
As per claim 18, Fan and Christophersen disclose a method according to claim 13, further comprising filtering the at least two measured voltages to reduce noise (Fan at Para. [0032] disclose the use of a low-pass filter to reduce noise:” the method 100 is robust and adaptable to signal noise. Variable-length sampling may be used in conjunction with a rationality/pass-fail diagnostic check using various criteria, such as but not limited to standard deviation of the time constants, voltages, equivalent resistance, and/or other values as described below with reference to FIGS. 6A-6C, with optional low-pass filtering of the sampling data in certain embodiments.”).
As per claim 19, Fan and Christophersen disclose a computer program product comprising program code for performing, when executed by the processing circuitry, the method of claim 13 (See Fan at Para. [0042], a code in memory (M) of the controller 50, in addition to above analyses of claim 13) .
As per claim 20, Fan and Christophersen disclose a non-transitory computer-readable storage medium comprising instructions, which when executed by the processing circuitry, cause the processing circuitry to perform the method of claim 13 (See Fan at Para. [0042], a code in memory (M) of the controller 50, in addition to above analyses of claim 13).
CONCLUSION
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Subbaraman; Anantharaman et al. (US-20190036356-A1) Method and System for Estimating Battery Open Cell Voltage, State of Charge, and State of Health During Operation of the Battery;
LINDSAY; Ryan et al. (US-20130300430-A1) ISOLATION MONITOR;
Comesaña; Pablo Fernández (US-20180222342-A1) DEVICE AND METHOD FOR MEASURING ISOLATION RESISTANCE OF BATTERY POWERED SYSTEMS;
HONG; Hyun-Ju et al. (US-20140159908-A1) ISOLATION RESISTANCE MEASURING APPARATUS HAVING FAULT SELF-DIAGNOSING FUNCTION AND FAULT SELF-DIAGNOSING METHOD USING THE SAME;
Tarchinski; James E. et al. (US-20080119976-A1) PROGNOSTIC FOR LOSS OF HIGH-VOLTAGE ISOLATION;
Bitenc; Bostjan (US-20220289034-A1) DYNAMIC ISOLATION MONITORING WITH LOW SENSITIVITY TO NOISE;
Fasching; Rainer et al. (US-11061076-B1) Battery cell analyzer.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELLIS B. RAMIREZ whose telephone number is (571)272-8920. The examiner can normally be reached 7:30 am to 5:00pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ramon Mercado can be reached at 571-270-5744. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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ELLIS B. RAMIREZ
Primary Examiner
Art Unit 3658
/ELLIS B. RAMIREZ/Examiner, Art Unit 3658
Prosecution Insights