DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dooper et al. (US 2011/0012677 A1 hereinafter Dooper), in view of Panov et al. (US 2014/0355790 A1 hereinafter Panov).
Claim(s) 1-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dooper et al. (US 2011/0012677 A1 hereinafter Dooper), in view of Panov et al. (US 2014/0355790 A1 hereinafter Panov).
As to claim 1, Dooper discloses in Fig. 4, a voltage sense circuit for measuring a load connected to a power amplifier wherein the load is configured to receive a first voltage (first output connection 206a between the positive supply voltage VP and ground as shown in Fig. 2; para [0021]) at a first end and a second voltage (second connection 206b between the positive supply voltage VP and ground as shown in Fig. 2; para [0021]) at a second end, wherein the first and the second voltages are in opposite phase ("The amplifier incorporates a second pair of power switching transistors M1′ M2′... switching a first output connection 206a between the positive supply voltage VP and ground. The second pair of transistors M1′, M2′ are driven by a second switching signal 204b with a signal that is dependent on an inverted version of the input signal 101 compared with the same triangular waveform 102, and provides a voltage on a second connection 206b between the positive supply voltage VP and ground" as shown in Fig. 2; para [0021]; load is loudspeaker connected across outputs), wherein the voltage sense circuit comprises:
a first input terminal coupled to the first voltage (input to sense circuit from half-bridge output 206a as shown in Fig. 4; para [0022]);
a second input terminal coupled to the second voltage (input to sense circuit from half-bridge output 206b as shown in Fig. 4; para [0022]) ("current sensing resistors 401a, 401b are connected between each N-MOS transistor M2, M2′ and ground. A voltage sense circuit 404 detects the voltage across each resistor 401a, 401b" as shown in Fig. 4; para [0022]; inputs to sense circuit from half-bridge outputs);
a first output terminal (VA from track-and-hold as shown in Fig. 10; para [0033]);
a second output terminal (VB from track-and-hold as shown in Fig. 10; para [0033]) ("passes an output signal, via a low pass filter 405, to a 12-bit ADC 406" as shown in Fig. 4; para [0022]; differential outputs VA, VB from track-and-hold as shown in Fig. 10; para [0033]);
a first voltage divider circuit comprising an input coupled to the first input terminal and an output coupled to the first output terminal (first current sensing resistor 401a as shown in Fig. 4; para [0022]);
a second voltage divider circuit comprising an input coupled to the second input terminal and an output coupled to the second output terminal (second current sensing resistor 401b as shown in Fig. 4; para [0022]) ("current sensing resistors 401a, 401b are connected between each N-MOS transistor M2, M2′ and ground... The voltage sense circuit may be configured to sample a differential voltage across the first and second current sensing resistors" as shown in Fig. 4; para [0022], [0025]; resistors act as matched dividers for voltage drop sensing); and
a driver circuit comprising a first input configured to receive a reference voltage (track-and-hold circuit with ground reference as shown in Fig. 10; para [0033]) ("A feature... is that the speaker current is sampled... when current is flowing through only the N-MOS transistors... No large common mode voltage swing over the sense resistors; No level shifting being required... An advantage of sensing the current between N-MOS transistors and ground is that only low voltages are applied to the voltage sensing circuit" as shown in Fig. 4; para [0027]; active sampling via track-and-hold circuit as shown in Fig. 10; para [0033]).
Dooper does not disclose a driver circuit comprising... a second input configured to receive a common mode signal from the first and the second voltage divider circuits, and an output configured to drive an output common mode voltage of the first and the second voltage divider circuits with the reference voltage.
However, Panov discloses a driver circuit comprising... a second input configured to receive a common mode signal from the first and the second voltage divider circuits, and an output configured to drive an output common mode voltage of the first and the second voltage divider circuits with the reference voltage (divert capacitors 20/22 with op-amp receiving common-mode feedback signals at Op Amp inputs and driving/shunting to V_ref as shown in Figs. 1-2, elements 20/22, 120/122; para [0013], [0017], [0039]) ("Capacitors (referred to as divert capacitors) are coupled between the feedback paths and a constant voltage reference (V_ref, e.g., ground...) to divert common-mode current away from the analog integrator... They protect the operational amplifier from common-mode feedback signals by providing a high-pass filter to the reference voltage, keeping the common-mode voltage at the Op Amp inputs small" as shown in Figs. 1-2, elements 20/22, 120/122; para [0013], [0017], [0039]; divert capacitors with op-amp act as driver, receiving CM from paths and driving/shunting to V_ref).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include a driver circuit comprising... a second input configured to receive a common mode signal from the first and the second voltage divider circuits, and an output configured to drive an output common mode voltage of the first and the second voltage divider circuits with the reference voltage, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 2, Dooper in view of Panov, as applied to claim 1.
Dooper does not disclose wherein the second input of the driver circuit is connected to the output of the driver circuit.
However, Panov discloses wherein the second input of the driver circuit is connected to the output of the driver circuit (second end of the first resistor R4p connected to the first end of the second resistor R4n and to an output of an amplifier as shown in Fig. 2; para [0016]; loop closes input to output via capacitors) ("The second end of the first resistor (R4p) is connected to the first end of the second resistor (R4n) and to an output of an amplifier" as shown in Fig. 2; para [0016]; loop closes input to output via capacitors).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the second input of the driver circuit is connected to the output of the driver circuit, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 3, Dooper in view of Panov, as applied to claim 1.
Dooper discloses wherein each of the first and second voltage dividers comprises a pair of resistors wherein each of the pair of resistors comprises a first end and a second end and wherein the first ends of the pair of resistors are respectively connected to the first and second output terminals and wherein the second ends of the pair of resistors are connected to each other (resistors tied to common ground/reference as shown in Fig. 4; para [0022], [0036]) ("current sensing resistors 401a, 401b are connected between each N-MOS transistor M2, M2′ and ground... the second end of the first resistor is coupled to the first input... the second end of the third resistor is coupled to the first input" as shown in Fig. 4; para [0022], [0036]; resistors tied to common ground/reference).
As to claim 4, Dooper in view of Panov, as applied to claim 3.
Dooper does not disclose wherein the second input and the output of the driver circuit are connected to the second ends of the pair of resistors.
However, Panov discloses wherein the second input and the output of the driver circuit are connected to the second ends of the pair of resistors (divert capacitors 120/122 to V_ref with resistors R1/R2 in feedback paths 124/126 as shown in Fig. 2; para [0016]) ("divert capacitors 120/122 to V_ref, feedback paths 124/126 with resistors R1/R2... the second end... is connected to the second input and to the output" as shown in Fig. 2; para [0016]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the second input and the output of the driver circuit are connected to the second ends of the pair of resistors, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 5, Dooper in view of Panov, as applied to claim 1.
Dooper discloses the resistor structure ("current sensing resistors 401a, 401b... the first end of the first... coupled to the first input terminal... the second end... coupled to the first output" as shown in Fig. 4; para [0022]).
Dooper does not disclose wherein the driver circuit comprises a first and a second resistors; wherein the first resistor comprises a first end and a second end and the second resistor comprises a first end and a second end; wherein the first end of the first resistor is coupled to the first input terminal of the voltage sense circuit, the second end of the first resistor is coupled to the first output terminal of the voltage sense circuit, the second end of the second resistor is coupled to the second input and to the output of the driver circuit.
However, Panov discloses wherein the driver circuit comprises a first and a second resistors; wherein the first resistor comprises a first end and a second end and the second resistor comprises a first end and a second end; wherein the first end of the first resistor is coupled to the first input terminal of the voltage sense circuit, the second end of the first resistor is coupled to the first output terminal of the voltage sense circuit, the second end of the second resistor is coupled to the second input and to the output of the driver circuit (resistors R1/R2 in feedback paths 124/126 as shown in Fig. 2; para [0016]) ("feedback paths 124/126 with resistors R1/R2... the second end of the second resistor (R2p) is coupled to the second input and to the output" as shown in Fig. 2; para [0016]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the driver circuit comprises a first and a second resistors; wherein the first resistor comprises a first end and a second end and the second resistor comprises a first end and a second end; wherein the first end of the first resistor is coupled to the first input terminal of the voltage sense circuit, the second end of the first resistor is coupled to the first output terminal of the voltage sense circuit, the second end of the second resistor is coupled to the second input and to the output of the driver circuit, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 6, Dooper in view of Panov, as applied to claim 5.
Dooper discloses matched pairs for negative side ("second pair... M1′, M2′... current sensing resistors 401a, 401b... the first end of the third resistor R1n is connected to the second input terminal... the second end... connected to the second output" as shown in Fig. 4; para [0021]-[0022]).
Dooper does not disclose wherein the driver circuit further comprises a third resistor and a fourth resistors; wherein the third resistor comprises a first end and a second end, and the fourth resistor comprises a first end and a second end; wherein the first end of the third resistor is connected to the second input terminal, the second end of the third resistor is connected to the second output terminal of the voltage sense circuit and to the first end of the fourth resistor; the second end of the fourth resistor is connected to the second output of the driver circuit, to the output of the driver circuit and to the second end of the second resistor.
However, Panov discloses wherein the driver circuit further comprises a third resistor and a fourth resistors; wherein the third resistor comprises a first end and a second end, and the fourth resistor comprises a first end and a second end; wherein the first end of the third resistor is connected to the second input terminal, the second end of the third resistor is connected to the second output terminal of the voltage sense circuit and to the first end of the fourth resistor; the second end of the fourth resistor is connected to the second output of the driver circuit, to the output of the driver circuit and to the second end of the second resistor (matched divert capacitors with resistors R1/R2 as shown in Fig. 2; para [0014], [0016]) ("divert capacitors... matched... the second end of the fourth resistor (R2n) is connected to the second output... and to the second end of the second resistor (R2p)" as shown in Fig. 2; para [0014], [0016]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the driver circuit further comprises a third resistor and a fourth resistors; wherein the third resistor comprises a first end and a second end, and the fourth resistor comprises a first end and a second end; wherein the first end of the third resistor is connected to the second input terminal, the second end of the third resistor is connected to the second output terminal of the voltage sense circuit and to the first end of the fourth resistor; the second end of the fourth resistor is connected to the second output of the driver circuit, to the output of the driver circuit and to the second end of the second resistor, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 7, Dooper in view of Panov, as applied to claim 1.
Dooper does not disclose wherein the driver circuit comprises a first and a second resistors, wherein the first resistor comprises a first end and a second end; the second resistor comprises a first end and a second end, the first end of the first resistor of the driver circuit is connected to the first output terminal, the second end of the second resistor is connected to the second output terminal, and the second end of the first resistor is connected to the first end of the second resistor and to an output of an amplifier.
However, Panov discloses wherein the driver circuit comprises a first and a second resistors, wherein the first resistor comprises a first end and a second end (first resistor R4p as shown in Figs. 2, 10; para [0016], [0039]); the second resistor comprises a first end and a second end, the first end of the first resistor of the driver circuit is connected to the first output terminal, the second end of the second resistor is connected to the second output terminal, and the second end of the first resistor is connected to the first end of the second resistor and to an output of an amplifier (second resistor R4n with first end of first resistor R4p connected to first output terminal and second end connected to first end of second resistor R4n and to output of amplifier as shown in Figs. 2, 10; para [0016], [0039]) ("divert capacitors... as resistors in feedback... the first end of the first resistor (R4p)... connected to the first output terminal... the second end... connected to the first end of the second resistor (R4n) and to an output of an amplifier" as shown in Figs. 2, 10; para [0016], [0039]; op-amp output connects via loop).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the driver circuit comprises a first and a second resistors, wherein the first resistor comprises a first end and a second end; the second resistor comprises a first end and a second end, the first end of the first resistor of the driver circuit is connected to the first output terminal, the second end of the second resistor is connected to the second output terminal, and the second end of the first resistor is connected to the first end of the second resistor and to an output of an amplifier, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 8, Dooper in view of Panov, as applied to claim 7.
Dooper does not disclose wherein the driver circuit further comprises a first and a second output resistors wherein the first output resistor is connected between the first output terminal and the first end of the first resistor and the second output resistor is connected between the second output terminal and the second end of the second resistor.
However, Panov discloses wherein the driver circuit further comprises a first and a second output resistors wherein the first output resistor is connected between the first output terminal and the first end of the first resistor and the second output resistor is connected between the second output terminal and the second end of the second resistor (first output resistor R1 and second output resistor R2 in feedback paths as shown in Fig. 2; para [0016]) ("feedback paths with resistors R1/R2... the second output resistor (R3n) is connected between the second output terminal" as shown in Fig. 2; para [0016]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the driver circuit further comprises a first and a second output resistors wherein the first output resistor is connected between the first output terminal and the first end of the first resistor and the second output resistor is connected between the second output terminal and the second end of the second resistor, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 9, Dooper in view of Panov, as applied to claim 8.
Dooper does not disclose wherein the first output resistor of the driver circuit comprises a first end and a second end and the second output resistor of the driver circuit comprises a first end and a second end; wherein the second end of the first output resistor of the driver circuit is connected to the first output terminal and the first end of the first output resistor of the driver circuit is connected to the first end of the first resistor, the second end of the second output resistor of the driver circuit is connected to the second output terminal and the first end of the second output resistor of the driver circuit is connected to the first end of the second resistor.
However, Panov discloses wherein the first output resistor of the driver circuit comprises a first end and a second end and the second output resistor of the driver circuit comprises a first end and a second end; wherein the second end of the first output resistor of the driver circuit is connected to the first output terminal and the first end of the first output resistor of the driver circuit is connected to the first end of the first resistor, the second end of the second output resistor of the driver circuit is connected to the second output terminal and the first end of the second output resistor of the driver circuit is connected to the first end of the second resistor (second end of first output resistor connected to first output terminal and first end connected to first end of first resistor R4p as shown in Fig. 2; para [0016]) ("the second end of the first output resistor (R3p)... connected to the first output terminal... the first end... connected to the first end of the first resistor (R4p)" as shown in Fig. 2; para [0016]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the first output resistor of the driver circuit comprises a first end and a second end and the second output resistor of the driver circuit comprises a first end and a second end; wherein the second end of the first output resistor of the driver circuit is connected to the first output terminal and the first end of the first output resistor of the driver circuit is connected to the first end of the first resistor, the second end of the second output resistor of the driver circuit is connected to the second output terminal and the first end of the second output resistor of the driver circuit is connected to the first end of the second resistor, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 10, Dooper in view of Panov, as applied to claim 8.
Dooper discloses wherein the first output terminal and the second output terminal of the voltage sense circuit are coupled together (outputs of both T&H circuits connected to an ADC as shown in Fig. 4; para [0033]) ("the outputs of both T&H circuits are connected to an ADC... the current can be measured differentially" as shown in Fig. 4; para [0033]).
As to claim 11, Dooper in view of Panov, as applied to claim 10.
Dooper does not disclose wherein the driver circuit comprises an operational amplifier, and wherein a non-inverting input of the operational amplifier is connected to the first input terminal, wherein an inverting input of the operational amplifier is connected to the second input terminal, and wherein an output of the operational amplifier is connected to the second end of the first resistor and to the first end of the second resistor.
However, Panov discloses wherein the driver circuit comprises an operational amplifier, and wherein a non-inverting input of the operational amplifier is connected to the first input terminal, wherein an inverting input of the operational amplifier is connected to the second input terminal, and wherein an output of the operational amplifier is connected to the second end of the first resistor and to the first end of the second resistor (Op Amp in integrator 116 with non-inverting input connected to first input terminal, inverting input connected to second input terminal, and output connected to second end as shown in Fig. 2, elements 116; para [0016]) ("Amplifier 100 with Op Amp in integrator 116... a non-inverting input of the operational amplifier is connected to the first input terminal... an inverting input... connected to the second input terminal... an output... connected to the second end" as shown in Fig. 2, elements 116; para [0016]; op-amp connects inputs/outputs via resistors).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the driver circuit comprises an operational amplifier, and wherein a non-inverting input of the operational amplifier is connected to the first input terminal, wherein an inverting input of the operational amplifier is connected to the second input terminal, and wherein an output of the operational amplifier is connected to the second end of the first resistor and to the first end of the second resistor, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 12, Dooper in view of Panov, as applied to claim 1.
Dooper discloses wherein the driver circuit comprises a third input terminal coupled to a third voltage, a fourth input terminal coupled to a fourth voltage, and a common mode loop circuit (third input terminal coupled to a third voltage and fourth input terminal coupled to a fourth voltage with common mode loop circuit adapted from PWM inputs and CM rejection loop via counters as shown in Figs. 11-12; para [0034]-[0037]) ("a third input terminal coupled to a third voltage... a fourth... and a common mode loop circuit" adapted from PWM inputs and CM rejection loop via counters as shown in Figs. 11-12; para [0034]-[0037]).
Dooper does not disclose the common mode loop circuit as claimed.
However, Panov discloses the common mode loop circuit as claimed ("common mode loop circuit" via divert/feedback as shown in Fig. 1; para [0013]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include the common mode loop circuit as claimed, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 13, Dooper in view of Panov, as applied to claim 12.
Dooper does not disclose wherein the common mode loop circuit comprises a first input, a second input, a third input and an output; wherein the first and the second inputs of the common mode loop circuit are respectively configured to receive a common mode voltage at the first and second output terminals, the third input is configured to receive the reference voltage.
However, Panov discloses wherein the common mode loop circuit comprises a first input, a second input, a third input and an output (first input and second input in elements 24/26 as shown in Fig. 1; para [0013]); wherein the first and the second inputs of the common mode loop circuit are respectively configured to receive a common mode voltage at the first and second output terminals, the third input is configured to receive the reference voltage (elements 24/26 to V_ref as shown in Fig. 1; para [0013], [0017]) ("the first and the second inputs of the common mode loop circuit are respectively configured to receive a common mode voltage at the first and second output terminals, the third input is configured to receive the reference voltage" as shown in Fig. 1, elements 24/26 to V_ref; para [0013], [0017]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the common mode loop circuit comprises a first input, a second input, a third input and an output; wherein the first and the second inputs of the common mode loop circuit are respectively configured to receive a common mode voltage at the first and second output terminals, the third input is configured to receive the reference voltage, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 14, Dooper discloses in Fig. 4, a current sense circuit for measuring a load connected to a power amplifier wherein the load is configured to receive a first voltage (first output connection 206a between the positive supply voltage VP and ground as shown in Fig. 2; para [0021]) at a first end and a second voltage (second connection 206b between the positive supply voltage VP and ground as shown in Fig. 2; para [0021]) at a second end, wherein the first and the second voltages are in opposite phase ("The amplifier incorporates a second pair of power switching transistors M1′ M2′... switching a first output connection 206a between the positive supply voltage VP and ground. The second pair of transistors M1′, M2′ are driven by a second switching signal 204b with a signal that is dependent on an inverted version of the input signal 101 compared with the same triangular waveform 102, and provides a voltage on a second connection 206b between the positive supply voltage VP and ground" as shown in Fig. 2; para [0021]; load is loudspeaker connected across outputs), wherein the current sense circuit comprises:
a first input terminal coupled to the first voltage (input to sense circuit from half-bridge output 206a as shown in Fig. 4; para [0022]);
a second input terminal coupled to the second voltage (input to sense circuit from half-bridge output 206b as shown in Fig. 4; para [0022]);
a third input terminal coupled to the third voltage (input from M1/M2 side as shown in Fig. 4; para [0022]);
a fourth input terminal coupled to the fourth voltage (input from M1'/M2' side as shown in Fig. 4; para [0022]) ("current sensing resistors 401a, 401b are connected between each N-MOS transistor M2, M2′ and ground. A voltage sense circuit 404 detects the voltage across each resistor 401a, 401b" as shown in Fig. 4; para [0022]; inputs to sense circuit from half-bridge outputs, with additional for full H-bridge as shown in Fig. 4, M1/M2 and M1'/M2' sides; para [0022]);
a first output terminal (VA from track-and-hold as shown in Fig. 10; para [0033]);
a second output terminal (VB from track-and-hold as shown in Fig. 10; para [0033]) ("passes an output signal, via a low pass filter 405, to a 12-bit ADC 406" as shown in Fig. 4; para [0022]; differential outputs VA, VB from track-and-hold as shown in Fig. 10; para [0033]); and
a common mode loop circuit comprising a first input, a second input, a third input and an output wherein the first and the second inputs are configured to receive a common mode voltage at the first and second output terminals (first input and second input in track-and-hold circuit as shown in Fig. 10; para [0033]), the third input is configured to receive a reference voltage (ground reference in track-and-hold circuit as shown in Fig. 10; para [0033]) ("A feature... is that the speaker current is sampled... when current is flowing through only the N-MOS transistors... No large common mode voltage swing over the sense resistors; No level shifting being required... An advantage of sensing the current between N-MOS transistors and ground is that only low voltages are applied to the voltage sensing circuit" as shown in Fig. 4; para [0027]; active sampling via track-and-hold circuit as shown in Fig. 10; para [0033]).
Dooper does not disclose a common mode loop circuit comprising... and to generate a control signal at the output to switch the current sense circuit such that the common mode voltage equals the reference voltage.
However, Panov discloses a common mode loop circuit comprising... and to generate a control signal at the output to switch the current sense circuit such that the common mode voltage equals the reference voltage (common-mode loop circuit with control signal via diversion to V_ref as shown in Fig. 1; para [0013], [0039]) ("common-mode loop circuit comprises a first input, a second input, a third input and an output... to generate a control signal... such that the common mode voltage equals the reference voltage" as shown in Fig. 1; para [0013], [0039]; diversion equals CM to V_ref).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include a common mode loop circuit comprising... and to generate a control signal at the output to switch the current sense circuit such that the common mode voltage equals the reference voltage, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 15, Dooper in view of Panov, as applied to claim 14.
Dooper discloses further comprising a differential mode loop circuit comprising a first input and a second input and an output wherein the first and the second inputs are configured to receive a voltage difference and generate a control signal to reduce the voltage difference (first input and second input in track-and-hold circuit as shown in Fig. 10; para [0033]) ("differential mode loop circuit comprising a first input and a second input... configured to receive a voltage difference and generate a control signal" as shown in Fig. 10; para [0033]; track-and-hold reduces differential errors via sampling).
As to claim 16, Dooper in view of Panov, as applied to claim 15.
Dooper discloses further comprising a first transistor comprising a source, a gate and a drain, a second transistor comprising a source, a gate and a drain, and a first, second, third and fourth conversion resistors comprising a first end and a second end wherein the first end of the first, second, third and fourth conversion resistors are respectively coupled to the first, second, third and fourth input terminals, and the second end of the first resistor is coupled to the first input of the differential mode loop circuit and to the source of the first transistor, the second end of the second resistor is coupled to the second input of the differential mode loop circuit and to the source of the second transistor, the second end of the third resistor is coupled to the first input of the common mode loop circuit and to the drain of the first transistor, the second end of the fourth resistor is coupled to the second input of the common mode loop circuit and to the drain of the second transistor, and the control signals generated by the common mode loop circuit and the differential mode loop circuit control the gates of the first transistor and the second transistor (first transistor M1, second transistor M2, first resistor 401a, second resistor 401b, third resistor in M1'/M2' path, fourth resistor in M1'/M2' path as shown in Fig. 4; para [0021]-[0022]) ("a first transistor (M1) comprising a source, a gate and a drain... second transistor (M2)... first, second, third and fourth conversion resistors... first end... coupled to the first... input terminals... second end... coupled to the first input... and to the source... control signals... control the gates" as shown in Fig. 4, elements M1/M2/M1'/M2'; para [0021]-[0022]; resistors couple to transistors).
As to claim 17, Dooper in view of Panov, as applied to claim 14.
Dooper does not disclose wherein the common mode loop circuit comprises a couple of differential amplifier circuits.
However, Panov discloses wherein the common mode loop circuit comprises a couple of differential amplifier circuits (op-amp with differential paths as shown in Fig. 2; para [0016]) ("the common mode loop circuit comprises a couple of differential amplifier circuits" as shown in Fig. 2, op-amp with differential paths; para [0016]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the common mode loop circuit comprises a couple of differential amplifier circuits, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 18, Dooper in view of Panov, as applied to claim 15.
Dooper does not disclose wherein the differential mode loop circuit comprises a differential amplifier circuit.
However, Panov discloses wherein the differential mode loop circuit comprises a differential amplifier circuit (differential amplifier as shown in Fig. 2; para [0016]) ("differential mode loop circuit comprises a differential amplifier circuit" as shown in Fig. 2; para [0016]).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the system of Dooper to include wherein the differential mode loop circuit comprises a differential amplifier circuit, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
As to claim 19, Dooper discloses in Fig. 4, a method of operating a voltage sense circuit for measuring a load connected to a power amplifier wherein the load is configured to receive a first voltage (first output connection 206a between the positive supply voltage VP and ground as shown in Fig. 2; para [0021]) at a first end and a second voltage (second connection 206b between the positive supply voltage VP and ground as shown in Fig. 2; para [0021]) at a second end, wherein the first and the second voltages are in opposite phase ("The amplifier incorporates a second pair of power switching transistors M1′ M2′... switching a first output connection 206a between the positive supply voltage VP and ground. The second pair of transistors M1′, M2′ are driven by a second switching signal 204b with a signal that is dependent on an inverted version of the input signal 101 compared with the same triangular waveform 102, and provides a voltage on a second connection 206b between the positive supply voltage VP and ground" as shown in Fig. 2; para [0021]; load is loudspeaker connected across outputs), the method comprising the steps of:
receiving, at an input of a first voltage divider circuit of the voltage sense circuit, the first voltage (receiving at input of first current sensing resistor 401a as shown in Fig. 4; para [0022], [0025]);
receiving, at an input of a second voltage divider circuit of the voltage sense circuit, the second voltage (receiving at input of second current sensing resistor 401b as shown in Fig. 4; para [0022], [0025]) ("current sensing resistors 401a, 401b are connected between each N-MOS transistor M2, M2′ and ground... The voltage sense circuit may be configured to sample a differential voltage across the first and second current sensing resistors" as shown in Fig. 4; para [0022], [0025]);
receiving, at a first input of a driver circuit of the voltage sense circuit, a reference voltage (receiving at first input of track-and-hold circuit with ground reference as shown in Fig. 10; para [0033]); and
driving, by the driver circuit, an output common mode voltage of the first and the second voltage divider circuits with the reference voltage (driving via track-and-hold circuit with ground reference as shown in Fig. 10; para [0033]) ("A feature... is that the speaker current is sampled... when current is flowing through only the N-MOS transistors... No large common mode voltage swing over the sense resistors; No level shifting being required... An advantage of sensing the current between N-MOS transistors and ground is that only low voltages are applied to the voltage sensing circuit" as shown in Fig. 4; para [0027]; active sampling via track-and-hold circuit as shown in Fig. 10; para [0033]).
Dooper does not disclose receiving, at a second input of the driver circuit, a common mode signal from the first and the second voltage divider circuits.
However, Panov discloses receiving, at a second input of the driver circuit, a common mode signal from the first and the second voltage divider circuits (receiving common-mode feedback signals at Op Amp inputs via divert capacitors 20/22, 120/122 as shown in Figs. 1-2; para [0013], [0017], [0039]) ("Capacitors (referred to as divert capacitors) are coupled between the feedback paths and a constant voltage reference (V_ref, e.g., ground...) to divert common-mode current away from the analog integrator... They protect the operational amplifier from common-mode feedback signals by providing a high-pass filter to the reference voltage, keeping the common-mode voltage at the Op Amp inputs small" as shown in Figs. 1-2, elements 20/22, 120/122; para [0013], [0017], [0039]; divert capacitors with op-amp act as driver, receiving CM from paths and driving/shunting to V_ref).
Therefore, It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to modify the method of Dooper to include receiving, at a second input of the driver circuit, a common mode signal from the first and the second voltage divider circuits, as taught by Panov for improved efficiency and signal integrity in Class-D audio amps by enhancing protection against high CM swings in BTL outputs.
Conclusion
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/TUNG X NGUYEN/ Primary Examiner, Art Unit 2858 1/22/2026