DETAILED ACTION
Status
This Office Action is responsive to claims filed on 06/13/2024. Please note Claims 1-20 are pending and have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 6-11, 13-18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Burns (US 20220207690 A1, cited on IDS 12/4/2024), in view of MUTHLER (US 20240095995 A1).
Regarding Claim 1, Burns discloses an apparatus comprising: circuitry configured to:
generate low-precision vertex data (Fig. 3, “Quantized triangle”) for each primitive of a set of primitives included in encoded primitive data ([0103] “The quantization may have generated reduced-precision representations of the primitive and ray. In some embodiments, the method includes quantizing the ray, the primitive, or both. In some embodiments, the reduced-precision representations are fixed-point representations and the first representation is a floating-point representation.”);
perform a first ray intersection test for a ray against each primitive using the low-precision vertex data ([0102] “At 720, in the illustrated embodiment, ray intersection circuitry performs a reduced-precision intersection test.”); and
responsive to the first ray intersection test generating an inconclusive intersection result for one or more primitives of the set of primitives ([0111] “in response to a hit indicated by the initial intersection result…”):
generate high-precision vertex data for each of the one or more primitives (Fig. 3, “Object space triangle”.); and
perform a second ray intersection test for the ray against each of the one or more primitives using the high-precision vertex data ([0111] “At 750, in the illustrated embodiment, shader circuitry executes, in response to a hit indicated by the initial intersection result, a shader program to perform an intersection test using the first representation of the primitive to determine whether the ray intersects the primitive. For example, RIA 190 may dynamically form a SIMD group to perform an original-precision intersection test for a set of one or more rays that are indicated as hits by the reduced-precision intersection test.”).
Laine does not expressly disclose the first ray intersection test is performed simultaneously.
However, in the same field of endeavor, MUTHLER discloses simultaneously perform a first ray intersection test for a ray against each primitive using the low-precision vertex data ([0134] “In example embodiments herein, a complet may define a plurality of “child” bounding volumes that (whether or not they represent leaf nodes) that don't necessarily each have descendants but which the TTU will test in parallel for ray-bounding volume intersection to determine whether geometric primitives associated with the plurality of bounding volumes need to be tested for intersection”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the apparatus of Burns with the feature of performing the reduced-precision intersection test simultaneously. Doing so could improve the performance efficiency, as taught by MUTHLER.
Regarding Claim 2, Burns-MUTHLER discloses the apparatus as claimed in claim 1, wherein the encoded primitive data comprises, for each primitive of the set of primitives: an anchor position (Burns [0095] “a common origin”) per coordinate of each vertex in a three-dimensional space; and an offset for each vertex relative to the anchor position (Burns [0095] “As discussed above, a set of quantized values (e.g., for multiple primitives) may share a “quantization frame” that defines parameters for the values. In some embodiments, quantized values are represented as fixed-point offsets relative to a common origin and scale factor.”).
Regarding Claim 3, Burns-MUTHLER discloses the apparatus as claimed in claim 2, wherein to generate the high-precision vertex data, the circuitry is configured to, for each vertex of each primitive of the one or more primitives: compute a sum of the offset and the anchor position (Burns [0097] “In some embodiments, the processor stores both quantized primitive data and original-precision primitive data in the same region of memory so that a single offset value encoded in a parent node of the BVH is sufficient to indicate all of the corresponding the primitive data.”); convert the sum to a floating point number (Burns [0103] “In some embodiments, the reduced-precision representations are fixed-point representations and the first representation is a floating-point representation.”); and apply a scale factor to the converted sum to generate a scaled sum that represents high-precision vertex data for a given vertex (Burns [0095] “As discussed above, a set of quantized values (e.g., for multiple primitives) may share a “quantization frame” that defines parameters for the values. In some embodiments, quantized values are represented as fixed-point offsets relative to a common origin and scale factor. Therefore, the quantization frame may specify the origin (e.g., in x, y, and z coordinates) and scale factors (e.g., as power-of-2 scale factors for each of the z, y, and z dimensions).”).
Regarding Claim 4, Burns-MUTHLER discloses the apparatus as claimed in claim 2, wherein to generate the low-precision vertex data, the circuitry is configured to: calculate a bounding box for each primitive; and extract low-precision vertex data corresponding to the bounding box ([Burns [0025] “A common class of ADS is the bounding volume hierarchy (BVH) in which surface primitives are enclosed in a hierarchy of geometric proxy volumes (e.g., boxes) that are cheaper to test for intersection.” [0048] “In some embodiments, primitive data is quantized to share the same coordinate frame as bounding regions of an acceleration data structure traversed prior to primitive testing.” MUTHLER [0033] “Therefore, to use memory space and bandwidth more efficiently, the parameters specifying the bounding volumes (e.g., vertex coordinates of boxes representing bounding volumes) are typically stored as low precision numeric data that has been rounded to ensure the bounding box completely contains the geometry.”).
Regarding Claim 6, Burns-MUTHLER discloses the apparatus as claimed in claim 1, further comprising graphics processing circuitry configured to render an image based on one or more primitives from the set of primitives, identified by one of the first ray intersection test and the second ray intersection test as being intersected by the ray (Burns [0022] “Image write unit (IWU) 170, in some embodiments, is configured to store processed tiles of an image and may perform operations to a rendered image before it is transferred for display or to memory for storage.” MUTHLER [0019] “This basic ray tracing visibility test is the fundamental primitive underlying a variety of rendering algorithms and techniques in computer graphics. Generally, ray tracing is a rendering method in which rays are used to determine the visibility of various elements in the scene.”).
Regarding Claim 7, Burns-MUTHLER discloses the apparatus as claimed in claim 1, wherein the circuitry is configured to perform the second ray intersection test for the one or more primitives individually (Burns [0039] “In example embodiments discussed below, the low precision ray triangle intersector rejects triangles by performing low precision fixed-point edge tests. The endpoints of the ray are not considered, and a successful test indicates that a full precision test is needed.” [0111] “For example, RIA 190 may dynamically form a SIMD group to perform an original-precision intersection test for a set of one or more rays that are indicated as hits by the reduced-precision intersection test.”).
Regarding Claim 8, it recites similar limitations of claim 1. The rationale of claim 1 rejection is applied to reject claim 8.
Regarding Claim 9, it recites similar limitations of claim 2. The rationale of claim 2 rejection is applied to reject claim 9.
Regarding Claim 10, it recites similar limitations of claim 3. The rationale of claim 3 rejection is applied to reject claim 10.
Regarding Claim 11, it recites similar limitations of claim 4. The rationale of claim 4 rejection is applied to reject claim 11.
Regarding Claim 13, it recites similar limitations of claim 6. The rationale of claim 6 rejection is applied to reject claim 13.
Regarding Claim 14, it recites similar limitations of claim 7. The rationale of claim 7 rejection is applied to reject claim 14.
Regarding Claim 15, it recites similar limitations of claim 1. The rationale of claim 1 rejection is applied to reject claim 15.
Regarding Claim 16, it recites similar limitations of claim 2. The rationale of claim 2 rejection is applied to reject claim 16.
Regarding Claim 17, it recites similar limitations of claim 3. The rationale of claim 3 rejection is applied to reject claim 17.
Regarding Claim 18, it recites similar limitations of claim 4. The rationale of claim 4 rejection is applied to reject claim 18.
Regarding Claim 20, it recites similar limitations of claim 7. The rationale of claim 7 rejection is applied to reject claim 20.
Claims 5, 12 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Burns (US 20220207690 A1, cited on IDS 12/4/2024), in view of MUTHLER (US 20240095995 A1), further in view of Novikov (US 10582089 B2).
Regarding Claim 5, Burns-MUTHLER discloses the apparatus as claimed in claim 4. In the same field of endeavor, Novikov discloses wherein to generate the low-precision vertex data, the circuitry is further configured to perform a logical bit shift for the offset of each vertex (Col 13 Line 48, “For example, where a bit shift operation is applied to the sampling location data to shift the bits representative of the location of the sampling point by one place to the right, the additional location data may have a bit precision of one less than the bit precision of the sampling location data. For example, such a bit shift operation may involve shifting the sampling location data by one bit to the right, discarding the least significant bit (the rightmost bit, that is shifted out of the rightmost end of the sampling location data) and introducing a zero as the new leftmost bit. This may be considered to correspond to a logical shift of the sampling location data (although an arithmetic shift, in which the sign of the operand is preserved, may be used in other examples).”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the apparatus of Burns-MUTHLER with the feature of generating the low-precision vertex data by performing a logical bit shift. Doing so could efficiently generate low-precision data with low computational cost, as taught by Novikov.
Regarding Claim 12, it recites similar limitations of claim 5. The rationale of claim 5 rejection is applied to reject claim 12.
Regarding Claim 19, it recites similar limitations of claim 5. The rationale of claim 5 rejection is applied to reject claim 19. Also see MUTHLER [0033] “Therefore, to use memory space and bandwidth more efficiently, the parameters specifying the bounding volumes (e.g., vertex coordinates of boxes representing bounding volumes) are typically stored as low precision numeric data that has been rounded to ensure the bounding box completely contains the geometry.”
Conclusion
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/CHONG WU/Primary Examiner, Art Unit 2613