DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is in response to Application 18/743343 filed on June 14, 2024 in which Claims 1-20 are presented for examination.
Status of Claims
Claims 1, 4, 6, 7, 9, 12, 14 and 17-19 have been amended. Claims 1-20 are pending, of which claims 1-20 are rejected under 103. Claims 1, 9 and 17 are rejected under 112(a).
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 9 and 17 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Specifically, the limitations “a first capacitor configured as a backup power source” and “a second capacitor configured to support operations to move or copy the data from the first portion to the non-volatile memory cells” added by the amendment is not described in the application as filed. The original disclosure describes a capacitor configured as a backup power source but does not disclose a first capacitor or second capacitor. Therefore, the originally filed disclosure does not provide adequate written description support for the amended limitations.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 9 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson (US Patent Application 2014/0173357) in view of Nakamura (US Patent Application 2015/0052397) and further in view of Love (US Patent Application 8,521,950) and further in view of Kelly (US Patent Application 2018/0060168).
Claim 1, Anderson teaches a device, comprising: non-volatile memory cells (View Anderson ¶ 16; non-volatile memory); and a controller configured to, detect an onset of outage of power to the device and copy, in response to the onset of the outage of power and from the second portion, data of a predetermined type to the first portion (View Anderson ¶ 32; power loss interruption event, copy from volatile memory to dedicated portion of volatile memory).
Anderson does not explicitly teach a first capacitor configured as a backup power source; at least one volatile memory having a first portion and a second portion, the first portion connected to the first capacitor; and a second capacitor configured to support operations to move or copy the data from the first portion to the non-volatile memory cells.
However, Nakamura teaches a first capacitor configured as a backup power source for only the non-volatile memory cells of the device (View Nakamura ¶ 3, 9; non-volatile memory has a backup power source; battery or capacitor).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Anderson with a first capacitor configured as a backup power source since it is known in the art that a capacitor can be used as a backup power source (View Nakamura ¶ 3, 9). Such modification would have allowed memory to be copied using a backup power source.
Anderson and Nakamura do not explicitly teach at least one volatile memory having a first portion and a second portion, the first portion connected to the first capacitor; and a second capacitor configured to support operations to move or copy the data from the first portion to the non-volatile memory cells.
However, Love teaches at least one volatile memory having a first portion and a second portion, the first portion connected to the first capacitor (View Love Col. 6, Lines 22-28; Col. 7, Lines 4-27; power supply to partitioned memory segment, RAM).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with at least one volatile memory having a first portion and a second portion, the first portion connected to the first capacitor since it is known in the art that a capacitor power a memory segment (View Love Col. 6, Lines 22-28; Col. 7, Lines 4-27). Such modification would have allowed memory segment to be powered.
Anderson, Nakamura and Love do not explicitly teach a second capacitor configured to support operations to move or copy the data from the first portion to the non-volatile memory cells.
However, Kelly teaches a second capacitor configured to support operations to move or copy the data from the first portion to the non-volatile memory cells (View Kelly ¶ 39, 50; the auxiliary power source; an auxiliary processor can be used to execute the corresponding instructions in lieu of or in addition to the main processor; the main processor can be configured to facilitate copying the data from the main memory into the persistent storage)
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with a second capacitor configured to support operations to move or copy the data from the first portion to the non-volatile memory cells since it is known in the art that a backup capacitor can be used to move or copy data (View Kelly ¶ 39, 50). Such modification would have allowed data to be moved or copied using a backup capacitor.
Claim 9 is the method corresponding to the device of Claim 1 and is therefore rejected under the same reasons set forth in the rejection of Claim 1.
Claim 17 is the apparatus corresponding to the device of Claim 1 and is therefore rejected under the same reasons set forth in the rejection of Claim 1.
Claim(s) 2-4 and 10-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson (US Patent Application 2014/0173357) in view of Nakamura (US Patent Application 2015/0052397) in view of Love (US Patent Application 8,521,950) in view of Kelly (US Patent Application 2018/0060168) and further in view of Choi (US Patent Application 2016/0378582).
Claim 2, most of the limitations of this claim has been noted in the rejection of Claim 1. The combination of teachings above does not explicitly teach the data of the predetermined type is meta data about data stored in the non-volatile memory cells.
However, Choi teaches the data of the predetermined type is meta data about data stored in the non-volatile memory cells (View Choi ¶ 165; metadata).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with the data of the predetermined type is meta data about data stored in the non-volatile memory cells since it is known in the art that metadata can be stored in a memory (View Choi ¶ 165). Such modification would have allowed metadata to be copied using a backup power source.
Claim 10 is the method corresponding to the device of Claim 2 and is therefore rejected under the same reasons set forth in the rejection of Claim 2.
Claim 3, most of the limitations of this claim has been noted in the rejection of Claim 2. Choi further teaches the volatile memory is configured as a buffer memory in processing requests to write data to the non-volatile memory cells (View Choi ¶ 165; buffer).
Claim 11 is the method corresponding to the device of Claim 3 and is therefore rejected under the same reasons set forth in the rejection of Claim 3.
Claim 4, most of the limitations of this claim has been noted in the rejection of Claim 3. Nakamura further teaches after the capacitor is fully charged, the first capacitor is sufficient to prevent data loss in the first portion for a predetermined period of time during the outage of power (View Nakamura ¶ 3, 9; capacitor).
Claim 12 is the method corresponding to the device of Claim 4 and is therefore rejected under the same reasons set forth in the rejection of Claim 4.
Claim(s) 5 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson (US Patent Application 2014/0173357) in view of Nakamura (US Patent Application 2015/0052397) in view of Love (US Patent Application 8,521,950) in view of Kelly (US Patent Application 2018/0060168) and further in view of Kumar (US Patent Application 2016/0378623).
Claim 5, most of the limitations of this claim has been noted in the rejection of Claim 1. The combination of teachings above does not explicitly teach a circuit configured to copy data from the first portion to the non-volatile memory cells during the outage of power.
However, Kumar teaches a circuit configured to copy data from the first portion to the non-volatile memory cells during the outage of power (View Kumar ¶ 28; copy data from DRAM to NAND).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with a circuit configured to copy data from the first portion to the non-volatile memory cells during the outage of power since it is known in the art that data can be copied to a non-volatile memory (View Kumar ¶ 28). Such modification would have allowed data to be copied using a backup power source to a non-volatile memory.
Claim 13 is the method corresponding to the device of Claim 5 and is therefore rejected under the same reasons set forth in the rejection of Claim 5.
Claim(s) 6, 7 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson (US Patent Application 2014/0173357) in view of Nakamura (US Patent Application 2015/0052397) in view of Love (US Patent Application 8,521,950) in view of Kelly (US Patent Application 2018/0060168) in view of Kumar (US Patent Application 2016/0378623) and further in view of Seekins (US Patent Application 2015/0324282).
Claim 6, most of the limitations of this claim has been noted in the rejection of Claim 5. The combination of teachings above does not explicitly teach during the outage of power, the first capacitor is configured to power the circuit and the first portion, without powering the controller after the data of the predetermined type is copied from the second portion to the first portion.
However, Seekins teaches during the outage of power, the first capacitor is configured to power the circuit and the first portion, without powering the controller after the data of the predetermined type is copied from the second portion to the first portion (View Seekins ¶ 19; discharge power during power failure).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with during the outage of power, the first capacitor is configured to power the circuit and the first portion, without powering the controller after the data of the predetermined type is copied from the second portion to the first portion since it is known in the art that power can be discharged (View Seekins ¶ 19). Such modification would have allowed power to be discharged after data is copied.
Claim 14 is the method corresponding to the device of Claim 6 and is therefore rejected under the same reasons set forth in the rejection of Claim 6.
Claim 7, most of the limitations of this claim has been noted in the rejection of Claim 6. Nakamura further teaches during the outage of power, the first capacitor is configured to power the first portion without powering the second portion after the data of the predetermined type is copied from the second portion to the first portion (View Nakamura ¶ 3, 9; capacitor as backup power source).
Claim(s) 8 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson (US Patent Application 2014/0173357) in view of Nakamura (US Patent Application 2015/0052397) in view of Love (US Patent Application 8,521,950) in view of Kelly (US Patent Application 2018/0060168) and further in view of Ryan (US Patent 8,370,683).
Claim 8, most of the limitations of this claim has been noted in the rejection of Claim 1. The combination of teachings above does not explicitly teach the non-volatile memory cells are configured to store an indicator indicating that the first portion holds valid data; and during the outage of power and in response to expiration of a predetermined period of time, the device is configured to change the indicator to indicate that data stored in the first portion is invalid.
However, Ryan teaches the non-volatile memory cells are configured to store an indicator indicating that the first portion holds valid data (View Ryan Col. 8, Lines 1-13; valid data); and during the outage of power and in response to expiration of a predetermined period of time, the device is configured to change the indicator to indicate that data stored in the first portion is invalid (View Ryan Col. 8, Lines 13-21; data becomes invalid).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with the non-volatile memory cells are configured to store an indicator indicating that the first portion holds valid data; and during the outage of power and in response to expiration of a predetermined period of time, the device is configured to change the indicator to indicate that data stored in the first portion is invalid since it is known in the art that data can become invalid (View Ryan Col. 8, Lines 1-21). Such modification would have allowed data to become invalid during a power failure.
Claim 16 is the method corresponding to the device of Claim 8 and is therefore rejected under the same reasons set forth in the rejection of Claim 8.
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson (US Patent Application 2014/0173357) in view of Nakamura (US Patent Application 2015/0052397) in view of Love (US Patent Application 8,521,950) in view of Kelly (US Patent Application 2018/0060168) in view of Kumar (US Patent Application 2016/0378623) in view of Seekins (US Patent Application 2015/0324282) and further in view of Matsubara (US Patent Application 2015/0293714).
Claim 15, most of the limitations of this claim has been noted in the rejection of Claim 14. The combination of teachings above does not explicitly teach stopping, during the outage of power, powering the second portion upon completion of the copying of the data of the predetermined type.
However, Matsubara teaches stopping, during the outage of power, powering the second portion upon completion of the copying of the data of the predetermined type (View Matsubara ¶ 12; stop operation).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with stopping, during the outage of power, powering the second portion upon completion of the copying of the data of the predetermined type since it is known in the art that copying of data can be stopped during a power outage (View Matsubara ¶ 12). Such modification would have allowed a copy function to be stopped during a power outage.
Claim(s) 18 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson (US Patent Application 2014/0173357) in view of Nakamura (US Patent Application 2015/0052397) in view of Love (US Patent Application 8,521,950) in view of Kelly (US Patent Application 2018/0060168) and further in view of Kelly (US Patent Application 2017/0242467).
Claim 18, most of the limitations of this claim has been noted in the rejection of Claim 17. The combination of teachings above does not explicitly teach during the outage of power and after the data of the predetermined type is copied to the first portion, the processor and the second portion are powered down while the circuit and the first portion are powered by the first capacitor.
However, Kelly teaches during the outage of power and after the data of the predetermined type is copied to the first portion, the processor and the second portion are powered down while the circuit and the first portion are powered by the first capacitor (View Kelly ¶ 36; shut down components).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with during the outage of power and after the data of the predetermined type is copied to the first portion, the processor and the second portion are powered down while the circuit and the first portion are powered by the first capacitor since it is known in the art that components can be shut down during a power outage (View Kelly ¶ 36). Such modification would have allowed components to be powered down during a power outage.
Claim 19, most of the limitations of this claim has been noted in the rejection of Claim 18. Nakamura further teaches the first capacitor is sufficient to power the first portion at least for a predetermined period of time (View Nakamura ¶ 3, 9; capacitor).
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Anderson (US Patent Application 2014/0173357) in view of Nakamura (US Patent Application 2015/0052397) in view of Love (US Patent Application 8,521,950) in view of Kelly (US Patent Application 2018/0060168) in view of Kelly (US Patent Application 2017/0242467) and further in view of Ryan (US Patent 8,370,683).
Claim 20, most of the limitations of this claim has been noted in the rejection of Claim 19. The combination of teachings above does not explicitly teach the non-volatile memory is configured to store an indicator indicating that the first portion holds valid data; and during the outage of power and in response to expiration of the predetermined period of time, the apparatus is configured to change the indicator to indicate that data stored in the first portion is invalid.
However, Ryan teaches the non-volatile memory is configured to store an indicator indicating that the first portion holds valid data (View Ryan Col. 8, Lines 1-13; valid data); and during the outage of power and in response to expiration of the predetermined period of time, the apparatus is configured to change the indicator to indicate that data stored in the first portion is invalid (View Ryan Col. 8, Lines 13-21; data becomes invalid).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination of teachings with the non-volatile memory cells are configured to store an indicator indicating that the first portion holds valid data; and during the outage of power and in response to expiration of a predetermined period of time, the device is configured to change the indicator to indicate that data stored in the first portion is invalid since it is known in the art that data can become invalid (View Ryan Col. 8, Lines 1-21). Such modification would have allowed data to become invalid during a power failure.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Prior Art Made of Record
The prior art made of record and not relied upon is considered pertinent to Applicant’s disclosure:
Nicholson et al. (U.S. Patent 7,395,452); teaches the energy storage device may be a large capacitor or a small battery depending on the power requirements of the devices of the system that need backup power to move data from the volatile write buffer to the nonvolatile cache.
Conclusion
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/SARAI E BUTLER/Primary Examiner, Art Unit 2114
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